JPS59161185A - Electronic still camera - Google Patents

Abstract

PURPOSE:To eliminate completely a smear from a video signal by executing a smear discharge and a reading-out and recording operation of a video signal in a state that light is not made incident to an image sensor by closing a shutter, after a photographing operation. CONSTITUTION:When a shutter is opened by an exposure time, a transfer pulse of one H portion and a horizontal transfer clock phi H are supplied to a horizontal transfer line 124. In accordance with this transfer pulse, a charge of a vertical transfer line 122 is transferred to the transfer line 124. Prior to it, a vertical transfer clock phiV is not generated in a control line 28, therefore, a transfer gate 121 to the vertical transfer line from each image pickup cell 120 is not driven. Accordingly, an optical charge accumulated in each image pickup cell 120 is held as it is. On the other hand, a charge transferred already to the transfer line 124 is discharged successively to an output line 32. These charges are a residual charge of a smear, etc. and disregarded as an ineffective signal. Subsequently, when the following clock phiH is supplied, the gate 121 of every one horizontal line is driven, and a picture signal acummulated in each cell 120 is sent out successively from the output line 32.

Description

DETAILED DESCRIPTION OF THE INVENTION 1 Natsume Inu I The present invention is an electronic still camera, in particular, a solid-state imaging device in which a vertical transfer path for pixel signals in a two-dimensional array of imaging cells is formed of a conductor. 11-Relates to an electronic still camera that captures images.

11. As is well known, solid-state imaging devices have the disadvantage that noise such as blooming and smear is mixed into the video signal.

Blooming occurs when a high-brightness subject is photographed and multiple photocharges are generated in response to strong incident light, and smearing occurs when long-wavelength incident light such as in the infrared region penetrates relatively deep into the imaging device board. As a result, the light enters areas other than the depletion region, and the charges generated there diffuse and reach the vertical transfer area, resulting in a phenomenon that appears as a row of bright spots in the vertical direction on the display screen.

Electronic still cameras that obtain static 1F images of subjects require higher resolution images than moving images, and because they obtain a single temporally frozen image,
It is required that such blooming and smearing do not occur.

Countermeasures have been taken to prevent blooming, such as installing an overflow drain in each channel in a CCD, and using a three-layer structure with a photodiode cell in an NO3 solid-state imaging device, but these measures do not prevent smearing. At present, there is no effective method to remove it.

For example, Japanese Patent Application Laid-Open No. 13819/1984 proposes a method for reducing residual charges, particularly blooming, in an image sensor and a signal line in a NO9 type image sensor.

In this method, the residual charge on the vertical signal output line is swept out during the horizontal retrace period immediately before reading out pixel signals from the imaging cells in one horizontal row.

However, even if such a method is used, as long as the signal is read while the image sensor is always illuminated with light, it is possible to reduce the occurrence of smear.
As a result of experiments conducted by the present inventors, it has become clear that this cannot be removed.

When the image sensor is constantly irradiated with light, smear occurs for the following reasons even if the charge leaking into the vertical transfer path is swept out during the retrace period.

Metal oxide film "P: As is well known in conductor (NO3) type image sensors and priming transfer device (CI'D) type image sensors, vertical columns of imaging cells are connected to each other by vertical transfer electrode conductors via transfer gates. has been done.

For example, assume that one imaging cell in one vertical column is constantly irradiated with spot exposure that causes smear, and that enough carriers are generated at the corresponding vertical transfer path position to cause smear.

When each imaging cell of this image sensor is sequentially addressed and the pixel signal of each imaging cell corresponding to that vertical transfer path is read out, all the imaging cells connected to that vertical transfer path are gated out. All pixel signals that are processed will contain smear. therefore,
When such a pixel signal is reproduced as an image on a display screen such as a cathode ray tube, a smear appears in the form of a row of bright spots at the same vertical scanning position above and below the pixel exposed to the spot light.

In other words, all the pixel signals of the vertical column transferred via the vertical transfer path where the smear component leaks are the smear [
You will receive +.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art and provide an electronic still camera that does not generate smear.

The present invention provides an optical shutter in the imaging optical path of a solid-state imaging device in which the vertical transfer path of pixel signals is formed of a conductor, and drives the shutter and removes smear from the transfer path of the solid-state imaging device. The driving for the solid-state imaging device and the driving for reading out the pixel signals are linked to prevent the solid-state imaging device from being irradiated with incident light while it is being driven.

According to the present invention, there is provided an imaging surface in which imaging cells are arranged two-dimensionally, a vertical transfer path formed of a conductor that transfers pixel signals from the imaging surface, and a horizontal transfer path that transfers pixel signals from the vertical transfer path. a solid-state imaging device which outputs a pixel signal from an imaging cell through vertical and horizontal transfer paths as a video signal corresponding to a subject image formed on an imaging surface, and forms a subject image on the imaging surface for an exposure time; In an electronic still camera equipped with an exposure means that shields the imaging surface from light at other times, this electronic still camera controls the solid-state imaging device and the exposure means to output a rask scan video signal from the solid-state imaging device. The control circuit includes a control circuit that, when the exposure time of the exposure means ends and the imaging surface is shielded from light, drives the solid-state imaging device to discharge at least the charge existing in the vertical transfer path and to discharge the charge existing in the primary imaging cell. The pixel signal is output as an effective video signal by transferring the pixel signal from the imaging cell to the vertical and horizontal transfer paths.

In addition, in the tree specification, the term "still" shall be interpreted in a broad sense. Therefore, of course, continuous shooting of still images,
In other words, it includes not only "continuous shooting" but also so-called field skip movies in which the repetition period of continuous shooting is accelerated to a two-field period.

Next, embodiments of the electronic still camera according to the present invention will be described in detail with reference to the accompanying drawings.

The embodiment of an electronic still camera according to the invention, shown in a schematic block diagram in FIG. 1, has an MO9 type image sensor 10 as a solid-state bare image device. This solid-state imaging device
O is a two-dimensional internal imaging device having a light-receiving surface in which photosensitive imaging cells 120 are two-dimensionally arranged, that is, an imaging cell array 12, as will be explained later with reference to FIG.

An optical lens system 18 is disposed in front of the imaging cell array 12 via an optical shutter 14 and an aperture 15 that optically block light. Optical lens system 18
The optical shutter 14 is opened and closed by a shutter control circuit 18 to allow the incident light from the lens 18 to enter the imaging cell array 12 for the required exposure time, and The time is for shielding the imaging surface 12 from light.

The shutter control circuit 18 is connected to a variable frequency dividing circuit 50, and ultimately opens and closes the shutter 14 in synchronization with the rotation of the magnetic disk 52, as will be described later. The exposure time is controlled according to the amount of light detected by a received light amount sensor 74 disposed in the imaging optical system. These constitute the exposing means of this device.

The output 32 of the solid-state imaging device IO is the video signal processing circuit 3
4, the video signal processing circuit 34 converts the video signal output from the solid-state imaging device 12 into, for example, IT! This is a signal processing circuit that converts video signals to the format of the JC standard television system. This video signal is supplied to a magnetic recording head 56 through a buffer circuit 54. In this embodiment, for example, a 2-field i-frame interlaced scanning method is used.

The video signal is recorded on a rotating recording medium 52 such as a magnetic disk. The magnetic disk 52 is rotated by a motor 58 at, for example, 60 rotations per second (3, floo
rP-), which remains compatible with the standard television system described above. A movable magnetic head 56 is mounted on the recording surface 60 of the magnetic disk 52.
is a magnetic recording head that records the video signal output from the buffer circuit 54 on a selected track on the recording surface 8o. Further, a timing reader 64 for reading timing marks 82 is also provided on the timing track of the recording surface 60.

These motor 58 and recording head 58 are driven and controlled by a mechanism control circuit 86. The mechanism control circuit 6B is
This circuit drives and controls the motor 58 in response to the shirt release 22, moves the recording head 58, and selects the recording I/rack of the magnetic disk 52.

In this embodiment, the entire apparatus is controlled in synchronization with a timing clock extracted from the timing mark 82 of the magnetic disk 52. This timing lottery 11
1 is performed by timing read head 84 and timing detection circuit 68. The timing detection circuit 68 shapes the waveform of the clock pulse detected when the timing mark 62 passes through the reading pad 64 and supplies it to the mechanism control circuit 8B, the variable frequency dividing circuit 50, the timing pulse generation circuit 24, etc. This is a circuit that does this.

The variable frequency divider circuit 50 includes a down counter that divides the output clock of the timing detection circuit 68 and supplies the divided clock to the timing pulse generation circuit 24 and the shutter control circuit 18. The frequency division ratio is controlled by the continuous shooting speed selection circuit 70. The continuous shooting speed selection circuit 70 selects a continuous shooting speed based on the quick shooting speed designation information input to the input terminal 72 according to the user's settings and the received light amount information detected by the received light amount sensor 74 provided in the imaging optical system. The frequency division ratio of the circuit 50, that is, the snapshot speed is determined. For example, if the amount of light received is large enough to enable quick shooting at the speed specified by the user, that specified speed will be selected, and if the amount of light received is insufficient, the speed will be taken using that amount of light. The maximum possible continuous shooting speed is selected.

The timing pulse generation circuit 24 is supplied with a clock from the timing detection circuit 68 , a frequency-divided clock from the variable frequency division circuit 50 , and a signal indicating the status of the shutter 14 from the shutter control circuit 18 . This allows, for example, counting the timing when optical carriers have been completely accumulated in the solid-state imaging device 2 and the recording control circuit 76 and the solid-state imaging device 10.
Generates various timing pulses to control various parts of this device.

Recording control circuit 7B! This is a circuit that controls the video signal processing circuit 34 and the buffer circuit 54. When the timing pulse generation circuit 24 detects a predetermined position on the track of the rotating magnetic disk 52 at the end of imaging counted as described above, the timing pulse generation circuit 24 outputs a recording timing pulse to the recording control circuit 78.
The recording control circuit 7B writes the output video signal of the solid-state imaging device 10 onto the magnetic disk 52 by the recording head 5B through the processing i circuit 34 and the buffer circuit 54.

The entire device is controlled by various timing pulses generated by a timing generation circuit 24. The solid-state imaging device 10 is driven and controlled by two control lines 26 and 28. A horizontal scanning clock φH is supplied to the control line 2B, and a vertical scanning clock φV is supplied to the control line 2 from the timing pulse generation circuit 24, respectively.

As shown in FIG. 2, in this embodiment, the two-dimensional solid-state imaging device IO has one image cell, that is, a photodiode 12.
It constitutes an MO8-type imaging device which has an imaging cell array of MO9 structure in which 0's are arranged in a matrix, that is, an imaging plane 12, and reads a charging current for a selected first-class image cell 120 by a so-called xY addressing method.

Each imaging cell 120 is connected to a vertical transfer electrode conductor, ie, a vertical transfer path 122, through a source and drain path of +21, and the gate of each vertical transfer gate, -121, is connected to a vertical scanning line 12B by a vertical addressing line 12B. It is connected to each stage of the shift register 128. Each vertical transfer gate 121 is a transfer gate that transfers the photocharge accumulated in the corresponding imaging cell 120 to the vertical transfer line 122.

In this embodiment, the vertical scanning shift register 128 generates a vertical scanning signal that selectively sequentially activates any one of the vertical addressing lines 12B in response to the vertical scanning clock φV on the control line 28 from the timing pulse generation circuit 24. This is a generation circuit.

Each vertical transfer line 122 is connected to the video signal output terminal 32 via a source/drain path of a horizontal transfer gate 123, and constitutes a water 1L transfer electrode body, that is, a horizontal transfer path 124. The gate of each horizontal transfer gate 123, ie, the horizontal scanning addressing line 125, is connected to each stage of the horizontal scanning shift register 130 for I/. In this embodiment, the horizontal scanning shift register 130 generates a horizontal scanning signal that selectively sequentially activates any one of the horizontal addressing lines 125 in response to the horizontal scanning clock φH on the control line 2B from the timing pulse generation circuit 24. This is a generation circuit.

The horizontal transfer gate 123 sequentially transfers pixel signals from each vertical transfer path 122 to the output 32 in series. This transfer operation is performed by horizontal scanning shift register 130 in response to horizontal transfer lock φH supplied from control line 2B. In this way, this constitutes the MO8O8 solid-state imaging disk 10 of the xY addressing system.The operation of this embodiment will be explained with reference to the timing diagram of FIG. The user operates the shirt release 22 and sends a release signal to the mechanism control circuit 8B (Fig. 3(A)).
), the motor 58 is activated and the recording head 56 is moved to select the appropriate recording track. When the rotation of the disk 52 reaches a constant speed ((B) in the same figure)
), the timing detection circuit 88 that was reading the timing mark θ2 on the disk 52 detects this state and outputs a regular timing clock of 7 days (FIG. 7(C)).

The variable frequency divider circuit 50 divides the clock 7 at the frequency division ratio set in the snapshot speed selection circuit 70, for example, 1/3 in this example.
8 and outputs a frequency-divided clock 80 ((D) in the figure) to the timing pulse generation circuit 24 and the shutter control circuit 18. Upon receiving this, the shutter control circuit 18 sets an exposure period corresponding to the amount of received light detected by the received light amount sensor 74, for example, T! Open the shutter 14 ((E) in the same figure).
), this exposure period is variable according to the amount of received light, as shown in 71 to 4, for example. Therefore, the shutter 14 is opened in synchronization with the frequency division timing pulse 80, and the images of the 1 field are sequentially captured onto the imaging surface 12 of the solid-state imaging device 1G.

When the exposure time has elapsed, the shutter control circuit 18 closes the shutter 14, and the pulse generation circuit 2
Report to 4. Therefore, the timing pulse generation circuit 24 supplies various timing marks for video signal recording to the solid-state imaging device IO and the recording control circuit 7B.

The timing pulse generation circuit 24 is shown in FIG. 3(F) and (
A vertical transfer lock φV and a horizontal transfer lock φH are generated as shown in FIG. Since the magnetic disk 52 rotates at 3,800 revolutions per minute in this embodiment, the timing clock 78 is 1180 seconds, that is, the vertical scanning period (one field period, I
V). Vertical transfer lock φV is l
The horizontal transfer lock φH has a period equal to the horizontal scanning period (IH), and pulses equal to the number of pixels included in one horizontal scanning line occur during the IH period. For example, the arrangement of the imaging cell array of the solid-state imaging device 10 is 28 in the horizontal direction.
If there are 4 columns and 490 rows in the vertical direction, the vertical transfer lock φV includes 490 pulses in the 1V period, and the horizontal transfer lock φH includes 284 pulses in the IH period.

By the way, at time to, the shutter control circuit 18 opens the shutter 14 for an exposure time T1. As a result, an optical image of the subject is formed on the imaging cell array 12 of the solid-state imaging device 10, and photocharges corresponding to the optical image are accumulated in each imaging cell 120.

When the shutter 14 closes at time 11, the timing pulse generation circuit 24 controls the horizontal transfer lock φH for one horizontal scan (IH) as shown in FIG. 3(G).
2B to the horizontal scanning shift register 130 of the solid-state imaging device IO. In response to this, the horizontal scanning shift register 130 sequentially activates each horizontal transfer gate 123. In this case, since the vertical transfer lock φ■ is not generated on the control line 28 prior to this, the transfer gate 121 from each imaging cell 120 to the vertical transfer path 122 is not driven.

Therefore, the photocharge accumulated in each imaging cell 120 remains there.

When the 11-minute horizontal transfer lock φH is supplied, the charges existing in the vertical transfer path 122 (FIG. 2) are sequentially transferred to the horizontal transfer path 124 in response to this, and through this to the output 120. be discharged. These charges are residual charges that cause the blooming and smear described above. That is, it is generated and diffused by light incident on a portion of the solid-state imaging device 10 other than the imaging cell 120, or incident light with a long wavelength in the infrared region that enters a deep part of the structure. Therefore, the timing pulse generation circuit 24 causes the video signal processing circuit 34 to ignore the discharge signal from the output 32 at this time as an invalid signal. Due to this draining operation, no residual charges that cause blooming or smear remain in the vertical and horizontal transfer paths 122 and 124.

Horizontal transfer lock φH for 1■ is supplied, that is, 11
When the timing detection circuit 68 outputs the next timing pulse 78 after the period has elapsed (time t3 in FIG. 3), the timing pulse generation circuit 24 synchronizes with this timing pulse 78! Six vertical scan shift registers 128, which provide vertical and horizontal transfer locks φV and φH for fields to solid-state imaging device 10 through control edges 28 and 2θ, respectively, responsively shift each vertical addressing line 12B. sequentially and selectively energize,
vertical transfer per horizontal row) 121. As described above, while the vertical transfer gates 121 in one horizontal row are activated, that is, during the IH period, the horizontal scanning shift register 130 responds to the horizontal transfer lock φ■ for each horizontal addressing line! 25 are sequentially and selectively activated to drive the horizontal transfer gate 123 for each pixel.

Therefore, the photocharges, that is, pixel signals accumulated in each imaging cell 120 are sequentially transferred to the horizontal transfer path via each vertical transfer path 122. Transferred to 24. This is sequentially sent out from the output 32 to form a video signal corresponding to one horizontal scanning line. By repeating this operation sequentially for each horizontal row, a video signal in the rask scan format is outputted to the output 32.

On the other hand, the recording control circuit 7θ controls the video signal processing circuit 34 and the 0 buffer circuit 54 in response to the timing pulse generation circuit 24, and processes this video signal as a valid video signal, for example, a video signal in the NTSC standard format. The signals are sequentially supplied to the magnetic recording head 58 (FIG. 3(I)). In this way, one of the disks 52
A video signal for one field is recorded on a recording track of a book.

When recording is finished, the shutter control circuit 18 opens the shutter 14 in response to the next frequency-divided timing clock 80 and enters the same operation (time t4 in FIG. 3); in this example, the shutter 14 is opened. Period T2 is longer than 〒1,
Since it exceeds the IV period, do you count from time t5? A pixel signal readout operation is performed from the second timing pulse 78 (time t5).

In this way, on the Kinomi side, the horizontal transfer lock φ)I for discharging the residual charge is supplied after the shutter 14 is closed, that is, after time t1 in FIG. 3. Of course, it may be done immediately before starting the readout operation of one pixel signal, and in this embodiment, each horizontal transfer gate 123
Although the energization is performed sequentially within a period of time, the energization does not necessarily have to be sequential. For example, all the horizontal transfer gates 123 may be energized at once in response to a shutter closing operation, and the residual charges may be discharged at once. In the latter case, the interval between continuous shooting operations can be shortened to realize a so-called field skip movie.

A case in which a field skip movie is realized using the embodiment shown in FIG. 1 will be described with reference to FIG. 4. The shutter 14 is opened for a certain period T during the IV period (Fig. 4 (^)),
When the shutter 14 is closed after this exposure time has elapsed, the horizontal transfer lock φ1■ for smear removal is activated on the solid-state imaging device lO during the vertical retrace period, for example.
((B) in the same figure), the vertical and horizontal transfer lock φV is applied in the next IV period after the smear I output is completed.
and φH are applied to the solid-state imaging device 10, and the video signal is read out and recorded as described above (FIG. 4(C)). Avoid vertical and horizontal transfer lock φ
V and φH are shown conceptually as a group of pulses. A field skip movie without smear can be realized by repeating these operations of photographing, smear discharge, and reading and recording every two fields in synchronization with the opening and closing operations of the shutter 14. In this case, the shutter 14
As such, a rotary shutter that rotates in synchronization with these operations can be used to advantage.

Referring to FIG. 5, another embodiment of the invention is shown. Here, the same elements as in the embodiment shown in Fig. 1 are referred to! 1
(Denoted by numeral 1, and points different from this will be explained.While the embodiment of FIG. 1 extracts all synchronization timing from the timing mark 82 of the magnetic disk 52,
The illustrated embodiment is equipped with a reference clock oscillator 80 that generates a predetermined reference clock, and each part of the device operates using a quasi-clock. In other words, this reference clock is used to control the motor through the mechanism control circuit θ6. 58 rotates, the magnetic disk 52 is driven, and the shutter 14, the solid-state imaging device IO, and the recording system are controlled via the frequency dividing circuit 50 and the timing generating circuit 24.

3. What is further different from the embodiment shown in FIG. 1 is that the solid-state imaging device IO is a CPD as shown in FIG. This is the point connected to 0. A transfer pulse TP as shown in FIG. 7(F) is supplied to this control line 30 from the timing pulse generation circuit 24.

As shown in FIG. 6, in this embodiment, the two-dimensional solid-state imaging device 10 is a solid-state imaging device having an imaging cell array in which imaging cells 120 are arranged in a matrix, that is, an imaging surface 12, similar to the example shown in FIG. Components similar to those shown in FIG. 2 are designated by the same reference numerals.

Each vertical transfer electrode conductor 122 is connected to a priming transfer section (CPT) 3
Connected to 0Q. Each CPT300 has a limit @@'a
The aforementioned transfer pulse 〒P is applied from o. Each CPT
300 is connected to the horizontal transfer path 124;
4 constitutes a C (D transfer path) which receives charges from each CP 300 in response to the transfer pulse TP and sequentially transfers them to the output 32.

4 In order to avoid complicating the diagram, control 1126 and 3
0 is shown as a single line, but in the embodiment shown in FIG. 5, unlike the case shown in FIG. It is a wire connection.

These CPT 300 and horizontal transfer path 124 sequentially transfer pixel signals from each vertical transfer path 122 to output 32 in series. This transfer operation is controlled! This is performed in response to the transfer pulse TP supplied from the control line 1130 and the horizontal transfer lock φH supplied from the control line 2B.

The operation of the embodiment shown in FIGS. 5 and 6 is very similar to the operation of the embodiment described with respect to FIGS. 1 and 2, but as shown in the timing diagram of FIG.
They differ greatly in that they respond to the transfer pulse TP and the transfer pulse TP.

In this embodiment, the timing pulse generation circuit 24 determines the exposure time according to the amount of light received by the received light amount sensor 74, and in response to this, the shutter control circuit 1B
Controls the opening and closing of 4. When the exposure time ends, the timing pulse generation circuit 24 closes the shutter 14 via the shutter control 1 circuit 1B, and then drives the solid-state imaging device 10 to discharge the smear, as will be explained in more detail later. After that, the timing mark 82 is detected via the timing detection circuit 68, and in synchronization with this, the video signal processing circuit 34 and the buffer circuit 54 are activated to read and record the video signal.

More specifically, when the shutter 14 closes at time t1, the timing pulse generation circuit 24 generates a 10-minute transfer pulse 〒P and a horizontal transfer lock φ■, respectively, as shown in FIG. CPT 300 and the horizontal transfer path 124. Note that these transfer pulses T
Although P and horizontal transfer lock φH are illustrated as single pulses in FIG. 7 for simplicity, they are actually multiphase clock pulses.

In response to the transfer pulse TP, the CPT 300 transfers vertical transfer path 1.
22 charges are transferred to the horizontal transfer path 124 all at once.

In this case, since the vertical transfer lock φV is not generated on the control line 28 prior to this, the transfer gate 121 from each imaging cell 120 to the vertical transfer path 122 is not driven. Therefore, the photocharges accumulated in each imaging cell 120 are retained there.

When the 18-minute horizontal transfer lock φ11 is supplied to the horizontal transfer path 124, the charges already transferred to the horizontal transfer path 124 are sequentially discharged to the output 32 in response.

These charges are residual charges that cause fixed pattern noise such as the smear mentioned above.

Therefore, the timing pulse generation circuit 24 causes the video signal circuit 34 to ignore the discharge signal from the output 32 at this time as an invalid signal, similar to the embodiment shown in FIG. 1 described above.

Due to this draining operation, no residual charges that cause fixed pattern noise remain in the vertical and horizontal transfer paths 122 and 124.

18 minutes of horizontal transfer lock φH is supplied, that is, IH
When the next reference clock 78 is generated after a period of time has elapsed (time t3 in FIG. 3), the vertical and horizontal transfer locks φV and φH for 1 field 1 minute synchronize with it (time t3 in FIG. 3), and timing pulses are applied to the control lines 28 and 26, respectively. A transfer pulse TP is supplied from the generation circuit 24 and is also supplied to the CPT 30G in synchronization with the vertical transfer lock φV. In response, the vertical scanning shift register 128 sequentially selectively energizes each vertical addressing line 12B to drive the vertical transfer gate 121 for each horizontal row.

In this way, each CP 7300 is driven while the vertical transfer gates 121 in one horizontal row are energized, and the photocharges, that is, pixel signals accumulated in each imaging cell 120 in one horizontal row are transferred to each vertical transfer path 121. The signal is transferred to the horizontal transfer path 124 via the . This pixel signal is shifted in the horizontal transfer path 124 to the right in FIG. 6 in response to the horizontal transfer lock φH, and is sequentially sent out from the output 32 to form a video signal corresponding to one horizontal scanning line. be done. By repeating this operation sequentially for each horizontal row, a video signal in the rask scan format is outputted to the output 32.

The timing pulse generating circuit 24 then detects the timing mark 82 via the timing detecting circuit 8B, and in synchronization with this, energizes the video signal processing circuit 34 and the buffer circuit 54 to read and record the video signal 7.

肱-11 As described above, the electronic still camera according to the present invention performs smear discharge and video signal readout and recording operations with the shutter closed after the photographing operation and no light entering the solid-state imaging device. Smear can be completely removed from the signal. Since the charges remaining in the transfer path of the solid-state imaging device are discharged in one horizontal scanning period at most, there is no need for particularly high-speed circuit elements and there is an advantage that the circuit configuration does not become complicated.

Although a specific embodiment has been described in which the electronic still camera according to the present invention is capable of taking quick pictures, the present invention is not limited thereto. It goes without saying that the present invention can also be effectively applied when performing the following.

[Brief explanation of the drawing]

wSf diagrams are schematic block diagrams 1 and 28 showing an example of the electronic still camera according to the present invention. Figures 2 and 2 are block diagrams showing an example of the configuration of a solid-state imaging device included in the camera shown in FIG. 1, and FIGS. FIG. 4 is a timing diagram for explaining the operation of the device shown in FIG. 1, FIG. 5 is a schematic block diagram similar to FIG. 1 showing another embodiment of the electronic still camera according to the present invention, and FIG. FIG. 6 is a configuration diagram similar to FIG. 2 showing a configuration example of a solid-state imaging device included in the camera shown in FIG. 5; FIG. 7 is a timing chart similar to FIG. 3 for explaining the operation of the device shown in FIG. 5. 10, Solid-state imaging device 12, Imaging cell array 14, Shutter 1B, Shutter control circuit 24, Timing pulse generation circuit 34, Video signal processing circuit 52, Magnetism Disk 82; , , timing mark ee, , mechanism control circuit [18, , timing detection circuit 7B09. Recording control circuit eo, , Reference clock oscillator 120, , Imaging cell 122, , Vertical transfer path 124, , Horizontal transfer path TP, , Transfer pulse φV00. Vertical transfer lock φH16, horizontal transfer lock Patent applicant Fuji Photo Film Co., Ltd. 1 531-

Claims (1)

[Claims] 1. An imaging surface in which imaging cells are arranged two-dimensionally, a vertical transfer path formed of a conductor and which transfers pixel signals from the imaging surface, and which transfers pixel signals from the vertical transfer path. a solid-state imaging device having a horizontal transfer path and outputting a pixel signal from the bare image cell through the vertical and horizontal transfer paths as a video signal corresponding to a subject image formed on the imaging surface; an electronic still camera that controls the solid-state imaging device and the exposure means to form a subject image on the solid-state imaging device; includes a control circuit that outputs a rask scan video signal from the exposure means, and when the exposure time of the exposure means ends and the imaging surface is shielded from light, the control circuit drives the solid-state imaging device to at least scan the vertical transfer path. Let 11 charges exist in
An electronic still camera characterized in that the pixel signal of the imaging cell is then transferred from the imaging cell to the vertical and horizontal transfer paths, thereby outputting it as an effective video signal. 2. The electronic still camera according to claim 1, wherein the solid-state imaging device has a metal oxide semiconductor (MOS) structure in which the horizontal transfer path is formed of a conductor. still camera. 3. In the electronic still camera according to claim 1, in the solid-state imaging device, the horizontal transfer path is
An electronic still camera characterized by having a charge transfer structure that sequentially transfers pixel signals by clock drive. 4. The electronic still camera according to any one of claims 1 to 3, further comprising a recording means for recording the video signal output from the solid-state imaging device on a rotating recording medium. An electronic still camera, wherein the control circuit causes the video signal to be recorded in accordance with the rotation of the rotary recording medium. 5. In the electronic still camera according to any one of claims 1 to 4, the control circuit controls one horizontal scan of the rask scan after the imaging surface is shielded from light by the exposure means. 6. In the electronic still camera according to claim 1 or 2, the control circuit discharges the accumulated charge in a period. An electronic still camera characterized in that, after the imaging surface is shielded from light, accumulated charges in all vertical transfer paths are discharged all at once.