JPS59156005A - Amplifier circuit for high frequency detection output circuit - Google Patents

Amplifier circuit for high frequency detection output circuit

Info

Publication number
JPS59156005A
JPS59156005A JP58029967A JP2996783A JPS59156005A JP S59156005 A JPS59156005 A JP S59156005A JP 58029967 A JP58029967 A JP 58029967A JP 2996783 A JP2996783 A JP 2996783A JP S59156005 A JPS59156005 A JP S59156005A
Authority
JP
Japan
Prior art keywords
capacitor
circuit
transistor
transistors
carrier signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58029967A
Other languages
Japanese (ja)
Other versions
JPH0119767B2 (en
Inventor
Junichi Hikita
純一 疋田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP58029967A priority Critical patent/JPS59156005A/en
Publication of JPS59156005A publication Critical patent/JPS59156005A/en
Publication of JPH0119767B2 publication Critical patent/JPH0119767B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/14Demodulation of amplitude-modulated oscillations by means of non-linear elements having more than two poles
    • H03D1/18Demodulation of amplitude-modulated oscillations by means of non-linear elements having more than two poles of semiconductor devices

Abstract

PURPOSE:To attain circuit integration of all circuit elements without mounting externally a capacitor by designing the circuit so that a carrier signal is eliminated sufficiently by a small capacitance of a capacitor. CONSTITUTION:One electrode of a capacitor C' to eliminate a carrier signal is connected to a connecting point of both bases of the 1st and 2nd transistors (TR) T1, T2. The other electrode is connected to a power supply Vcc. In the constitution above, the 3rd TRT3 and the capacitor C' form a peak detecting circuit. When a signal charged in the capacitor C' is discharged, the 1st and 2nd TRs T1, T2 are included in the path of the discharge. Thus, even if a charging speed to this capacitor C' is increased by reducing the capacitance of the capacitor C' to a very small value, since the discharge speed is nearly a base current value of the 1st and 2nd TRs T1, T2, the discharge speed becomes very low. Then, since the peak detecting circuit is constituted by the 3rd TRT3 and the capacitor C', the carrier signal is eliminated.

Description

【発明の詳細な説明】 本発明は、高周波用ICの出力段に用いられる増幅回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier circuit used in an output stage of a high frequency IC.

一般に、FMのクオードラチュア検波やピーク検波の電
流出力は、電源の変動の影響を軽減するために、第1図
に示すような増幅回路により出力段のところで電流反転
される。第1図において、■は電流信号源、T1.T2
は電流反転用トランジスタ、T3は前記トランジスタT
1.T2のベース電流補正用トランジスタ、OUTは出
方端子、kは抵抗、Cはキャリア信号を落とすためのコ
ンデンサである。ところで、この回路では、コンデンサ
Cを除いて、IC化することかできるが、コンデンサC
の場合は例えばクオードラチュア検波における21゜4
MHzのキャリア信号を落とすために大きな容量が必要
となり、このためIC化することができず外付けされる
ようになっている。
Generally, the current output of FM quadrature detection or peak detection is inverted at the output stage by an amplifier circuit as shown in FIG. 1 in order to reduce the influence of power supply fluctuations. In FIG. 1, ■ is a current signal source, T1. T2
is a current reversal transistor, T3 is the transistor T
1. T2 is a base current correction transistor, OUT is an output terminal, k is a resistor, and C is a capacitor for dropping a carrier signal. By the way, this circuit can be implemented as an IC except for capacitor C, but capacitor C
For example, in the case of 21°4 in quadrature detection
A large capacitance is required to drop the MHz carrier signal, and for this reason it cannot be integrated into an IC and is instead attached externally.

本発明は、小容量のコンデンサで充分にキャリア信号を
落とすことができるようにすることによりコンデンサを
外付けすることなく回路要素全体をI−C化することが
できる高周波検波出方回路用増幅回路を提供することを
目的とする。
The present invention provides an amplifier circuit for a high-frequency detection circuit that allows the entire circuit element to be integrated into an IC without externally attaching a capacitor by sufficiently dropping a carrier signal with a small-capacity capacitor. The purpose is to provide

以下、本発明を図面に示す実施例に基ついて詳細に説明
する。
Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.

第2図はこの実施例の電気回路図である。この実施例の
高周波検波出力回路用増幅回路は、導電型式が同一でか
つエミッタ接地型の電流反転用の第1.第2トランジス
タT□、T2を有する。両トランジスタ’r1.−r2
のベースは互いに接続される。両トランジスタT1.+
T2と導電型式が同一でコレクタ接地型のベース電流補
正用の第3トランジスタT3のベースおよびエミッタは
それぞれ第1トランジスタT1のコレクタおよびベース
に接続される。■は電源信号源、kは抵抗、OUTは出
力端子である。
FIG. 2 is an electrical circuit diagram of this embodiment. The amplifier circuit for the high frequency detection output circuit of this embodiment has the same conductivity type and a common emitter type current reversal first amplifier circuit. It has second transistors T□ and T2. Both transistors 'r1. −r2
The bases of are connected to each other. Both transistors T1. +
The base and emitter of the third transistor T3 for base current correction, which has the same conductivity type as T2 and has a common collector type, are connected to the collector and base of the first transistor T1, respectively. (2) is a power signal source, k is a resistor, and OUT is an output terminal.

第1.第2トランジスタT□、T2の互いのベースの接
続点には、キャリア信号を落とすためのコンデンサC′
の一方の極が接続される。コンデンサC′の他方の極は
電源Vccに接続される。このような構成において、第
3トランジスタT3とコンデンサC′とによりピーク検
波回路が形成される。コンデンサC′に充電された信号
がこのコンデンサclカラ放電される場合は、第1.第
2トランジスタT□。
1st. At the connection point between the bases of the second transistors T□ and T2, there is a capacitor C' for dropping the carrier signal.
One pole of is connected. The other pole of capacitor C' is connected to power supply Vcc. In such a configuration, a peak detection circuit is formed by the third transistor T3 and the capacitor C'. When the signal charged in the capacitor C' is discharged from the capacitor cl, the first. Second transistor T□.

T2がその放電の経路に含まれる。このため、コンデン
サC′の容量を非常に小さくすることによりこのコンデ
ンサC′への充電速度を高くしても、その放電速度は第
1.第2トランジスタT、 、T2のベース電流分程度
であるので、非常に低くなる。したがって、第3トラン
ジスタT3とコンデンサCIとによりピーク検波回路か
構成されるので、キャリア信号を落とすことができる。
T2 is included in the path of the discharge. Therefore, even if the charging speed of capacitor C' is increased by making the capacitance of capacitor C' very small, the discharging speed will be 1. Since it is about the same as the base current of the second transistors T, , T2, it becomes very low. Therefore, since a peak detection circuit is formed by the third transistor T3 and the capacitor CI, the carrier signal can be dropped.

第3図は他の実施例の電気回路図であり、第1図、第2
図と対応する部分には同一の符号が付される。この実施
例において注目すべきは第3トランジスタT3のエミッ
タと、第1.第2トランジスタTよ、T2の互いのベー
スの接続点との間に、時定数を調整するための抵抗に′
が設−けられていることである。
FIG. 3 is an electric circuit diagram of another embodiment, and FIG.
Portions corresponding to those in the figure are given the same reference numerals. What should be noted in this embodiment is the emitter of the third transistor T3 and the emitter of the first . A resistor for adjusting the time constant is connected between the second transistor T and the connection point between the bases of T2.
is provided.

第4図は更に他の実施例の電気回路図であり、第1図〜
第3図と対応する部分には同一の符号か付される。この
実施例において注目すべきは、第1、第2hランジスタ
T工、T2の各エミッタと電源Vccとの間に放電時定
数を大きくして更にキャリア信号を落とす効果を高める
抵抗、//、R///か設けられていることである。
FIG. 4 is an electric circuit diagram of still another embodiment, and FIG.
Parts corresponding to those in FIG. 3 are given the same reference numerals. What should be noted in this embodiment is a resistor, //, R, which increases the discharge time constant and further enhances the effect of dropping the carrier signal, between the emitters of the first and second transistors T2 and the power supply Vcc. /// is provided.

第5図は更にまた他の実施例の電気回路図であり、第1
図〜第4図と対応する部分には同一の符号が付される。
FIG. 5 is an electric circuit diagram of yet another embodiment, and the first
Portions corresponding to those in FIGS. 4 to 4 are given the same reference numerals.

この実施例において注目すべきは、コンデンサC//が
第3トランジスタT3のエミッタ・コレクタ間に並列に
接続されていることであり、このコンデンサC″は第3
トランジスタT3と共にピーク検波回路を構成する点は
第2図と同様である。
What should be noted in this embodiment is that a capacitor C// is connected in parallel between the emitter and collector of the third transistor T3;
The configuration of the peak detection circuit together with the transistor T3 is the same as in FIG. 2.

以上のように、本発明によれば、電流反転用の第1.第
2トランジスタの互いのベースの接続点に、コンデンサ
の一方の極を接続し、コンデンサの他方の極を交流的に
接地し、少なくとも前記両トランジスタのベース電流補
正用の第3トランジスタと前記コンデンサとによりピー
ク検波回路を構成したので、このコンデンサが小容量の
ものであっても高調波成分をピーク検波により除去する
ことができる。したがって、このコンデンサが小容量で
あることにより回路要素の全体をIC化することが可能
となる。
As described above, according to the present invention, the first . One pole of a capacitor is connected to the connection point between the bases of the second transistors, the other pole of the capacitor is grounded in an alternating current manner, and at least a third transistor for base current correction of both transistors and the capacitor are connected to each other. Since the peak detection circuit is constructed by the above, harmonic components can be removed by peak detection even if this capacitor has a small capacity. Therefore, since this capacitor has a small capacity, it becomes possible to integrate the entire circuit element into an IC.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の電気回路図、第2図〜第5図は本発明
の各実施例の電気回路図である。 T1.T2.T3・・第1.第2.第3トランジスタ、
C′・・・コンデンサ 特許出願人 ローム株式会社 代理人 弁理士岡田和秀
FIG. 1 is an electric circuit diagram of a conventional example, and FIGS. 2 to 5 are electric circuit diagrams of each embodiment of the present invention. T1. T2. T3... 1st. Second. a third transistor;
C'... Capacitor patent applicant ROHM Co., Ltd. agent Patent attorney Kazuhide Okada

Claims (1)

【特許請求の範囲】[Claims] (1)  導電型式が同一でかつエミッタ接地型の第1
、第2トランジスタを1対有し、前記両トランジスタの
互いのベースを接続し、前記トランジスタと導電型式が
同一でコレクタ接地型の第3トランジスタのベースおよ
びエミッタをそれぞれ第1トランジスタのコレクタおよ
びベースに接続してなる高周波検波出力回路用増幅回路
において、第1、第2トランジスタの互いのベースの接
続点に、コンデンサの一方の極を接続し、コンデンサの
他方の極を交流的に接地し、少なくとも第3トランジス
タとコンデンサとによりピーク検波回路を構成してなる
高周波検波出力回路用増幅回路。
(1) The first type has the same conductivity type and has a grounded emitter.
, has a pair of second transistors, the bases of both transistors are connected to each other, and the base and emitter of a third transistor having the same conductivity type as the transistor and having a common collector type are connected to the collector and base of the first transistor, respectively. In the amplifier circuit for a high frequency detection output circuit, one pole of a capacitor is connected to the connection point between the bases of the first and second transistors, the other pole of the capacitor is grounded in an alternating current manner, and at least An amplifier circuit for a high frequency detection output circuit, which comprises a peak detection circuit formed by a third transistor and a capacitor.
JP58029967A 1983-02-24 1983-02-24 Amplifier circuit for high frequency detection output circuit Granted JPS59156005A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58029967A JPS59156005A (en) 1983-02-24 1983-02-24 Amplifier circuit for high frequency detection output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58029967A JPS59156005A (en) 1983-02-24 1983-02-24 Amplifier circuit for high frequency detection output circuit

Publications (2)

Publication Number Publication Date
JPS59156005A true JPS59156005A (en) 1984-09-05
JPH0119767B2 JPH0119767B2 (en) 1989-04-13

Family

ID=12290735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58029967A Granted JPS59156005A (en) 1983-02-24 1983-02-24 Amplifier circuit for high frequency detection output circuit

Country Status (1)

Country Link
JP (1) JPS59156005A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003012978A1 (en) * 2001-07-30 2003-02-13 Niigata Seimitsu Co., Ltd. Am detection circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003012978A1 (en) * 2001-07-30 2003-02-13 Niigata Seimitsu Co., Ltd. Am detection circuit

Also Published As

Publication number Publication date
JPH0119767B2 (en) 1989-04-13

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