JPH0119767B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier circuit used in the output stage of a high frequency IC.

Generally, the current output of FM quadrature detection or peak detection is inverted at the output stage by an amplifier circuit as shown in FIG. 1 in order to reduce the influence of power supply fluctuations. In Figure 1,
I is a current signal source, T ₁ and T ₂ are transistors for current inversion, T ₃ is a transistor for base current correction of the transistors T ₁ and T ₂ , OUT is an output terminal, R is a resistor, and C is for dropping the carrier signal. It is a capacitor. By the way, this circuit can be implemented as an IC except for capacitor C, but in the case of capacitor C, a large capacitance is required to drop the 21.4MHz carrier signal in quadrature detection, so it is not possible to implement it as an IC. It is becoming more and more common to use external devices.

The present invention provides an amplifier circuit for a high-frequency detection output circuit, in which the entire circuit element can be integrated into an IC without externally attaching a capacitor by sufficiently dropping a carrier signal with a small-capacity capacitor. The purpose is to

Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.

FIG. 2 is an electrical circuit diagram of this embodiment. The high frequency detection output circuit amplifier circuit of this embodiment has first and second current reversal transistors T ₁ and T ₂ of the same conductivity type and grounded emitter type. The bases of both transistors T ₁ and T ₂ are connected to each other.
The base and emitter of the third transistor T ₃ for base current correction, which has the same conductivity type as both transistors T ₁ and T ₂ and has a common collector, are connected to the collector and base of the first transistor T ₁ , respectively. I is a power signal source, R is a resistor, and OUT is an output terminal.

One pole of a capacitor C' for dropping a carrier signal is connected to the connection point between the bases of the first and second transistors T ₁ and T ₂ . capacitor
The other pole of C' is connected to the power supply Vcc. In such a configuration, a peak detection circuit is formed by the third transistor _T3 and the capacitor C'. The signal charged in capacitor C′ is transferred to this capacitor.
When discharging from C', the first and second transistors T ₁ and T ₂ are included in the discharge path. Therefore, even if the charging speed of the capacitor C' is increased by making the capacitance of the capacitor C' very small, the discharging speed of the first and second transistors T ₁ ,
Since it is about the base current of T ₂ , it is extremely low. Therefore, the third transistor _T3 and the capacitor C' constitute a peak detection circuit, so that the carrier signal can be dropped.

FIG. 3 is an electric circuit diagram of another embodiment.
The same reference numerals are given to the parts corresponding to those in FIG. What should be noted in this embodiment is that between the emitter of the third transistor _T3 and the connection point between the bases of the first and second transistors T1 _{and T2} ,
A resistor R' is provided to adjust the time constant.

FIG. 4 is an electric circuit diagram of yet another embodiment,
Portions corresponding to those in FIGS. 1 to 3 are given the same reference numerals. What should be noted in this embodiment is the resistors R'' and R, which increase the discharge time constant and further enhance the effect of dropping the carrier signal between the emitters of the first and second transistors _T1 and _T2 and the power supply Vcc. is provided.

FIG. 5 is an electric circuit diagram of still another embodiment, and parts corresponding to those in FIGS. 1 to 4 are given the same reference numerals. What should be noted in this embodiment is that a capacitor C'' is connected in parallel between the emitter and collector of the third transistor _{T3 ;}
The configuration of the peak detection circuit together with the peak detection circuit is the same as in FIG.

As described above, according to the present invention, one pole of the capacitor is connected to the connection point between the bases of the first and second transistors for current reversal, and the other pole of the capacitor is grounded in an alternating current manner. Since a peak detection circuit is formed by at least the third transistor for base current correction of both transistors and the capacitor, harmonic components can be removed by peak detection even if this capacitor has a small capacity. . Therefore, the small capacitance of this capacitor makes it possible to integrate the entire circuit element into an IC.

[Brief explanation of drawings]

FIG. 1 is an electric circuit diagram of a conventional example, and FIGS. 2 to 5 are electric circuit diagrams of each embodiment of the present invention. T ₁ , T ₂ , T ₃ ...first, second, third transistor, C'...capacitor.

Claims (1)

[Claims] 1 It has a pair of first and second transistors of the same conductivity type and grounded emitter type, the bases of both transistors are connected to each other, and a third transistor of the same conductivity type and common collector type is connected to the bases of the two transistors. Place the base and emitsa in the first position.
In an amplifier circuit for a high-frequency detection output circuit that is connected to the collector and base of a transistor, one pole of a capacitor is connected to the connection point of the bases of the first and second transistors, and the other pole of the capacitor is connected to the base of the first and second transistors. An amplifier circuit for a high-frequency detection output circuit, which is grounded and constitutes a peak detection circuit by at least a third transistor and a capacitor.