JPS59153335A - Receiver for am and fm - Google Patents

Receiver for am and fm

Info

Publication number
JPS59153335A
JPS59153335A JP2820083A JP2820083A JPS59153335A JP S59153335 A JPS59153335 A JP S59153335A JP 2820083 A JP2820083 A JP 2820083A JP 2820083 A JP2820083 A JP 2820083A JP S59153335 A JPS59153335 A JP S59153335A
Authority
JP
Japan
Prior art keywords
output
circuit
capacitor
detector
detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2820083A
Other languages
Japanese (ja)
Other versions
JPH025061B2 (en
Inventor
Junichi Hikita
純一 疋田
Shigeyoshi Hayashi
林 成嘉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2820083A priority Critical patent/JPS59153335A/en
Publication of JPS59153335A publication Critical patent/JPS59153335A/en
Publication of JPH025061B2 publication Critical patent/JPH025061B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D5/00Circuits for demodulating amplitude-modulated or angle-modulated oscillations at will

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE:To simplify the constitution by inserting and coupling a high pass filter comprising a coupling capacitor between an output section of an AM detector and an input section of a stereophonic demodulating circuit so as to reduce the number of capacitors. CONSTITUTION:The capacitor 18 is inserted between the output of an FM detecting circuit 14 and the input of a stereophonic demodulating circuit 6 and they are coupled together. The high-pass filter 22 comprising the capacitor 18 and a resistor 20 is inserted between the output of the AM detecting circuit 16 and the input of the stereo demodulating circuit 6 and they are coupled together. Through the constitution above, only one coupling capacitor is enough as the coupling capacitor.

Description

【発明の詳細な説明】 この発明はAM−FM用受信機に係り、特に、AM・F
M用検波回路の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AM-FM receiver, and particularly to an AM-FM receiver.
This invention relates to improvements in M detection circuits.

第1図は従来のAM−FM用受信機の検波回路部を示し
ている。AM検波出力をFM検波出力と同様にステレオ
復調回路を通してオーディオ信号として取り山ず方式の
ΔM−FM用受信機においては、FM検波器2及びAM
検波器4と、ステレオ復調回路6との間には、容量の異
なる結合コンデンサ8.10が個別に介挿して結合され
、ステレオ復調回路6の出力端子12にはFM検波出力
又はAM検波出力が選択的に取り出しij=するように
成っている。このようにFM検波器2又はAM検波器4
とステレオ復調回路6との間に結合コンデンサ8.10
を個別に挿入するのは、FM検波器2とAM検波器4の
復調周波数特性が異なっているためであり、これらの結
合コンデンサ8.10の容量をC1、C2とすると、F
M検波器2例の容量CIはステレオ復調回路6の入力イ
ンピーダンスが影響しない程度の大きな容量とし、AM
検波器4の側の容量C2は高域通過フィルタを構成する
ので、容量C1より小さな容量(CI >C2)に設定
する必要がある。
FIG. 1 shows a detection circuit section of a conventional AM-FM receiver. In a ΔM-FM receiver that outputs the AM detection output as an audio signal through a stereo demodulation circuit in the same way as the FM detection output, the FM detector 2 and the AM
Coupling capacitors 8 and 10 with different capacities are individually inserted and coupled between the detector 4 and the stereo demodulation circuit 6, and the output terminal 12 of the stereo demodulation circuit 6 receives an FM detection output or an AM detection output. It is configured to selectively take out ij=. In this way, the FM detector 2 or AM detector 4
A coupling capacitor 8.10 is connected between the and the stereo demodulation circuit 6.
are inserted separately because the demodulation frequency characteristics of the FM detector 2 and AM detector 4 are different.If the capacitances of these coupling capacitors 8.10 are C1 and C2, then F
The capacitance CI of the two M detectors is set to be large enough to be unaffected by the input impedance of the stereo demodulation circuit 6.
Since the capacitor C2 on the detector 4 side constitutes a high-pass filter, it needs to be set to a smaller capacitance than the capacitor C1 (CI>C2).

このように結合コンデンサ8.10を個別に挿入するこ
とは、各検波器2.4及びステレオ復調回路6を集積回
路で構成する場合、結合コンデンサ8.10を外付けす
るための端子(ピン)が必要となるとともに、装置その
ものが高価になる等の欠点がある。
Inserting the coupling capacitors 8.10 individually in this way means that when each detector 2.4 and the stereo demodulation circuit 6 are configured with an integrated circuit, the coupling capacitors 8.10 are connected to external terminals (pins). However, there are drawbacks such as the need for additional equipment and the equipment itself being expensive.

この発明は、コンデンサの必要個数を低減し、構成の簡
略化を図ったAM−FM用受信機の提供を目的とする。
An object of the present invention is to provide an AM-FM receiver that reduces the required number of capacitors and has a simplified configuration.

この発明は、AM検波出力をステレオ復調回路を通過さ
せてオーディオ出力として取り出すようにしたAM−F
M用受信機において、FM検波回路の出力81(と前記
ステレオ復調回路の入力部との間にコンデンサを挿入し
て両者間を結合するとともに、AM検波回路の出力部と
前記ステレオ復調回路の入力部との間に前記コンデンサ
を含んで構成される高域フィルタを挿入して両者間を結
合したことを特徴とする。
This invention provides an AM-F in which the AM detection output is passed through a stereo demodulation circuit and extracted as an audio output.
In the M receiver, a capacitor is inserted between the output 81 of the FM detection circuit (and the input section of the stereo demodulation circuit) to couple the two, and the output section of the AM detection circuit and the input section of the stereo demodulation circuit The present invention is characterized in that a high-pass filter including the capacitor is inserted between the capacitor and the capacitor to couple the two.

以下、この発明の実施例を図面を参照して詳細に説明す
る。
Embodiments of the present invention will be described in detail below with reference to the drawings.

第2図はこの発明のAM−FM用受信機の実施例を示し
、第1図の回路と同一部分には同一符号が付しである。
FIG. 2 shows an embodiment of the AM-FM receiver of the present invention, in which the same parts as the circuit of FIG. 1 are given the same reference numerals.

図において、FM検波回路14及びAM検波回路16は
、従来のFM検波器2及びAM検波器4の出力側に出方
直流電位を同一にする出力回路を付加したものである。
In the figure, an FM detection circuit 14 and an AM detection circuit 16 are obtained by adding an output circuit to the output side of the conventional FM detector 2 and AM detector 4 to make the output DC potentials the same.

即ち、このFM検波回路14の出力側とステレオ復調回
路6の入力側との間にtよ−、コンデンサ18が挿入さ
れて両者間が結合されるとともぐこ、AM検波回路16
の出力側とステレオ復調回路6の入力側との間には、前
記コンデンサ1Bと抵抗2oとで構成される高域フィル
タ22が挿入され、両者間が結合されている。
That is, when a capacitor 18 is inserted between the output side of this FM detection circuit 14 and the input side of the stereo demodulation circuit 6 and the two are coupled, the AM detection circuit 16
A high-pass filter 22 composed of the capacitor 1B and a resistor 2o is inserted between the output side of the stereo demodulation circuit 6 and the input side of the stereo demodulation circuit 6, and the two are coupled.

このように構成すれば、結合コンデンサの個数が1個に
なり、従来の結合回路に比較し構成の簡略化を図ること
ができる。また、FM検波回路14の出力側とAM検波
回路16の出力側とは、抵抗20を介して接続されるこ
とがら、集積回路で構成した場合、従来の回路に比較し
その端子(ピン)数を少なく構成できる。特に、抵抗2
oによってFM検波回路14とAM検波回路1Gとの結
合は弱くなり、AM検波時にFM信号の影響を受けるこ
とは無く、また、この逆の場合についても同様である。
With this configuration, the number of coupling capacitors is reduced to one, and the configuration can be simplified compared to a conventional coupling circuit. Furthermore, since the output side of the FM detection circuit 14 and the output side of the AM detection circuit 16 are connected via the resistor 20, the number of terminals (pins) in the case of an integrated circuit is greater than that of a conventional circuit. can be configured with less. In particular, resistance 2
The coupling between the FM detection circuit 14 and the AM detection circuit 1G is weakened by o, so that they are not affected by the FM signal during AM detection, and the same applies to the reverse case.

第3図はこの発明におけるFM検波回路14及びAM検
波回路16の具体的な実施例を示している。図において
、FM検波回路14の入力端子30及びAM検波回路1
6の入力端子32は中間周波増1陥g1(から中間周波
数に変換されたFM信号及びΔM倍信号個別に入力され
ている。
FIG. 3 shows a specific embodiment of the FM detection circuit 14 and AM detection circuit 16 in the present invention. In the figure, the input terminal 30 of the FM detection circuit 14 and the AM detection circuit 1
The input terminal 32 of No. 6 receives an FM signal converted from the intermediate frequency signal g1 (from the intermediate frequency signal G1) and a .DELTA.M multiplied signal.

モート切換回路24はFM検波器2の動作電流を規制す
る定電流源34に接続されたトランジスタ36、AM検
波器4の動作電流を規制する定電流源38に接続された
トランジスタ40のそれぞれのエミッタを共通に接続し
、このエミッタと基準電位点との間に前記各動作電流の
総和を規制する定電流源42を挿入した差動回路によっ
て構成されている。そして、トランジスタ36のベース
には基準バイアス電圧Veを印加する基準バイアス電源
44が接続され、トランジスタ40のベースにはF M
・AM切換のための制御電圧Vcを印加する制御入力端
子46が形成されている。
The mote switching circuit 24 includes the respective emitters of a transistor 36 connected to a constant current source 34 that regulates the operating current of the FM detector 2, and a transistor 40 connected to a constant current source 38 that regulates the operating current of the AM detector 4. are connected in common, and a constant current source 42 is inserted between the emitter and a reference potential point to regulate the sum of the operating currents. A reference bias power supply 44 that applies a reference bias voltage Ve is connected to the base of the transistor 36, and a reference bias power supply 44 that applies a reference bias voltage Ve is connected to the base of the transistor 40.
- A control input terminal 46 is formed to apply a control voltage Vc for AM switching.

また、FM検波器2の出力回路26は、FM検波器2と
駆動電圧Vccが印加される電源端子48との間に、ダ
イオード5o、52が設げられている。各ダイオード5
0.52のカソードにはトランジスタ54.56のベー
スが個別に接続され、ダイオード50及びトランジスタ
56は電流反転回路を構成し、同様に、ダイオード52
及びトランジスタ54も電流反転回路を構成している。
Further, in the output circuit 26 of the FM detector 2, diodes 5o and 52 are provided between the FM detector 2 and a power supply terminal 48 to which the drive voltage Vcc is applied. each diode 5
The bases of transistors 54 and 56 are individually connected to the cathode of 0.52, and the diode 50 and transistor 56 constitute a current inverting circuit;
The transistor 54 also constitutes a current inversion circuit.

各トランジスタ54.56のエミッタは、前記電源端子
48に接続された電源ラインにそ−れぞれ接続され、各
トランジスタ54.56のコレクタと基準電位点との間
にば1−ランリスタ58.6oが挿入されている。1−
ランリスタ58のベース・コレクタ及びトランジスタ6
0のベースは共通化され、トランジスタ58.60ば電
流反転回路を構成している。
The emitter of each transistor 54.56 is connected to the power supply line connected to the power supply terminal 48, and a 1-run lister 58.6o is connected between the collector of each transistor 54.56 and the reference potential point. is inserted. 1-
Base-collector of runlister 58 and transistor 6
The bases of transistors 58 and 60 constitute a current inversion circuit.

一方、出力回路28はダイオード62.64及びトラン
ジスタ66.68.70.72で構成され、その構成は
前記出力回路26と同様である。
On the other hand, the output circuit 28 is composed of diodes 62, 64 and transistors 66, 68, 70, 72, and has the same structure as the output circuit 26.

電源端子73には前記電源端子48と同様の駆動電圧V
ccが印加される。
The power supply terminal 73 is supplied with a drive voltage V similar to that of the power supply terminal 48.
cc is applied.

そして、FM検波回路14の出力端子74は1・ランリ
スタ56.60のコレクタに形成され、他方、AM検波
回路16の出力端子76はトランジスタ68.72のコ
レクタに形成されるとともに、各出力点の間には抵抗7
8.80を介して共通のバイアス用電源82が接続され
ている。
The output terminal 74 of the FM detection circuit 14 is formed at the collector of the 1-run lister 56.60, while the output terminal 76 of the AM detection circuit 16 is formed at the collector of the transistor 68.72, and at each output point. There is resistance 7 between
A common bias power supply 82 is connected via 8.80.

以上の構成において、制御入力端子46に制御電圧Vc
の値をバイアス電源の基準バイアス電圧Vsより高くす
ると、トランジスタ40が動作状態となり、AMM検波
器が動作状態となる。この場合、AMM検波器の出力は
ダイオード62.64及びトランジスタ66.68を介
してトランジスタ70.72に信号電流が流れ、AM検
波出力を出力端子76から取出すことができる。
In the above configuration, the control voltage Vc is applied to the control input terminal 46.
When the value of is made higher than the reference bias voltage Vs of the bias power supply, the transistor 40 becomes active and the AMM detector becomes active. In this case, a signal current flows from the output of the AMM detector to the transistor 70.72 via the diode 62.64 and the transistor 66.68, and the AM detection output can be taken out from the output terminal 76.

また、制御電圧Vcを基準バイアス電圧VBより低下さ
せた場合には、トランジスタ36が動作状態となり、F
MM検波器が動作状態となる。そして、FMM検波器の
出力はダイオード50.52及びトランジスタ54.5
6を介してトランジスタ58.60に流れ込み、電流合
成の結果、出力端子74からFM検波出力を取出すこと
ができる。
Further, when the control voltage Vc is lowered than the reference bias voltage VB, the transistor 36 is activated and the F
The MM detector becomes operational. The output of the FMM detector is then connected to the diode 50.52 and the transistor 54.5.
6 into the transistors 58 and 60, and as a result of current combination, an FM detection output can be taken out from the output terminal 74.

即ち、AM検波出力とFM検波出力とは、信号電流が発
生する場合と発生しない場合とが互いに逆相関係に制御
され、その出力が決定されている。
That is, the AM detection output and the FM detection output are controlled to have an opposite phase relationship when a signal current is generated and when a signal current is not generated, and their outputs are determined.

このような動作状態において、各出力回路26.28の
トランジスタ6o、72のコレクタには、抵抗78.8
0を介して共通のバイアス用電源82から直流バイアス
が与えられ、各出力点は同一の直流レヘルに維持される
。この結果、前記のようにFMモートからAMモード、
又はAMモモ−−からFMモートに切換える場合、直流
電位の変動がないために切換えに伴う異常音の発生、例
えば、ポツプ音の発生を確実に防止することができる。
In such an operating state, a resistor 78.8 is connected to the collector of the transistor 6o, 72 of each output circuit 26.28.
A DC bias is applied from a common bias power supply 82 through the output terminal 0, and each output point is maintained at the same DC level. As a result, as mentioned above, from FM mode to AM mode,
Alternatively, when switching from AM mode to FM mode, since there is no fluctuation in the DC potential, it is possible to reliably prevent the generation of abnormal sounds, such as popping noises, caused by the switching.

このように各出力回路26.28の出力点は共通のバイ
アス用電源82に接続されていることがら、第2図に示
すように、FM検波回路14側の出力部はコンデンサ1
8を介してステレオijj lta回路6に接続すると
ともに、前記AM検波回路16側の出力部は前記コンデ
ンサ18を含む高域フィルタ22を介してステレオ復調
回路6に接続することができる。
Since the output points of each output circuit 26 and 28 are connected to the common bias power supply 82 in this way, as shown in FIG.
8 to the stereo ijj lta circuit 6, and the output section on the AM detection circuit 16 side can be connected to the stereo demodulation circuit 6 via the high-pass filter 22 including the capacitor 18.

また、第4図に示すように、AM検波回路16と高域フ
ィルタ22との間に抵抗84及びコンデンサ86で構成
される低域フィルタ88を挿入しても同様の効果が期待
できる。
Further, as shown in FIG. 4, a similar effect can be expected by inserting a low-pass filter 88 composed of a resistor 84 and a capacitor 86 between the AM detection circuit 16 and the high-pass filter 22.

以上説明したようにこの発明によれば、FM検波回路及
びAM検波回路とステレオ復調回路との結合により、結
合コンデンサを省略し、その構成の簡略化を図ることが
できるとともに、各検波回路の相互干渉をも除くことが
できる。
As explained above, according to the present invention, by coupling the FM detection circuit, the AM detection circuit, and the stereo demodulation circuit, the coupling capacitor can be omitted and the configuration can be simplified. Interference can also be removed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のAM−FM用受信機を示すブロック図、
′!82図はこの発明のAM−FM用受信機の実施例を
示すブロック図、第3図はAM−FM検波回路を示す回
路図、第4図はこの発明の他の実施例を示すブロック図
である。 2・・・F M検波器、4・・・AMM検波器14・・
・F M検波回路、16・・・AM検波回路、18・・
・コンデンサ、22・・・高域フィルタ。 第1図
FIG. 1 is a block diagram showing a conventional AM-FM receiver.
′! FIG. 82 is a block diagram showing an embodiment of the AM-FM receiver of the present invention, FIG. 3 is a circuit diagram showing an AM-FM detection circuit, and FIG. 4 is a block diagram showing another embodiment of the present invention. be. 2...FM detector, 4...AMM detector 14...
・FM detection circuit, 16...AM detection circuit, 18...
・Capacitor, 22...High-pass filter. Figure 1

Claims (1)

【特許請求の範囲】[Claims] AM検波出力をステレオ復調回路を通過させてオーディ
オ山力として取り出すようにしたAM・1” M用受信
機において、FM’検波回路の出力部と前記゛ステレオ
復調回路の入力部との間にコンデンサを挿入して両者間
を結合するとともに、AM検波回路の出力部と前記ステ
レオ復調回路の入力部との間に前記コンデンサを含んで
構成される高域フィルタを挿入して両者間を結合したこ
とを特徴とするへM−FM用受信機。
In an AM/1"M receiver in which the AM detection output is passed through a stereo demodulation circuit and extracted as audio output, a capacitor is installed between the output section of the FM' detection circuit and the input section of the stereo demodulation circuit. A high-pass filter including the capacitor is inserted between the output section of the AM detection circuit and the input section of the stereo demodulation circuit to couple the two. A receiver for M-FM characterized by the following.
JP2820083A 1983-02-21 1983-02-21 Receiver for am and fm Granted JPS59153335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2820083A JPS59153335A (en) 1983-02-21 1983-02-21 Receiver for am and fm

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2820083A JPS59153335A (en) 1983-02-21 1983-02-21 Receiver for am and fm

Publications (2)

Publication Number Publication Date
JPS59153335A true JPS59153335A (en) 1984-09-01
JPH025061B2 JPH025061B2 (en) 1990-01-31

Family

ID=12242024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2820083A Granted JPS59153335A (en) 1983-02-21 1983-02-21 Receiver for am and fm

Country Status (1)

Country Link
JP (1) JPS59153335A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199138A (en) * 1992-02-10 1993-08-06 Chiyuunaa Kk Fm radio receiver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5215119U (en) * 1975-07-18 1977-02-02

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5215119B2 (en) * 1973-10-01 1977-04-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5215119U (en) * 1975-07-18 1977-02-02

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05199138A (en) * 1992-02-10 1993-08-06 Chiyuunaa Kk Fm radio receiver

Also Published As

Publication number Publication date
JPH025061B2 (en) 1990-01-31

Similar Documents

Publication Publication Date Title
US4608502A (en) I2 L gate circuit arrangement having a switchable current source
US4659949A (en) Phase-locked loop circuit
US4298884A (en) Chroma amplifier and color killer
JPS6232714A (en) Offset voltage correcting circuit
US4602172A (en) High input impedance circuit
US4054839A (en) Balanced synchronous detector circuit
US4621206A (en) Level detector
JPS59153335A (en) Receiver for am and fm
JPH0115169B2 (en)
JPS58147215A (en) Automatic gain controller
JPS5828776B2 (en) Output control circuit
US4544895A (en) Audio-amplifier arrangement
US4283793A (en) Muting signal generation circuit for an FM receiver
US4791325A (en) Class B clamp circuit
JP3479334B2 (en) Circuit for stereo and dual audio signal recognition
JP3179838B2 (en) Noise detection circuit
JPH0519321B2 (en)
US4751735A (en) Stereo demodulation device
US3512098A (en) Transistor electrical circuit with collector voltage stabilization
JPS59153336A (en) Receiver for am and fm
JPS61147611A (en) Agc circuit
JPS6337528B2 (en)
JPS5934023B2 (en) receiver
JPH0451787B2 (en)
JPH0413858Y2 (en)