JPS59155715A - Digital type multi-shaft position and speed detecting apparatus - Google Patents

Abstract

PURPOSE:To make it possible to count plural kinds output pulses by one apparatus and to bring a multi-shaft position and speed detecting circuit to a simple one, by a method wherein the output state of each pulse generator is judged at every scheduled time and each outpt pulse thereof is counted while the counted value of a clock pulse is also latched at every output of the pulse generator. CONSTITUTION:Direction discriminating circuits 13-15 receive the supply of the two-phase output pulses 9A, 9B-11A, 11B generated from pulse generators 9- 11 and detect the rotary direction of each electric motor. The rotary direction signal of each electric motor is selected on the basis of the shaft indicating value generated from a shaft indicating circuit 16 by a multiplexer 17 every when a clock CLK for changing over shaft indication is inputted and supplied to a count circuit 18. The count circuit 18 adds 1 to the content of the predetermined address of the memory 20 indicated when an EN signal is outputted by the shaft indicating circuit 16 when the rotary direction of the shaft is positive and, to the contrary, subtract 1 therefrom when reverse. When the EN signal is not outputted, the count circuit 18 does not any operation.

Description

Detailed Description of the Invention (Field of Application) The present invention relates to a digital multi-axis position and speed detection device for detecting the position and speed of a moving body such as a rotating body, and particularly relates to a digital multi-axis position and speed detection device for detecting the position and speed of a moving body such as a rotating body. The present invention relates to a digital multi-axis position and speed detection device suitable for a digital multi-axis position and speed control device that simultaneously controls moving objects.

(Prior Art) For example, to digitally detect the position and speed of an electric motor, a pulse generator that generates p pulses per revolution is often used.

That is, in detecting the position, since the moving distance can be represented by the pulse count value of this pulse generator, there is a method of using this pulse count value as the position detection value.

Further, as a method for detecting speed 18' using this pulse generator, the number of output pulses M1 of the pulse generator within a certain counting time Td and the counting time Td
Using the number of clock pulses M2 within
It is known to obtain the gear speed change detection value Nf using equation 1).

1 Nf = K, □ ・・・・・・・・・・・・・
Melody...+112 However, K1 is a constant circuit for speed detection using method 1 above, and consists of dedicated hardware for counting each pulse and determining the counting time Td. ) has been proposed in which the calculation of the equation is processed by the software of a microcombinator.

However, when it is necessary to detect the speed of multiple electric motors, such as in robots and NC machine tools, a counter that counts the output pulses of the pulse generator, a counter that counts clock pulses, and a peripheral dedicated The hardware is
A plurality of electric motors are required depending on the number of electric motors.

For this reason, the conventional method has the disadvantage that the hardware becomes extremely large-scale, large-sized, and expensive.

(Purpose) The purpose of the present invention is to simplify the hardware by sharing the counter function for counting output pulses from a plurality of pulse generators and the counter function for counting Glock pulses on each axis. In addition, by synchronizing the count value of the output pulses of each pulse generator and the count value of clock pulses in hardware,9. A digital multi-axis position system that allows a microcomputer to process the position and/or speed detection of a moving object, such as an electric motor, at any timing by controlling the timing of each measurement so that the An object of the present invention is to provide a speed detection device.

(Overview) In order to achieve the above object, the present invention sequentially selects a plurality of pulse generators at a frequency higher than the highest frequency of each output pulse of the plurality of pulse generators, and Depending on the state of the output pulses of each pulse generator, the contents of the memory function that stores the output pulse count value of the selected pulse generator are stored →-1. -1 or by keeping it at the same value, it becomes the output pulse count value of the selected pulse generator.

Once an arbitrary pulse generator generates an output pulse, that pulse generator is identified and the count value of a counter for counting tarok pulses is stored in a predetermined storage function.

When the microcomputer detects, for example, the speed of a moving object such as the Nth electric motor at an arbitrary point in time, the contents of the memory function MAN(il and the contents MBN (11) of the memory function in which the count value of clock pulses is stored, and also read out the respective previous values MAN (1-1
), MBN(1-1), the speed NfN of the Nth electric motor at any time is detected using the following equation.

However, K2 is a constant, and when detecting the position, the output pulse count value MAN
(1) (This is a multiplication by a predetermined constant.

(Example) Examples according to the present invention will be described below with reference to the drawings. FIG. 1 is a schematic block diagram of an embodiment in which the position and speed detection device of the present invention is applied to three motor speed control devices.

The microcomputer 2 receives speed command values Nc from the speed command circuit 1 for the three electric motors 6, 7.8.
, r Nc, , Nc, are input.

On the other hand, the pulse generators 9, 10.11 output pulse trains of frequencies proportional to the rotational speed of the corresponding electric motors 6, 7.8, respectively.

The output pulses of the pulse generators 9, 10, 11 connected to each electric motor are supplied to a position and speed detection circuit 12 according to the invention and counted there. At this time, tarok pulses are counted at the same time.

The microcomputer 2 takes in the pulse count value and the clock pulse count value, and generates a speed detection value Nf,
, Nf2. Nf is calculated, and furthermore, based on these values, control signals for operating the corresponding drive circuits 3, 4 and 5 are output.

The drive circuits 3, 4.5 are constituted by, for example, a power semiconductor element and its drive section, and rotate the electric motors 6, 7.8 at a desired speed in response to control signals from the microcomputer 2.

Note that the position and speed detection circuit 12 includes pulse generators 9 and 1.
The output pulse of 0.11 is converted into information for the microcomputer 2 to calculate a detected speed value.

A configuration diagram of this position and speed detection circuit 12 is shown in FIG.

In the figures, the same reference numerals as in FIGS. 2 and 1 represent the same or equivalent parts.

The direction determining circuits 13, 14.15 may be of known type, and are supplied with the two-phase output pulses 9A, 9B, IOA, IOB, IIA, IIB generated from the pulse generators 9, 10.11, and are processed using known methods. Therefore, the rotation direction of each electric motor is detected.

The rotation direction signal of each electric motor is selected by the multiplexer 17 based on the axis designation value generated by the axis designation circuit 16 every time the Glock (CLK) for switching the axis designation is input, and is sent to the counting circuit 1B. Supplied. Note that the axis designation values are periodically switched, and each axis is designated in a predetermined order. Further, the frequency divider 56 divides the frequency of the output CK of the reference oscillator to generate the clock CLK.

The multiplexer 17 is a DIR (addition/subtraction designation) for the counting circuit 18 to increment the count value by +1 or -1 depending on whether the designated rotation direction of each axis is forward or backward.
It is output to the counting circuit 18 as a signal.

This counting circuit 18 is in a state where the output signal EN is being outputted from the pulse synchronization circuit 19, as will be described in detail later.
In other words, it operates only when a certain axis is specified and the pulse generator (either 9°, 10, or 11) corresponding to that axis is outputting a pulse.

In other words, the counting circuit 18 selects the memory 20 specified by the axis specifying circuit 16 when the EN signal is output.
The contents of the predetermined address (accumulated value of output pulses corresponding to the relevant axis, when the rotation direction of the relevant axis is forward rotation (+
1) and, conversely, (-1) in the case of a reversal.

Further, when the ENlin signal is not output, this counting circuit 18 does not perform any operation.

Therefore, the content of said address in the memory 20 always corresponds to the accumulated value of the output pulses corresponding to each of the pulse generators 9, 10.11.

On the other hand, the clock pulses output by the clock pulse generator 21 are constantly counted by the clock counter 22. The count value is the pulse generator 9, 10.11
output pulses 9B, IOB, IIB (of course, 9A
, 10A, 11A) is output, it is held in a latch provided in the latch circuit 23 corresponding to each pulse generator.

Furthermore, the gate signal of the latch circuit 23 is the output signal T, )II, LH2, LH3 of the microcomputer 2, and the output pulse 9B of each pulse generator 9, 10.11,
IOB.

The configuration is such that it is obtained by supplying it as inputs to OR circuits 24, 25, and 26, respectively, along with IIB.

Therefore, the microcomputer 2 can take in the count value of the counter 22, which is the count value of clock pulses, by outputting any one of the gate signals LHI, LH2, and LH3 at any time.

In addition, in order to prevent detection errors from occurring, the cycle of switching the axis designation should be set to a value smaller than the quotient of the expected minimum cycle of the output pulse divided by the number of rotating axes to be measured. must be selected.

Next, the operation of the speed detection circuit 12 having the configuration shown in FIG. 2 will be explained using the time chart shown in FIG. 3.

The axis designation circuit 16 synchronizes with the tally clock CLKIζ input from the frequency divider 56, and sets the axis designation value to, for example, 1.2.3.
Switch periodically and sequentially in this order.

Based on this axis designation value, the multiplexer 17 outputs a rotation direction signal of the motor with the designated axis as a DIR (addition/subtraction designation) signal.

In addition, in Figure @3, the rotation direction of the electric motor corresponding to axis specification values 1 and 3 is the positive direction (or forward direction), and the rotation direction of the electric motor corresponding to axis specification value 2 is the opposite direction. is taken as an example.

This DIR signal and the signal EN that operates the counting circuit 18 and memory 20 cause each pulse generator 9.10.1 to
1 output pulse count MA 1 , MA 2 , M
A3 changes at the timing shown in the figure.

That is, when the EN signal is output and the axis designation signal is established, and the DIR signal is at a high level, - that is, if the rotation of the corresponding axis is in the positive direction, the axis designation value t at that time corresponds to The contents of the memory 20 are incremented by (+1). Conversely, when the DIR signal is at a low level - that is, when the rotation of the corresponding axis is in the opposite direction, the above content becomes (-1).
Add.

On the other hand, the clock pulse count values MBI and MB2.

Mn2 is stored in a latch provided corresponding to each axis in the latch circuit 23 in synchronization with each rise of the output pulses 9B, IOB, 11B of the pulse generators 9, 10.11.

With this configuration, the counter function that counts the output pulses of the pulse generator and the glock pulse can be
The counter function that counts t also works for multiple @11.
It can be composed of one wish.

Therefore, in addition to simplifying the circuit configuration, at any time I, the memory 20 and latch circuit 23 contain the output pulse count value of each pulse generator and the output pulse count value synchronized therewith (that is, the same as the output pulse count time point). The count value of the clock pulse (at time 1) can be stored for each target axis.

Therefore, by using both counts, the microcomputer 2 can detect the speed of any motor at any time according to equation (1) above.

FIG. 4 shows a processing flowchart of the microcomputer 2 when speed detection is performed using the IC 1 of the present invention, and will be described below.

The microcomputer 2 takes in the specified value N of the axis to be detected in step 30 by accepting the interrupt.

Next, in step 31f, the Nth
Take in the pulse count value MA7i1 of the axis.

In step 32, the previous increase 9 inclusive value MAN(1
-1), the difference between the previous and current output pulse count values of the pulse generator M 8N = MAN fi) - MAN (11) is calculated.

At step 331, it is determined whether the values of M and N are positive or negative, and if MllN is not O, the process proceeds to step 34.

In step 34, the clock pulse count value MBN (1) of the Nth axis held by the latch circuit 231 is taken in.

In step 35, similarly, the previous clock pulse count value M stored in the memory of the microcomputer 2 is
Using BN(1-1), calculate the difference between the previous time and this time, M4N-MBN(11-MBN(1-1)).

In step 36, the count value NAN(11, MBN(i)) of each pulse newly imported this time is stored in a predetermined memory in the microcomputer 2 as the previous value for the next processing. At the same time, the difference M8N between the output pulse count values is stored in a predetermined memory.

In step 37, the speed of the Nth axis NfN-K,・MB/M4 Calculate.

In step 38, the speed detection value N obtained in the previous step is
fN is stored in a predetermined memory.

With the above steps, the speed detection process ends.

Note that if the speed of the electric motor designated as a detection target falls below a predetermined value, the pulse generator may not output pulses while the microcomputer 2 accepts an interrupt.

In that case, the difference M3N becomes 0, so when the microcomputer 2 detects the speed, the above-described process cannot obtain a correct detected value.

Therefore, when this situation occurs, step 3
The process moves from step 3 to step 39. In step 39,
The difference M8N obtained in step 32 in the previous process is read from a predetermined memory as the current difference, N.

In step 40, the signal LJ(N) is output, and the count value of the clock counter 22 at that point is calculated by the latch circuit 2.
Hold it at 3.

Thereafter, in step 41, the latch circuit 23 outputs the clock pulse count value MBNO of the currently specified N-axis.
Incorporate.

In step 42, the difference M from the previous pulse count value. = MB711-MBN(1-1) is calculated.

In step 43, the pulse count value M4N is set to the previous M, N
and M4o, and the process moves to step 36.

Thereafter, the speed detection value NfN is determined through the processes of steps 36 to 38 described above.

Processing at low speeds as described above is performed until pulses are output from the pulse generator connected to the specified motor.
The process is then executed again, but the predicted value is obtained as the speed detection value during this time.

Then, an accurate speed detection value can be obtained at the time when a pulse is output from the pulse generator.

The details of the pulse synchronization circuit 19 and the counting circuit 18 in FIG. 2 ζζ will be explained below.

FIG. 5 shows a block diagram of the pulse synchronization circuit 19, and FIG. 6 shows a time chart for one axis to explain the operation of FIG. 5. Note that this pulse synchronization circuit is the same for all three axes, so only one axis will be described.

The decoder 50 receives the axis designation value “1” from the axis designation circuit 16.
In response to this, an axis select signal 81 (which becomes low level when selected) is output. flip flop 53
As is clear from what will be described later, the pulse generator 9 stores the output pulse 9B of the pulse generator 9, and is reset at the end of the axis designation period for the relevant axis, that is, in synchronization with the rise of the select signal S1. .

In addition, the EN signal for operating the counting circuit 18 and the memory 20, that is, the output of the pulse synchronization circuit, is output at the time when the select signal S1 is output (low level).
When the flip-flop 53 stores a pulse (when its Q output is 1''), the output FQ of the AND circuit 54
I becomes high level, and this is outputted via the OR circuit 55.

If the output pulse 9B of the pulse generator is output (rises) during the axis specification period, as at point A shown in Figure 6, the EN signal will be correctly output during the axis specification period. There is a risk that it will not be possible.

As a countermeasure against this, in this embodiment, when the select signal S1 and the output FQI of the flip-flop 53 are both at low level, the output of the AND circuit 52 is caused to rise by the inverted signals of these signals. As a result, the gate signal G1 of the gate circuit 51 is set to high level, and the output pulse 9B of the pulse generator 9 is masked.

That is, it prevents the output pulse 9B from being supplied to the set input of the flip 70 knob 53 and prevents its output FQI from reaching 1''.The output pulse 9B of the pulse generator 9 masked as described above is The information is stored in the flip-flop 53 at the end of this axis designation period (at time C in FIG. 6).

That is, at time point C when the axis designation period for one axis ends, the axis select signal S1 rises, and the gate signal G1, which is the output of the AND circuit 52, becomes low level.

Therefore, the output pulse 9B causes the 7 lip flops 5
3 is set, and its output FQI becomes 1''.

The information on the output pulse 9B stored as described above is
It will be reflected at point B during the next axis designation period for the relevant axis. That is, the EN signal is output and counting is performed.

With such a circuit configuration, the information of the pulse generator output is correctly reflected in the output during the period when that axis is selected.

Next, a counting circuit 1 that counts the output pulses of the pulse generator
8 is shown in detail in FIG. 7, and a time chart explaining the operation of FIG. 7 is shown in FIG.

In this circuit, the operation of each part is controlled by the reference clock α and the outputs obtained by dividing it into 1/2 and 1/4 by the frequency dividing circuit 56.
And synchronization is achieved by the output CLK which is frequency-divided by 1/8.

First, when the RD (read) signal is output from the AND circuit 64, the memory 20 stores the content MA of the address corresponding to the axle weight determination output of the axle weight determination circuit 16 (that is, the accumulated value up to that time) into the adder. 59.

The five adders are DTTl indicating the direction of rotation of the specified axis.
The value of either (+1) data 57 or (-1) data 58 selected by the t signal is added to the output data MA of the memory 20 read as described in Ail, and the result is output to the latch circuit 60. do.

The latch circuit 60 receives the ST output from the AND circuit 61.
The data added by the adder 59 according to the B signal (i.e.
(updated cumulative value) is retained.

Thereafter, the latch circuit 60 receives the WE from the AND circuit 63.
(Write) signal causes the stored data to be transferred to the memory 20.
Output for.

The memory 20 stores the data thus output from the latch circuit 60 in the axis weight determining circuit 16 during the WE period.
It is stored in the address corresponding to the axis weight fixed output value. This completes the counting of the output pulses of the pulse generator with the axis weight determined.

Note that various signals for the memory 20 and the latch circuit 60 are generated by AND circuits 61, 62, 63, and 64 at timings as shown in FIG.

Moreover, as is clear from FIG. 7, RD and WE.

Each signal such as STB is not generated when the EN signal, which is the output of the pulse synchronization circuit 19, is not output. Therefore, if there is no output from the pulse generator corresponding to the designated axis, the above-described operation for updating the contents of the memory 20 is not performed. Therefore, the number of pulses will be correctly stored in the memory 20.

Next, details of another specific example of the counting circuit 18 are shown in FIG. 9, and a time chart explaining the operation of FIG. 9 is shown in FIG.
Shown in Figure 0. In addition, Fig. 9 and Fig. 7, Fig. 10 and Fig. 8
Blocks with the same symbols in the diagram perform the same operations, and
Signals with the same name are output at the same timing.

First, the memory 20 outputs the content MA of the address corresponding to the axle weight set value outputted by the axle weight setting circuit 16 to the up/down counter 68 during the output period of the RD signal.

When the up/down counter 68 receives a PR (preset) signal supplied from the AND circuit 67, it presets this data into the up/down counter 68. After that, the STB sent from the AND circuit 61
In response to the DIR signal, the content of the memory 20 - that is, the value preset as described above, is changed to 1'' in response to the DIR signal.
Only count up or count down.

Such switching between up-counting and down-counting is performed by supplying the DIR signal and STB signal to AND circuits 65 and 66.

The updated output of the up/down counter 68 is
The up-counted or down-counted value is input to the buffer circuit 69. The WE damage signal is then sent to the memory 20 and stored as a new cumulative value at the address designated by the axis weight determining circuit 16.

Note that various signals such as RD, WE, PR, and STB to the memory 20, up/down counter 68, and buffer circuit 69 are generated during the period when the EN signal is output, as shown in FIG.

By configuring the circuit that counts the output pulses of the pulse generator using the method described in detail above, the counting function that counts the output pulses of multiple axes can be configured with a single unit. become.

Therefore, the circuit configuration can be simplified.

When the speed detection circuit is configured as described above, when the microcomputer 2 goes to read the contents of the memory 20 while the counting circuit 18 is reading or writing to the memory 20, the memory There is a problem in that the contents of 20 are destroyed, making it impossible to correctly count the output pulses of the pulse generator.

A circuit for avoiding such a situation is shown in Fig. 11.
In addition, the time chart explaining the operation in FIG.
Shown in Figure 2.

It is assumed that the @j number circuit 18 is in an operable state at a time A when the microcomputer 2 outputs (falls) a read signal μRI for reading the contents of the memory 20.

Under this assumption, the gate circuit 75 that controls the EN signal
Since the gate signal ENG of is at a high level, the HLD (hold) output of the AND circuit 74 is at a high level. As a result, the operation of the microcomputer 2 is stopped.

Thereafter, the time point B1 when the operation for the counting circuit 18 is completed
In other words, when the CLK signal falls, l'! The gate signal ENG which is the Q output of the flip-flop 71
becomes low level. This closes the gate circuit 75 and stops the operation of the counting circuit 18.

First, because the gate signal ENG becomes low level,
The output of the AND circuit 74, that is, the signal HLD for stopping the microcomputer 2 also becomes low level. Therefore, the microcomputer 2 can read the contents of the memory 20.

Also, at the same time point B, the input signal μ of the AND circuit 73
Since both RD and ENG become low level, the output of the AND circuit 73 becomes high level.

As a result, the gate circuit 7 that controls the reference clock CK
2 is closed.

Therefore, the clock CK is no longer input to the frequency dividing circuit 56, and the CLK signal is also no longer output. Therefore, all output pulse counting functions of the pulse generator including the axis weight determining circuit 16 are stopped.

Thereafter, at time C when the microcomputer 2 completes the operation on the memory 20 and the read signal μRD rises, the one-off print circuit 70 outputs a PR8 (preset) signal to the flip 70 knob 71.

As a result, the Q output signal ENG of 7 lips 70 tubes 71
becomes high level, and the entire circuit of FIG. 11 returns to its original state Iζ.

By configuring as described above, even if the microcomputer 2 goes to read the contents of the memory 20 at an appropriate time, the output pulse count value of the pulse generator will not be corrupted.

In addition, the pulse counting function can be stopped while the microcombi counter 2 is importing the contents of the memory 20, and the counting function can be restored immediately when the microcomputer operation is completed. Delays can be minimized.

(Effects) As is clear from the above description, according to the present invention, the output state of each pulse generator is determined at each scheduled time, each output pulse is counted, and the counted value of the clock pulse is also calculated. Since each output of the pulse generator is latched, multiple types of output pulses can be counted with one device, and a multi-axis position and speed detection circuit can be realized with a simple circuit. .

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram when the multi-axis position and speed detection device of the present invention is applied to three-axis motor speed control, and FIG. 2 shows the configuration of the multi-axis position and speed detection device of the present invention. The block diagram, FIG. 3 is a time chart for explaining the operation of FIG. 2, and FIG. 4 is a process when a microcomputer performs speed detection using the multi-axis position and speed detection device of the present invention. A time chart showing the procedure, FIG. 5 is a detailed block diagram of the pulse synchronization circuit in FIG. 2, and FIG. 6 is a detailed block diagram of the pulse synchronization circuit in FIG.
Time chart 1 for explaining the operation of FIG. 5, FIG. 7 is a detailed block diagram of a specific example of the counting circuit in FIG. 2, and FIG. 8 is a time chart for explaining the operation of FIG. 9 is a detailed block diagram of another specific example of the divisor circuit in FIG. 2, FIG. 10 is a time chart 1 for explaining the operation of FIG. 9, and FIG. FIG. 12, which is a block diagram of a circuit for determining the timing at which the computer reads out the pulse count value, is a time chart for explaining the operation of FIG. 11. 1... Speed command circuit, 2... Macro computer, 3.4.5... Drive circuit, 6, 7.8... Electric motor, 9.10.11... Pulse generator , 12... Multi-axis position and speed detection circuit, 13, 14. 15... Direction discrimination circuit, 16... Axis weight determination circuit, 17... Multiplexer, 18... Group number circuit, 19... Synchronization circuit, 2
0...Memory, 21...Clock pulse generation circuit,
22...Counter, 23...Latch circuit, 50...
...Decoder, 53...Flip-flop, 56...
- Branch circuit, 57... addition data, 58... subtraction data, 59... adder, 60... latch, 68...
・Up/down counter, 69...Buffer circuit, 7
0... One-shot circuit, 71... Flip-flop agent Michihito Hiraki, patent attorney Figure 1 Figure 8 MA Figure 9

Claims (2)

[Claims] (1) A moving body with a drive system for multiple axes, with multiple pulse generators installed corresponding to each axis to generate pulses according to the travel distance of each axis, and a plurality of pulse generators that generate pulses according to the travel distance of each axis. a clock pulse generator that generates a constant frequency higher than the output pulse frequency of the pulse generator; an axis designation circuit that sequentially selects and designates the plurality of pulse generators; and the movement direction determination. Based on the output of the means,
A pulse counting circuit that adds and subtracts the output pulses of the specified pulse generator, and a count value of the pulse counting circuit,
a first storage means for storing the clock pulses for each axis; a clock counter for counting the glock pulse; a second storage means for storing the counted value of the clock counter for each axis; In a digital multi-axis position and speed detection device comprising calculation means for digitally calculating the position and speed of each axis using the stored contents of the second storage means, the second storage means is configured to detect each pulse Every time a pulse is output from the device, the count value of the clock counter is stored in a predetermined area for each axis, while the calculation means stores the count value in the first storage means and the second storage means. A digital device characterized in that the output pulse count value and clock count value for each axis are retrieved at an arbitrary time and are used to calculate the position and speed of a desired axis. Multi-axis position and speed detection device. (2) The pulse counting circuit applies the count value stored at the address corresponding to the axis designated by the axis designation circuit of the first storage means to the output of the movement direction means within a certain axis designation period. Accordingly, there is provided a patented digital multifunction device characterized by comprising an adder for adding and subtracting a predetermined number, and means for storing the addition and subtraction results of the adder again in the address of the first storage means. Axis position and speed detection device.