JPS59153471A - Output voltage variation preventing device for inverter power source - Google Patents

Output voltage variation preventing device for inverter power source

Info

Publication number
JPS59153471A
JPS59153471A JP58028142A JP2814283A JPS59153471A JP S59153471 A JPS59153471 A JP S59153471A JP 58028142 A JP58028142 A JP 58028142A JP 2814283 A JP2814283 A JP 2814283A JP S59153471 A JPS59153471 A JP S59153471A
Authority
JP
Japan
Prior art keywords
output
power supply
commercial power
divider
power source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58028142A
Other languages
Japanese (ja)
Inventor
Yoshifumi Yorizane
頼実 芳文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Life Solutions Ikeda Electric Co Ltd
Original Assignee
Ikeda Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ikeda Electric Co Ltd filed Critical Ikeda Electric Co Ltd
Priority to JP58028142A priority Critical patent/JPS59153471A/en
Publication of JPS59153471A publication Critical patent/JPS59153471A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

PURPOSE:To stabilize the output with a simple circuit configuration by bringing the output phase of a frequency divider which produces an output to an inverter in coincidence with that of a commercial power source. CONSTITUTION:The output of an oscillator having a crystal vibrator 15 and NOT gates 16, 17, etc. is frequency-divided by a frequency divider 19, and fed through a NOT circuit 28 to an inverter. The output of the divider 19 and the output of a commercial power source 11 are phase-detected by an AND gate 23, and a transistor 24 is controlled ON or OFF by the output. When the phases of the outputs of the power source 11 and the divider 19 coincide, a reset pulse is applied to the divider 19, which always produces an output waveform synchronized with the power source 11.

Description

【発明の詳細な説明】 本発明は、インパーク電源装置の出力電圧変動防止装置
に関し、商用電源に同期してインパーク部を動作させ、
出力電圧の変11jを防止することを目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an output voltage fluctuation prevention device for an impark power supply device, which operates an impark section in synchronization with a commercial power supply,
The purpose is to prevent changes 11j in the output voltage.

第1図は、従来のインパーク電源装置を示し、11)は
交流電源、+21 +31はトランス、(4)は整流回
路、(5)はコイル、(6)はコンデンサ、(7)は電
池、(8)は切換スイッチ、(9)はインパーク部−で
、(1o)はその発振回路である。通常は商用電源fi
+からトランス(2)、介してインパーク部(9)を作
動させて負荷に電源を供給する。そして、非常時(停電
時)には、刀換スイッチ(8)が電池(7)に切換わり
、商用電源t11と同一周波数で発振する発振回路(1
0)によってインバータ部(9)を動作させ負荷に続行
して電源を供給するのである。
Figure 1 shows a conventional impark power supply device, where 11) is an AC power supply, +21 to +31 are transformers, (4) is a rectifier circuit, (5) is a coil, (6) is a capacitor, (7) is a battery, (8) is a changeover switch, (9) is an impark section, and (1o) is its oscillation circuit. Usually commercial power supply fi
+ operates the impark section (9) via the transformer (2) and supplies power to the load. In an emergency (power outage), the sword switch (8) switches to the battery (7), and the oscillation circuit (1) oscillates at the same frequency as the commercial power supply t11.
0), the inverter section (9) is operated to continue supplying power to the load.

処が商用電源+11の周波数とインパーク# i9+の
発振周波数とが僅かにずれた場合、商用電源(1)の平
滑後のリップルの山と谷でインパーク部(9)が動作す
るため、出力電圧が変動する現象が現われる。
However, if the frequency of commercial power supply +11 and the oscillation frequency of impark #i9+ differ slightly, the impark section (9) operates at the peaks and troughs of the ripple after smoothing of the commercial power supply (1), so the output A phenomenon in which the voltage fluctuates appears.

即ち、第2図に示すようにインパーク入力電圧のA点で
インパーク部(9)が動作した場合と8点で動作した場
合とでは、入力電流波形KA’とB′のような差が生じ
、出力電圧の変動につながる。これは仮λインパーク部
(9)の発振周波数を固定17ても、商用電源il+の
周波数がずれることがあるだめに同これ全防雨するため
の対策上しては、インパーク部(9)の動作電源を完全
な直流にする、即ち、商用電源(1)からの整流、平滑
全完全にするか、直流電源を設けるCとが最も良いが、
こtl、は回路構成が複雑になる等、不経済である。
That is, as shown in Fig. 2, there is a difference between the input current waveforms KA' and B' between the case where the impark section (9) operates at point A of the impark input voltage and the case where it operates at point 8 of the impark input voltage. occurs, leading to fluctuations in the output voltage. This is because even if the oscillation frequency of the temporary λ impark section (9) is fixed17, the frequency of the commercial power supply il+ may shift, so as a measure to completely prevent rain, the impark section (9) is ), it is best to make the operating power supply completely direct current, that is, to make it completely rectified and smoothed from the commercial power supply (1), or to provide a direct current power supply.
This is uneconomical as the circuit configuration becomes complicated.

本発明は、このような従来の問題点を解消するものであ
って、その特徴とする処は、商用電源全整流、平滑して
インバータ部全動作させ、非常時に電池VC切換えて負
荷に電源を供給するようにしグヒインバーク電源装置に
おいて、原発振を分周して商用電源と同じ周波数を得て
インパーク部に供給する分周器と、商用電源と分局器の
出力との位相を検出する位相検波回路さ、商用電源と分
局器の出力との位相が合った時に、分局器にリセットパ
ルスを出力してリセットするリセットパルス形成回路と
を備え次点にある。
The present invention solves these conventional problems, and its characteristics are that the commercial power supply is fully rectified and smoothed, the inverter section is fully operated, and in an emergency, the battery VC is switched to supply power to the load. In the Guhiinberg power supply system, a frequency divider divides the original oscillation to obtain the same frequency as the commercial power supply and supplies it to the impark section, and a phase detector detects the phase between the commercial power supply and the output of the divider. The circuit is the runner-up, as it includes a reset pulse forming circuit that outputs a reset pulse to the divider to reset it when the commercial power supply and the output of the divider are in phase.

以下、図示の実施例について本発明を詳述すると、第5
図は本発明の一実施例を示す回路図であり、その各部a
−hの波形全第4図のa−hvC犬々示す。
Hereinafter, the present invention will be described in detail with reference to the illustrated embodiment.
The figure is a circuit diagram showing one embodiment of the present invention, and each part a
-h waveforms are shown in Figure 4 a-hvC dogs.

第6図において、60 Hzの商用電源(1りをトラン
ス(1匈を介して整流回路θ3)で全波整流し、トラン
ジスタ(14)で商用電源(11)の2倍の周波数12
0Hz)の矩形波a1作る。一方、水晶振動子(15j
及びNOTゲートQfn(Iη等から成る発振回路(1
8)は、60Hzを得る場合にけろ932T6MHz、
50Hzを得る場合には3.2768MHzと3 MH
z台の原発振を行ない、こfLを分局器(19)でし、
15に分周し、目的とする周波数の2倍の出力すを得る
。インパーク部のドライブ回路は、フリップ70ツブと
NANDゲートを使用した2相分割回路を用いるため、
目的とする周波数の2倍で良い。(20)t211はD
型フリッグ70ッグで、商用電源(11)から得た矩型
波aを7リツプ70ツグ(20)のD端子へ、発振回路
部の出力を7リツグ70ツグ(20+ +2]1のCK
端子へ夫々入力する一方、フリップ70ツブ(20)の
Q出力全7リツプ70ツブt211のD端子に入力1〜
、Q出力と共vCNANDゲートニに送ることにより、
商用電源(11)からの矩形波aの立上りに同期して、
原発振の周期の幅のリセットパルスfk作る。ANDゲ
ート(刈)で商用電源(11)から得た矩形iaと分局
器(19)の出力すのAND条件を取ることにより位相
検波を行なり。そして、夷4図の一点鎖線より右側(R
天水)の如く両者が180°の位相差がある場合に同期
していると考えて、L矢示部分のようVCすれている場
合は、ANDNOゲートの出力Cが■(レベルとなる期
間があり、トランジスタ(24)がオンし、コンデンサ
(2f51 f放電させ、トランジスタ(2G)U、オ
フ状態の−itであるため、NORゲート1271の出
力gは常にLレベルとなり、リセットパルスfけ出力さ
nず、原発振を分局した出力(120Hz)が、NOT
ゲート281を介してその1ま出力りされ、インパーク
部へと送らnる。また同期したとすると、ANDNOゲ
ートの出力が第4図のR矢示部分の如く17レベルとな
り、コンデンサ□□□が満充電状態となり、トランジス
タ(財)のペース電流が流れるので、トランジスタf2
61f”jオンし、NORゲートにηにより、NAND
ゲー) t2Zからのリセットパルスfが分周器(I9
)のR3端子に加わり、毎サイクル、商用電源(11)
に同期し几2倍の周波数の出力波形が得られる。その出
力波形は再びANDNOゲートで位相検波さn、リセッ
トパルスfのオン、オフ制御を行ない、フィードバック
制御をかけることにより、常に商用電源CII) K同
期した出力波形が得られる。
In Fig. 6, a 60 Hz commercial power source (1) is full-wave rectified by a transformer (via a rectifier circuit θ3), and a transistor (14) converts the frequency 12, which is twice the frequency of the commercial power source (11).
Create a rectangular wave a1 (0Hz). On the other hand, a crystal oscillator (15j
An oscillation circuit (1
8) When obtaining 60Hz, use Kero 932T6MHz,
To obtain 50Hz, use 3.2768MHz and 3MHz
Perform z-order primary oscillation, and use fL as a branching device (19).
Divide the frequency by 15 to obtain an output twice the desired frequency. The drive circuit of the impark section uses a two-phase split circuit using a flip 70 tube and a NAND gate, so
It may be twice the target frequency. (20) t211 is D
With the type frig 70, the rectangular wave a obtained from the commercial power supply (11) is sent to the D terminal of the 7 rip 70 plug (20), and the output of the oscillation circuit is connected to the CK of the 7 rip 70 plug (20+ +2]1).
While inputting to the respective terminals, the Q output of the flip 70 knob (20) is input to the D terminal of the 70 flip 70 knob t211.
, by sending the Q output together with the vCNAND gate 2,
In synchronization with the rise of the square wave a from the commercial power supply (11),
Create a reset pulse fk with a width equal to the period of the original oscillation. Phase detection is performed by taking the AND condition of the rectangle ia obtained from the commercial power supply (11) and the output of the branching unit (19) using an AND gate. Then, on the right side (R
If there is a 180° phase difference between the two, as in the case of Tensui), then it is considered that they are synchronized, and if there is a VC as shown by the L arrow, the output C of the ANDNO gate will have a period of level ■ ( , the transistor (24) is turned on, the capacitor (2f51f) is discharged, and the transistor (2G) U is in the off state -it, so the output g of the NOR gate 1271 is always at the L level, and the reset pulse f is outputted. First, the output (120Hz) obtained by dividing the original oscillation is NOT
The first signal is outputted through the gate 281 and sent to the impark section. If synchronization is assumed, the output of the ANDNO gate will be at level 17 as shown by the R arrow in Figure 4, the capacitor □□□ will be fully charged, and the pace current of the transistor will flow, so the transistor f2
61f”j is turned on and NAND is applied to the NOR gate by η
The reset pulse f from t2Z is applied to the frequency divider (I9
) to the R3 terminal of the commercial power supply (11) every cycle.
An output waveform with twice the frequency can be obtained in synchronization with . The output waveform is phase-detected again by the ANDNO gate, the reset pulse f is turned on and off, and feedback control is applied to obtain an output waveform that is always synchronized with the commercial power supply CII).

非常時(停電時)には、商用電源(11)に同期して出
力していたリセットパルスfがなくなり、原発振を分局
し之そのままの出力が出るため、連続した安定な出力波
形が得られる。また再び商用電源(11)が入れば、分
局器(19)の出力との位相が一致する。
In an emergency (during a power outage), the reset pulse f that was output in synchronization with the commercial power supply (11) disappears, and the original oscillation is split and output as it is, so a continuous and stable output waveform can be obtained. . When the commercial power supply (11) is turned on again, the phase matches the output of the branching unit (19).

即ちずnるまで原発振による出力波形が続き、一旦一致
すれば、通常時の動作に従ってリセットパルスfにより
商用電源(11)に同期した出力波形を送出する。具体
的にけ、商用周波数60.5 R2、原発振分局出力6
0Hz とすると、その差[]、5Hz、即ち、2se
cの周期で1回位相が同期するが、実際には商用周波数
の2倍で処理(位相検波)しているため最大時間I S
ec以内には必ず商用周波数例同期し。
That is, the output waveform by the original oscillation continues until zn, and once they match, an output waveform synchronized with the commercial power supply (11) is sent out by the reset pulse f according to normal operation. Specifically, commercial frequency 60.5 R2, original oscillation branch output 6
0Hz, the difference [ ], 5Hz, that is, 2se
The phase is synchronized once in the cycle c, but since the processing (phase detection) is actually twice the commercial frequency, the maximum time I S
Be sure to synchronize with the commercial frequency within EC.

また同期する1での間は原発振に追従する。Also, while synchronized at 1, it follows the original oscillation.

本発明によれば、インパーク部の動作を商用電源に確実
に同期させることができ、ま之非常時・にはリセットパ
ルスが出力されず、常に原発振から分周した周波数その
ま捷で運転を続行でき、断続することなくインパーク部
に制御信号を送り込み得る。更に、復電時には、商用電
源との位相が合う寸ではその−ままの発振を続行し、一
旦位相が合えば商用電源に同期して通常時の動作を続け
ることができる。
According to the present invention, the operation of the impark section can be reliably synchronized with the commercial power supply, and a reset pulse is not output in an emergency, and the operation is always performed using the frequency divided from the original oscillation. The control signal can be sent to the impark section without interruption. Furthermore, when the power is restored, the oscillation continues as long as the phase with the commercial power supply matches, and once the phase matches, the normal operation can be continued in synchronization with the commercial power supply.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示す回路図、第2図はその波形図、第
6図は本発明の一実施例を示す回路図、@1図はその波
形図である。 [1・・・商用電源、(18)・・発振回路、(19)
・・・分周器、(20)t211・・・D型7リツグ7
0ッグ、の)・・・ANDゲート(位相検波回路)。 特許出願人  池田電機株式会社 代理人 弁理士  安  1) 敏 雄!獣!:W:1
第1図 第3図 5 第2図 第4図  1 L−−−i−−−R 、、rT71−1  置■−ITTI −、−、口、−
、−−8−−−ニニ−−−−主−−−−−−−−−−−
−、l−、、、、、−、、−、、、、,1,、−、−、
l −、、十−七−−−−−−−−−g−−−−−−−
−−−−−−−−−−−−−−−−−−−−−−−七−
−−−−−−−h]−−−ニー「ニー、、−、、−[T
l 、−、−二Tl−,−、−、−手続補正書(自発〕 昭和58年4 月16日 】 ・Iff’lの表示 昭和58  乍 特 許 願り’+ 28142  け
2 発   明  の名称 インバータ@源装置の出力心胆変動防止装置3′f市1
[をrる−1 1・f’lとの関係 特許出願人 イケ〆 デンキ 池田′に機床式会社 ・1代■甲人 ザ・577 −j る0
FIG. 1 is a circuit diagram showing a conventional example, FIG. 2 is a waveform diagram thereof, FIG. 6 is a circuit diagram showing an embodiment of the present invention, and FIG. 1 is a waveform diagram thereof. [1...Commercial power supply, (18)...Oscillation circuit, (19)
... Frequency divider, (20) t211 ... D type 7 rig 7
0g, )...AND gate (phase detection circuit). Patent Applicant Ikeda Electric Co., Ltd. Agent Patent Attorney Yasu 1) Toshio! beast! :W:1
Fig. 1 Fig. 3 Fig. 5 Fig. 2 Fig. 4 1 L---i---R ,, rT71-1 Place -ITTI -, -, Mouth, -
, --8----Nini----Lord--------
-,l-,,,,-,,-,,,,,1,,-,-,
l -,, 1-7-------g------
−−−−−−−−−−−−−−−−−−−−−−−7−
−−−−−−h]−−−Knee “Knee, −,, −[T
l , -, -2 Tl -, -, -, - Procedural amendment (voluntary) April 16, 1980] ・Indication of If'l 1982 Patent request' + 28142 ke 2 Name of invention Inverter @ source device output fluctuation prevention device 3'f city 1
[Ruru-1 1.Relationship with f'l Patent applicant Ike〆 Denki Ikeda's machine bed type company, 1st generation ■ Koto The 577 -j Ru0

Claims (1)

【特許請求の範囲】[Claims] l 商用電源を整流、平滑してインパーク部を動作させ
、非常時に電池に切換えて負荷に電源を供給するように
したインパーク電源装@において、原発振を分周して商
用電源と同じ周波数を得てインパーク部に供給する分局
器と、商用電源と分局器の出力との位相を検出する位相
検波回路と、商用電源と分局器の出力との位相が合った
時に分局器にリセットパルスを出力してリセットするリ
セットパルス形成回路とを備えたことを特徴とするイン
パーク電源装置の出力型圧変「I防止装置。
l In the impark power supply system @, which rectifies and smoothes the commercial power supply to operate the impark section and switches to the battery in an emergency to supply power to the load, the original oscillation is divided to produce the same frequency as the commercial power supply. A phase detection circuit detects the phase between the commercial power supply and the output of the divider, and a reset pulse is sent to the divider when the phase of the commercial power supply and the output of the divider match. An output type pressure change "I prevention device" for an impark power supply device, characterized in that it is equipped with a reset pulse forming circuit that outputs and resets.
JP58028142A 1983-02-19 1983-02-19 Output voltage variation preventing device for inverter power source Pending JPS59153471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58028142A JPS59153471A (en) 1983-02-19 1983-02-19 Output voltage variation preventing device for inverter power source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58028142A JPS59153471A (en) 1983-02-19 1983-02-19 Output voltage variation preventing device for inverter power source

Publications (1)

Publication Number Publication Date
JPS59153471A true JPS59153471A (en) 1984-09-01

Family

ID=12240515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58028142A Pending JPS59153471A (en) 1983-02-19 1983-02-19 Output voltage variation preventing device for inverter power source

Country Status (1)

Country Link
JP (1) JPS59153471A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524337A (en) * 1975-06-28 1977-01-13 Kiyouraku Sangyo Kk Ball circulating device of pachinko play machine row
JPS57113769A (en) * 1980-12-27 1982-07-15 Mitsubishi Electric Corp Digital type phase synchronous circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524337A (en) * 1975-06-28 1977-01-13 Kiyouraku Sangyo Kk Ball circulating device of pachinko play machine row
JPS57113769A (en) * 1980-12-27 1982-07-15 Mitsubishi Electric Corp Digital type phase synchronous circuit

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