JPS59153358A - System for detecting single frequency component - Google Patents

Abstract

PURPOSE:To simplify the constitution without using a filter by discriminating and detecting whether the time attaining the number of zero crossing of an input signal to a prescribed value is within a predetermined threshold value or not in the detection of a single frequency component of a tone disabler. CONSTITUTION:The input signal from a terminal 10 is fed to a zero crossing detecting circuit 11, and when the zero crossing number is counted and reaches a prescribed number, a pulse outputted from a counter circuit 19. A frequency measuring circuit 13 counts the number of pulses of a clock signal at each output pulse interval and the number is compared with threshold values counted at lower and upper limits. When the value is between both the threshold values, it is discriminated that a single frequency component exists and a signal of high level is outputted to an AND circuit 16 via an OR circuit 15. On the other hand, the input signal is fed also to a level detecting circuit 12, and when the level of the input signal is larger than a prescribed level threshold value, a high level signal is outputted from the AND circuit 16 to output a signal disabling the operation of an echo suppressor to a terminal 20.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for detecting a single frequency component (tone) sent via a transmission path.

The single frequency component detection method detects a single frequency component (generally a 2.1 kHz single frequency) transmitted from a terminal in order to disable the operation of an echo suppressor inserted into an international long-distance circuit. ) It is employed for detecting a single frequency component of a tone disabler that detects all components and thereby disables the operation of the echo suppressor.

Typically, a tone desupper detects a single frequency component that is transmitted briefly early in a data transmission, thereby disabling the operation of an echo suppressor to prevent subsequent transmission of data. By maintaining this disabled state for signals, it has a function of preventing the echo suppressor from operating and preventing normal transmission and reception of data signals.

Conventionally, a method using a filter (P-wave device) is often adopted for detecting a single frequency component in a tone despapper. On the other hand, with the recent advances in digital technology, digital lines have become widespread, and as a result, digital echo suppressors and digital tone disablers have also been developed. In this case as well, a filter, ie, a digital filter, is employed for single frequency component detection. In either case, the structure of the filter portion is complicated and the circuit pattern becomes large. In particular, when a digital filter is used to detect a single frequency component of a digital multiplex line, a high-speed multiplication circuit is required, and there is a limit to the degree of multiplexing that can be performed in terms of circuit simulation and power consumption.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a detection method that can detect a single frequency component with high accuracy with a simple configuration and without using a filter.

The detection method of the present invention detects a predetermined frequency component based on whether the time required for the number of zero crossings of an input signal to reach a predetermined value is within a predetermined threshold.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram for explaining a conventional detection method.

A signal given from a terminal 8 is passed through an amplifier 1 to a band rejection filter 2 for suppressing single frequency components in the signal.
After that, it is applied to the detection circuit 3 and also to the full-band detection circuit 4.

Next, the outputs of the detection circuit 3 and the full-band detection circuit 4 are compared by a level comparator 5. If the input signal contains the single frequency component at a predetermined level or higher, the detection circuit 4 side becomes dominant, so the comparator 5 outputs a signal indicating the single frequency component, and if the input signal contains the single frequency component, the comparator 5 outputs a signal indicating the single frequency component. If a single frequency component is included below a predetermined level, the detection circuit 3 side becomes dominant and operates to output a signal indicating that there is no single frequency component. Further, when there is no signal, a slight DC bias is supplied so that the detection circuit 3 side becomes dominant.

Once the presence of a single frequency component is detected, the timer circuit 6 is activated by the output of the comparator 5, and outputs a signal to the terminal 9 for disabling the operation of the echo suppressor. Furthermore, the output of this timer circuit 6 is transmitted to a switch circuit 7.
f open, this result.

- When the carrier single frequency component is detected, regardless of the presence or absence of the single frequency component in the signal, as long as the signal is input, the detection output of the detection circuit 4 side will always be higher than the detection output of the detection circuit 3. When the frequency becomes large and there is no single frequency component, the timer circuit 6 closes the switch circuit 7 and returns to the initial state.

FIG. 2 is a block diagram showing one embodiment of the present invention.

In the figure, an input signal is applied to a zero crossing detection circuit 11 and a level detection circuit 12 via a terminal 10f. First, the zero crossing detection circuit 11 detects the zero crossing of the input signal? The counting circuit 19 is incremented each time it is detected, and when it reaches a predetermined number N, it outputs a pulse and the counted value returns to zero. This output pulse is input to the frequency measuring circuit 13 at the subsequent stage. This circuit 13
is supplied with a clock signal having a frequency f that is sufficiently higher than the frequency of the previous generation, and counts the number of pulses of the clock signal input during each output pulse interval.

This count value is compared with the frequency lower limit count threshold m and the upper limit count threshold n by the frequency determination circuit 14, and when the count value is between these two thresholds, it is judged that there is a single frequency component, and the signal is passed through the OR circuit 15. and outputs a high level signal to the AND circuit 16. As an example of the threshold value, let F be the detected single frequency.

Considering fluctuations in the detected single frequency component, etc., and assuming that the lower and upper limits of the frequency are Fm1n and li'max, respectively, m and n are as follows.

N*fr Fm1n and Fm aX may be appropriately set depending on the detection time, accuracy, and amount of hardware.

On the other hand, the input signal is also given to the level detection circuit 12, where it is compared with a predetermined level threshold TH, and when the level of the input signal is greater than the threshold THf, a high level signal is output to the AND circuit 16.

When a single frequency component is detected and the presence of a signal is detected (by circuit 12), a high level signal is output from AND circuit 16, which activates timer circuit 17 and disables the operation of the echo suppressor. A signal for this purpose is output to the terminal 20. The output of the timer circuit 17 is also given to the OR circuit 15, and in response to this output, a high level signal is output regardless of the presence or absence of a single frequency component in the signal.

In order to prevent the detection of a single frequency component by a data signal or an audio signal, the output of the frequency determination circuit 14 may be further provided to an accumulator circuit 18 for integration and then provided to the OR circuit 15. A similar effect can be obtained by inserting this accumulation circuit into the output of the AND circuit 16.

As described above, the present invention has the advantage that detection of a single frequency component can be achieved with a simple configuration without using a filter.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining a conventional detection method, and FIG. 2 is a block diagram for explaining an embodiment of the present invention. In the figure, 1... amplifier, 2... band rejection filter, 3... detection circuit, 4...
...Full band detection circuit. 5... Level comparator, 6, 17... Timer circuit. 8.9, 10.20...Terminal S 11...
...Zero crossing detection circuit, 12... Level detection circuit, 13... Frequency measurement circuit, 14...
Frequency judgment circuit, 15...OR circuit, 16.
...Logic product circuit, 18... Accumulation circuit.

Claims (1)

[Claims] A single frequency component detection method, characterized in that a predetermined frequency component is detected depending on whether or not the time at which the number of zero crossings of an input signal reaches a predetermined value is within a predetermined threshold.