JPS59149733U - Complementary MOS integrated circuit - Google Patents
Complementary MOS integrated circuitInfo
- Publication number
- JPS59149733U JPS59149733U JP4353083U JP4353083U JPS59149733U JP S59149733 U JPS59149733 U JP S59149733U JP 4353083 U JP4353083 U JP 4353083U JP 4353083 U JP4353083 U JP 4353083U JP S59149733 U JPS59149733 U JP S59149733U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- power supply
- supply terminal
- complementary mos
- mos integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例を用いた相補型MO3集積回
路の入力部の回路図、第2図は本考案の他の実施例を用
いた相補型MO3集積回路の入力部の回路図である。
1・・・・・・■o電源端子、2・・・・・・プルアッ
プ抵抗、2′・・・・・・プルダウン抵抗、3・・・・
・・制御入力端子、4.5・・・・・・制御用バイポー
ラトランジスタ、6・・・・・・信号入力端子、7・・
・・・・V、電源端子、8・・・・・・電流制限用の抵
抗、9.10・・・・・・MOSトランジスタ。
補正 昭59. 1.23
実用新案登録請求の範囲を次のように補正する。
O実用新案登録請求の範囲
入力端子VDD電源端子(又はVSS電源端子)の間に
プルアップ抵抗(又はプルダウン抵抗)を介してバイポ
ーラトランジスタからなるスイッチを設けたことを特徴
とする相補型MO3集積回路。FIG. 1 is a circuit diagram of the input section of a complementary MO3 integrated circuit using one embodiment of the present invention, and FIG. 2 is a circuit diagram of the input section of a complementary MO3 integrated circuit using another embodiment of the present invention. It is. 1...■o power supply terminal, 2...pull-up resistor, 2'...pull-down resistor, 3...
... Control input terminal, 4.5... Control bipolar transistor, 6... Signal input terminal, 7...
...V, power supply terminal, 8...Resistor for current limiting, 9.10...MOS transistor. Correction 1984. 1.23 The scope of claims for utility model registration shall be amended as follows. O Utility Model Registration Claims A complementary MO3 integrated circuit characterized in that a switch made of a bipolar transistor is provided between an input terminal and a VDD power supply terminal (or a VSS power supply terminal) via a pull-up resistor (or a pull-down resistor). .
Claims (1)
SS電源端子)の間にプルアップ抵抗(又はプルダウン
抵抗)を介してバイポーラトランジスタからなるアナロ
グスイッチを設けたことを特徴とする相補型MO5集積
回路。Input terminal and ■DD power supply terminal (or vDD power supply terminal and V
1. A complementary MO5 integrated circuit characterized in that an analog switch made of a bipolar transistor is provided between the SS power supply terminal and the SS power supply terminal via a pull-up resistor (or pull-down resistor).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4353083U JPS59149733U (en) | 1983-03-26 | 1983-03-26 | Complementary MOS integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4353083U JPS59149733U (en) | 1983-03-26 | 1983-03-26 | Complementary MOS integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59149733U true JPS59149733U (en) | 1984-10-06 |
Family
ID=30174067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4353083U Pending JPS59149733U (en) | 1983-03-26 | 1983-03-26 | Complementary MOS integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59149733U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04212789A (en) * | 1991-02-13 | 1992-08-04 | Hitachi Ltd | Semiconductor integrated circuit |
-
1983
- 1983-03-26 JP JP4353083U patent/JPS59149733U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04212789A (en) * | 1991-02-13 | 1992-08-04 | Hitachi Ltd | Semiconductor integrated circuit |
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