JPS59143129U - logic circuit - Google Patents
logic circuitInfo
- Publication number
- JPS59143129U JPS59143129U JP3645183U JP3645183U JPS59143129U JP S59143129 U JPS59143129 U JP S59143129U JP 3645183 U JP3645183 U JP 3645183U JP 3645183 U JP3645183 U JP 3645183U JP S59143129 U JPS59143129 U JP S59143129U
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- transistor connected
- transistor
- gate electrode
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案によるＭＯ５論理回路の一実施例である
。第２図は第１図の実施例を説明するため印加したコン
トロール信号波形図である。
Ｔ工〜Ｔ３・・・・・・トランジスタ。FIG. 1 shows an embodiment of an MO5 logic circuit according to the present invention. FIG. 2 is a control signal waveform diagram applied to explain the embodiment of FIG. 1. T engineering ~ T3...Transistor.
Claims (1)
スタと、前記第１のトランジスタのゲート電極および制
御信号源間に接続されゲート電極が前記供給電源に接続
された第２のトランジスタと、前記供給電源にと前記出
力端子との間に接続されたデプレツヨン型トランジスタ
とを有する論理回路。a first transistor connected between an output terminal and a power supply; a second transistor connected between a gate electrode of the first transistor and a control signal source, the gate electrode of which is connected to the power supply; A logic circuit comprising a depletion transistor connected between a power source and the output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3645183U JPS59143129U (en) | 1983-03-14 | 1983-03-14 | logic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3645183U JPS59143129U (en) | 1983-03-14 | 1983-03-14 | logic circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59143129U true JPS59143129U (en) | 1984-09-25 |
Family
ID=30167126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3645183U Pending JPS59143129U (en) | 1983-03-14 | 1983-03-14 | logic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59143129U (en) |
-
1983
- 1983-03-14 JP JP3645183U patent/JPS59143129U/en active Pending
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