JPS59148449A - Plug-in unit system - Google Patents

Abstract

PURPOSE:To avoid malfunction of the system by adding a function interrupting a master unit to a prescribed plug-in unit. CONSTITUTION:When maintenance and check of a digital input unit Di5 are performed for a system in on-line state, a connector 91 is inserted to a connector 53 at first, and a power supply and a reset signal are applied from a POW9 to the Di5. Thus, an interrupting signal is generated from an interrupting signal generating section 51 of the Di5 and transmitted to an interruption signal receiving section 31 in a CPU31 via an interruption signal line 10. When the said interruption signal is received at the interruption signal receiving section 31, the start of the maintenance of a prescribed unit is informed to an operating processing section 32. When the operating processing section 32 receives said notice, the section 32 intermits the processing of control operation and after the start processing of the maintenance of the Di5 is performed, the normal control and operating processing is kept but the Di5 is not accessed. Thus, the Di5 is plugged out of the system bus 1 while inserting the connector 91 to the Di5.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a plug-in unit system composed of a plurality of plug-in units, and particularly to an online maintenance method in which each unit is inserted and removed while the system is online for maintenance or inspection. An example of this type of system is a process control system as shown in FIG. 1, for example. Note that FIG. 1 is a block diagram showing an example of a general plug-in unit system.

In the figure, 1 is a system bus, child is a bus control unit (BSC) that controls the bus, 3 is a central processing unit (CPU), 4 is a memory unit (M), and 5 is a digital unit (Di). , 6 is analog input crab knit (Ai), 7 is digital output crab knit (Do),
8 is an analog output unit (AO), and 9 is a power supply unit (POW) that supplies power to each of the above units. Each of the units 2 to 8 has a plug-in mechanism, and can be freely attached to and detached from the system bus 1 by this mechanism.

Therefore, information from the plant or plant is input digitally from contacts or transmitters, respectively. Since this information is input to the analog input crab unit 6, this information is sent to the central processing unit (CPU) via the system bus 1.
) 3.

The CPU 3 performs predetermined arithmetic processing based on the control program stored in the memory 4, and the control output information is output to the digital output unit 7 or the analog output unit 8 via the system bus 1, and is sent to the relay.
Manipulations such as pulping are carried out. Note that the above control is cyclically repeated. By the way, in such a control system, in order to improve the operating rate of the system, it is required to perform maintenance and inspection of a predetermined plug-in unit in an online state, or to replace a malfunctioning plug-in unit. However, in such a case, it is necessary that even if the plug-in unit to be maintained is connected or removed online, there will be no adverse effects such as malfunction or stoppage of the control system.

Therefore, as a method for maintaining the plug-in unit online (hot-line maintenance method), for example, the following method has conventionally been used.

1) A method in which a reset terminal is provided in the sub-connector that supplies the power supply voltage, and hot insertion/removal is performed while the power supply and reset signal are being supplied (if necessary, refer to Japanese Patent Publication No. 11329/1983).

2) By making the pattern lengths of the ground wire, power supply, and wire connection terminals of the connector into which the unit's plug is inserted different from those of other signal wires, when the plug-in unit is removed, the signal wires first separate, and then A method in which the power wire and the ground wire are separated from each other in that order.

However, these methods are effective in eliminating negative electrical effects such as not causing noise to the bus or protecting the components (electronic parts) of the plug-in unit when the plug-in unit is installed or removed. In Although,
This has the disadvantage that malfunctions of the entire system cannot be prevented. In other words, in FIG. 1, after the digital input crab unit 5 is removed in a live state by either of the above two methods while the system is operating, the CPU
3 performs an operation to read data from the digital input crab unit 5. In this case, since the digital input crab unit 5 is not installed, no data valid signal (ready signal) is returned, so the bus is considered to be in a locked state. The system will stop. On the other hand, there is a system in which the bus control unit 2 outputs a ready signal after a certain period of time has passed since the CPU 3 performs an access operation, but even in such a case, the digital input crab unit 5 is not implemented. Because there is no data on the bus, all erroneous data such as O" or 1" will be sent to the CP.
The data is read into U3, and the CPU 3 performs calculations based on this erroneous data, resulting in an abnormal state in which the system malfunctions. Incidentally, such a malfunction similarly occurs when an analog input crab unit is hot-wired and removed using a conventional method. In other words, it can be said that the conventional method is still incomplete when considering the entire control system.

The present invention has been made under the above circumstances, and an object of the present invention is to provide a highly reliable plug-in unit system that can avoid malfunctions of the system, and in particular, to provide a live-line maintenance method for the plug-in unit system.

The above object, according to the present invention, provides a plug-in unit system in which at least one of a plurality of plug-in units is a master unit and the others are slave units, and these units are arranged in parallel on a common bus. Each unit is provided with a notification means that detects that the unit is connected to or removed from the common bus, and notifies the master unit of this fact, and the master unit t receives this notification and performs a predetermined process. This is accomplished by not accessing the plug-in unit that has been removed from the system.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the invention. Figure 2 shows CPU3, D15, Ai6 and PO from Figure 1.
Only W9 is extracted and shown, and the CPU 3 is composed of an interrupt signal receiving section 31 and an arithmetic processing section 32.
i5 is composed of an interrupt signal generating section 51, a digital input section 52, and connectors 53 and 54, and POW9 is equipped with a connector 91 for supplying power and a reset signal.

Note that 10 is an interrupt signal line provided corresponding to each plug-in unit 5, 6. Further, although the internal circuit of only Di5 has been shown in detail here, other plug-in units may be configured in the same manner as Di5, if necessary.

Here, when the system is online, D i
When performing the maintenance 2 inspection in step 5, first insert the connector 91 into the connector 53, and supply power and a reset signal from the POW9 to the Di5.

As a result, an interrupt signal is generated from the interrupt signal generating section 51 of Di5, and this is transmitted to the interrupt signal line l.

The interrupt signal is sent to the interrupt signal receiving section 31 in the CPU 3 via the interrupt signal receiving section 31 in the CPU 3. When the interrupt signal receiving section 31 receives the interrupt signal, it notifies the arithmetic processing section 32 that maintenance of a predetermined unit has started. Upon receiving the notification, the arithmetic processing unit 32 interrupts the control arithmetic processing, and also performs maintenance start processing for Di5 (for example, displays to the outside that maintenance is being performed,
After performing processing such as temporary saving of input card data, normal control calculation processing is continued, but access to D15 is not performed. In this way, Di5 can be removed from the system bus 1 while the connector 91 is inserted into Di5. After that, maintenance of Di5.

When the inspection is completed, the Di5 can be re-inserted into the system by plugging it into the system bus with the connector 91 attached (and then removing the connector 91). Since the interrupt signal is generated and transmitted to the interrupt signal receiving section 31 in the CPU 3, the interrupt signal receiving section 31 identifies that it is the second interrupt and notifies the arithmetic processing section 32 that the maintenance has been completed.Arithmetic processing The unit 32 can proceed to normal control operation by performing maintenance termination processing based on this.In this way, the unit Di5 introduced into the system can be accessed.

FIG. 3 is a circuit diagram showing a specific example of the interrupt signal generation section,
FIG. 4 is a signal waveform diagram of each part for explaining the operation. In the figure, reference numerals 511 and 512 refer to flips 70 that operate in synchronization with the clock signal CK as shown in FIG. 4(A), 513 an exclusive OR circuit (EOR), 5
14 is a bus driver, 515 is a power-on reset circuit that resets the 7 lip-flops 511 and 512 when power is supplied, 516 is a pull-up resistor, R8T is a reset signal, and FOR is a power-on reset signal. 91 is the connector explained in FIG. 2, and the connector 91 has the first. +5■ (volts) from the power supply 9 as shown in the diagram.

0■ is supplied, and by engaging with the connector 53 in the digital input crab unit, +sv and ov are supplied to terminals VP5° and VPO, respectively. Note that when the connector 91 is not connected to the connector 53, the pull-up resistor 516 outputs an internal reset signal R8T.
This is provided to stabilize the signal to a "High" (no reset) level.

The operation of FIG. 3 will be explained with reference to the time chart of FIG. 4.

Now, at the time point ■ in the time chart in Figure 4, the connector 9
If 1 is connected to the connector 53, at this point 1, the reset signals R and ST in the unit become 0 as shown in Fig. 4 (b).
(2), that is, the "Lotv" level, thereby resetting the digital unit. This reset signal R8T is latched into the D-type flip 70 knob 511 at the rising edge of the clock CK, and its output Q is shown in FIG. 4(c). It changes from 6High'' to ``Low'' as if. Note that when the connector 91 is not connected to the connector 53, the reset signal R8T is "High", so the flip 70 tabs 511 and 512 are both turned on. Therefore, when the output Q of the flip-flop 511 becomes "LOW", the output of the EOR gate 513 becomes "High" as shown in the fourth figure, and this state continues until the next rising edge of the clock CK. When the 7-lip 70-tube 512 latches the Q ("Low") output of the 7-lip 70-tube 511 due to CK, the Q output of the foot flop 512 becomes "Low" level as shown in Fig. 4), so the EOR gate is activated. The output of 513 also becomes ``Low'' level.

The bus driver 514 is FOR, and the output of the gate is 'Hi'
Low when “gh” High when “S” Low
” Therefore, its waveform is expressed as shown in FIG.
An interrupt pulse is output to the interrupt signal line 10 in synchronization with the clock CK. After that, the Di unit was maintained during the period (■) shown in the figure.

It is inspected and then reinserted into the system.

Then, when the connector 91 is removed at time point (3), the reset signal R8T changes from "Low" to "
In this case as well, the rising edge of the reset signal R8T is differentiated with respect to the clock CK as shown in the same figure (
) is output as an interrupt signal. Note that the arithmetic processing unit performs maintenance termination processing based on the signal.

In the above embodiment, an interrupt signal is automatically generated to the CPU 3 when the power supply and reset signal supply connector 91 is inserted or removed. An interrupt signal may be generated by operating when the switch is released. In addition, in this embodiment, the interrupt signal line 10 is assigned to each plug-in unit, but in addition to using this interrupt signal line 10 as a common line, each plug-in unit has its own recognition code, and When a signal is generated, the CPU 3 may use this recognition code to identify a specific plug-in unit. Furthermore, in this embodiment, as a hot insertion/removal method,
Although method 1) explained in the conventional method section is used, method 2) can also be used.

As described above, according to the present invention, a function is added to a predetermined plug-in unit to interrupt a mask unit such as a CPU when the plug-in unit is inserted or removed in an online state. , since the mask unit can recognize the insertion/removal status of the plug-in unit,
The following effects can be obtained.

b) Maintenance of master unit and plug-in unit.

Access can be avoided during inspection, eliminating negative effects such as system stoppage due to bus locking that occurs when an unimplemented plug-in unit is accessed, or malfunctions that occur as a result of control calculations based on incorrect data. This improves reliability.

口) The master unit can display the maintenance status to the outside of the system using a lamp or the like.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a general plug-in unit, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing details of the interrupt signal generation section in FIG. 2. FIG. 4 is a waveform diagram of each part for explaining the operation. Code explanation 1...System bus, 2...Bus control unit (ESC), 3- Performance system? nyu = 7)
(CPU), 4...Memory unit (M)
, 5-----Digital crab knit (Di), 6
...Analog long sword unit (Ai), 7...
...Digital output crab knit (Do), 8...
・Analog output unit (AO), 9...Power supply unit) (POW), 10...Interrupt signal line, 31...Interrupt signal receiving section, 32...
... Arithmetic processing section, 51 ... Interrupt signal generating section, 52 ... Digital input circuit, 53, 54,
91...Connector, 511゜512...
・D-type flip-flop, 513...EOR gate, 514・Song・Bus driver, 515...
Power-on reset circuit, 516...Pull-up resistor agent Patent attorney Akio Namiki Agent Patent attorney Kiyoshi Matsuzaki 1 Figure 2 ga Figure 7 JIJ diagram -)) □

Claims (1)

[Claims] In a plug-in unit system in which at least one of a plurality of plug-in units is a master unit F1 and others are slave units, these units are arranged in parallel on a common bus, and a desired slave unit is accessed from the master unit to perform predetermined control, Each of the slave units is provided with a notification means that detects that the slave unit is connected to or disconnected from the bus and notifies the master unit of this via a predetermined interrupt signal line. A plug-in unit system characterized by avoiding access by a mask unit of a slave unit.