JPS59147339U - Receiving machine - Google Patents
Receiving machineInfo
- Publication number
- JPS59147339U JPS59147339U JP4033383U JP4033383U JPS59147339U JP S59147339 U JPS59147339 U JP S59147339U JP 4033383 U JP4033383 U JP 4033383U JP 4033383 U JP4033383 U JP 4033383U JP S59147339 U JPS59147339 U JP S59147339U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- switching transistor
- transistor
- capacitor
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Noise Elimination (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は理想的なμ同調の温度特性および電気回路の温
度補償特性を示す図、第２図は実際のμ同調の温度特性
および電気回路の温度補償特性を示す図、第３図はいろ
いろな周波数におけるμ同調器め温度特性図、第４図は
、本考案による受信機の温度補償回路の回路図である。
ＣＦｌ、 ＣＦ２・・・セラミック・フィルタ、Ｃｃ・
・・カップリング用コンデンサ、Ｃ３・・・帯域可変用
コンデンサ、Ｑ□、Ｑ２・・・ＮＰＮトランジスタ、Ｄ
ｌ、 Ｄ、・・・ダイオード、Ｒ１−Ｒ９・・・抵抗、
Ｒ３□、ＲＳ２・・・サーミスタ補正用抵抗、Ｒ１□＊
ＲＴ２・・・サーミスタ抵抗、１・・・信号結合部に
至ることを示す矢印、２・・・ＡＧＣに至ること番示す
矢印、３・・・信号ピックアップ部、４・・・上側妨害
信号検出回路、４′・・・下側妨害信号検出回路、５，
５′・・・増幅器、６．６′・・・倍電圧整流回路、７
．７′・・・駆動回路。Figure 1 shows the temperature characteristics of ideal μ tuning and the temperature compensation characteristics of the electric circuit, Figure 2 shows the temperature characteristics of actual μ tuning and the temperature compensation characteristics of the electric circuit, and Figure 3 shows various FIG. 4 is a circuit diagram of the temperature compensation circuit of the receiver according to the present invention. CFl, CF2... Ceramic filter, Cc.
...Coupling capacitor, C3...Variable band capacitor, Q□, Q2...NPN transistor, D
l, D,...diode, R1-R9...resistance,
R3□, RS2...Resistor for thermistor correction, R1□*
RT2... Thermistor resistance, 1... Arrow indicating reaching the signal coupling section, 2... Arrow indicating reaching the AGC, 3... Signal pickup section, 4... Upper side interference signal detection circuit , 4'... lower side interference signal detection circuit, 5,
5'...Amplifier, 6.6'...Voltage doubler rectifier circuit, 7
．． 7'...Drive circuit.
Claims (1)
に並列に、コンデンサと第１のスイッチング・ト、、ラ
ンジスタから成る直列回路が接続され、上記スイッチン
グ・トランジスタのベース回路に、それぞれ低温時およ
び高温時上記トランジスタをオンさせる、異なった特性
を有する感温素子を含む回路が２個並列に接続され、低
温時および高温時に温度変化による周波数ずれを中間周
波帯域幅を拡げることによって補正する回路、およびそ
れぞれ妨害信号検出回路と、増幅器と、整流回路と、駆
動回路とからなる、目的とする周波数の上側および下側
にある妨害信号によって第２のスイッチング・トランジ
スタを動作させる回路からなり、妨害信号が存在すると
きは上記第２のスイッチング・トランジスタが上記第１
のスイッチング・、トランジスタをオフする回路とを含
むことを特徴とする受信機。A series circuit consisting of a capacitor and a first switching transistor is connected in parallel to the coupling capacitor between the two intermediate frequency amplification stages, and a series circuit consisting of a capacitor and a first switching transistor is connected to the base circuit of the switching transistor at low temperature and high temperature, respectively. a circuit in which two circuits including temperature-sensitive elements having different characteristics are connected in parallel to turn on the transistor when the transistor is turned on; Each circuit consists of a disturbance signal detection circuit, an amplifier, a rectifier circuit, and a drive circuit that operate the second switching transistor by the disturbance signals above and below the desired frequency, and the disturbance signal is When present, said second switching transistor is connected to said first switching transistor.
and a circuit for turning off a transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4033383U JPS59147339U (en) | 1983-03-18 | 1983-03-18 | Receiving machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4033383U JPS59147339U (en) | 1983-03-18 | 1983-03-18 | Receiving machine |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59147339U true JPS59147339U (en) | 1984-10-02 |
| JPH018034Y2 JPH018034Y2 (en) | 1989-03-02 |
Family
ID=30170955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4033383U Granted JPS59147339U (en) | 1983-03-18 | 1983-03-18 | Receiving machine |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59147339U (en) |
-
1983
- 1983-03-18 JP JP4033383U patent/JPS59147339U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH018034Y2 (en) | 1989-03-02 |
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