JPS59143479A - Signal reader of solid state image pickup device - Google Patents

Abstract

PURPOSE:To remove reset noise without increasing noise due to a source follower MOSFET by dividing the output of a solid state image pickup device into two parts, delaying the one for a fixed period, and after finding out the difference between the delayed output and the other output, sampling the signal part of the difference. CONSTITUTION:The clock frequency of horizontal scanning and the frequency of a reset pulse are set up in a driving circuit 57 driving the solid state image pickup device 7. An output signal waveform V0 from the device 7 is divided into two parts. The one output is delayed (a half or less of the reset pulse period T of horizontal scanning) by a delay circuit 54, the difference between the delayed output and the undelayed one is found by a subtractor 55 and a difference signal V1 excluding reset noise is outputted. The difference signal V1 is sampled by a sampling pulse phis in a sampling circuit 56, the sampled signal V2 is taken out by an LPF52 and synchronizing signal such as an SYNC is inserted by a signal processing circuit 53, so that a signal excluding the reset noise is outputted.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a CCD (Charge Combined Detailed Description)
vice ) and CP D (Charge primi
The present invention relates to a video signal readout device for a solid-state imaging device using a NG Device.

[Prior art]

FIG. 1 is a diagram showing the principle of a conventional CCD type solid-state imaging device.

A photosensitive section 9 consisting of photodiodes 2 arranged in a matrix, CCD II to IN in the vertical direction and CC in the horizontal direction for reading out optical signals accumulated in the photodiodes.
D3 and output AMP that amplifies and outputs the transferred signal
Consists of 4 parts. ing.

FIG. 2 is a circuit example of the output AMP4 in FIG. 1.

30 is the signal/L load amount Qs transferred by the horizontal CCD 3
31 is the amount of g C
The signal voltage V o generated in proportion to the signal load amount Qs between
” A source that outputs Qs/Co with low impedance, MO8 type FET 32 for 7-year-old lowers is manufactured by ME
This is a reset MOS mFET for removing the signal charge titQs in Co to the outside.

(7) In the element with the structure shown in Figures 1 and 2,
The signal is read out as follows. In other words, first, the No. 16 charge accumulated in photodiode 2 during one frame period is
It is moved into the CCDs 11 to IN in the vertical direction during the vertical retrace period. The CCDs in the horizontal and horizontal directions transfer one line at a time during each horizontal retrace period, and signal charges are sequentially transferred to the horizontal CCDs 3.

The signal charge transferred to the horizontal CCD during the horizontal retrace period is
By adding a horizontal scanning clock pulse to the horizontal COD during one horizontal period, the data is sequentially transferred into the iCo. The signal charge Qs is transferred to the y-co at the th clock pulse (c<t)1, and the voltage between the capacitance Co and the voltage ■. (t) A hold pulse of voltage VO (pulse 4/, in FIG. 3) is output from the source follower output terminal 33. MOS type FET 32 for resetting the i + = number i of this (4)
Remove it to the outside through. In addition, the next signal charge Qs is carried out again at the next t+1st (t)th clock pulse (t).The hold pulse diagram of the voltage V, where the amount co is increased by 4, is pulse 4.
(t+1)) is output. By repeating the same operation, the signal is sequentially output as a train of hold pulses (3rd 19(c)) with a voltage Vo proportional to the charge Qs.The signal components are shown in FIG. C) is suppressed by extracting the modulated signal component of one output word using the LPF.

By the way, in the $2d pAMP circuit, the capacitance [3
The reset MOS type ↑' E T 3 2 for externally removing the signal charge number QS held within 2 is not an ideal switch element but has an ON resistance. Therefore, when the reset MOS type FET 32 is in the ON state,
A noise voltage due to the thermal noise of this ON resistance is generated between the capacitors tco and 408 type 1” ET 3 2 for reset.
When the time capacitance Co becomes OFF, the instantaneous value of the cross-cardiac pressure occurring during that time capacitance Co is held and mixed into the output signal.

FIG. 4(C) shows a rewritten version of the output signal of FIG. 3(C), including this held miscellaneous signal.

In the figure, 61 is the noise voltage portion generated between the capacitance Co due to the ON resistance thermal noise of the reset MOS type F'ET, and 6
2 shows the waveform of the voltage generated when the male end voltage is held at the moment the switch is turned off. On the other hand, the average noise of 62 is small (hereinafter referred to as reset noise), because the instantaneous voltage itself of 61 is held, Generates a large male signal.

Conventionally, this reset noise has been removed using a clamp circuit. FIG. 5 shows an example of the circuit configuration, and FIG. 6 is an explanatory diagram of the principle of reset noise removal by this circuit. That is, the output signal wave of the 11-body imaging device 7. 'X6 diagram (
In a), the clamp circuit 51 is first passed through and clamped at a position 63 where only reset noise is included. Immediately after the output signal wave is clamped, the reset noise part is removed by the clamp, and only the one word part remains, as shown in 6th+0] (C). Therefore, by further extracting the modulated signal component using the LPF 52, a signal component free from reset noise can be obtained.

On the other hand, in the output A M Pl path shown in FIG.
In addition, MOS type FF for source follower, Ta2
Also generates white random noise due to thermal sound source.

Therefore, the actual solid-state virtual image device output signal waveform is shown in Figure 4 (C).
This waveform is further superimposed with white random noise.

Therefore, the signal readout circuit using the clamp circuit 51 in FIG. On the contrary, the thermal noise voltage of the source follower MOS type FET 31 is held and the noise level increases (Fig. 6(d)), and the improvement rate of the S/N ratio for the single word is low. waiting.

[Purpose of precedent]

The purpose of this invention is to provide a one-word readout circuit and a method for driving a solid-state imaging device that eliminates the reset noise without increasing the noise caused by the source follower MOS FET, while eliminating the above-mentioned drawbacks. There is a particular thing.

[Key points of invention]

In order to achieve the above object, the present invention divides the output of an IF body imaging device into two, and delays the output signal of one of them by a fixed period (within 7 of the reset pulse period T of the horizontal set meal) from the output signal of the other. After subtraction, the signal portion was configured to be sampled. Furthermore, when the solid-state camera is repositioned for one aperture, it is characterized in that it is driven so that the time 1'-.tau., which includes only the reset noise, and the time .tau. that also includes the 1st diaphragm are equal.

[Yumei's Oku I blood case]

FIG. 7 shows implementation I of the No. 13 readout circuit according to the present invention! A
Problem J1, FIG. 8 is an explanatory diagram of a signal reading method using the circuit shown in FIG. 7.

In the 71st gj, 57 is a drive circuit that operates the solid-state imaging device 7 by 1%, and the clock pulse φHI in horizontal scanning is
The clock frequency of +φH2 and the frequency of the reset pulse φR are set to 7.16 MHz. Therefore, the period T of the reset pulse φR is approximately 140 nsec. Further, the width τ7 (FIG. 4(b)) of the reset pulse φR is set to about 20 nsec, which is sufficient time to remove the signal 1 load accumulated in the capacitor Co in FIG. - The rising position of the force signal transfer pulse φH2 is set to a position approximately 600 steps later than the falling position of the reset pulse φR, and the period T-T1-τ containing only reset noise and the period τ containing the signal are approximately equal. Set it so that

FIG. 8(a) shows the solid-state imaging g position output signal waveform ①o obtained by the above driving method. The output signal vo in FIG. 8(a) is first divided into two parts, and one of them is shifted by a time Δ of about 60 nsec (Δ~τ) by the delay circuit 54.
o') The other output signal V which is not delayed by the pull-X device 55
Subtract from O (Fig. 8(C) V+). By the way, in the waveform v1 resulting from this subtraction, as is clear from FIG. 8(C), there is a region 64 where the reset noise is removed and only the noise of the No. 1g part and the 10S type FET for the source follower is included. do. Fig. 7 56 shows a sampling circuit that samples this part in the sampling cycle (Rus φS (Fig. 8 (d)). The waveform after sampling v2 (Fig. 8 (e)) already contains reset noise. Not yet.

Furthermore, the noise level of the MO8 type FET for the source follower is small because there is no operation to hold the instantaneous value of the noise voltage. Therefore, by extracting the modulated 1st signal component of the waveform v2 in FIG. You can get a TV signal.

In addition, in the above signal readout method, FIG. 8(C)
It suffices if there is a region 64 with any τ.

For τ, the delay time Δ is 0<Δ<T−r, ...... River... Within the range of (1), the sampling pulse width τ
S is 0 and τs<MIN(τ, Δ, T-τ, -Δ, T-τ
, -T) ・(2)・1,1) μm]. However, the area 64 is widened and the SNR is high.
7 steps to obtain the signal, pulse width τ, Ts and delay time Δ
It is best to set them individually. The above example is (3)
It is set according to the conditions of the formula.

The above explanation has been made using the example of the output AMP circuit shown in Figure 2 of Book 9D, 1l-1, but the output A IX4 P circuit shown in Figure 9, etc.
In general, a CCD type solid-state image pickup device or a CCD type solid-state image pickup device that uses an output AMP circuit of the type that amplifies the signal voltage appearing between the input terminal and the valley of the AMP input terminal or the
It can also be used for reading out the Ih degree of a solid-state imaging device that combines an iOS type and a CCD type, a CCD type line sensor, a CCD type delay @, etc.

In Fig. 10, Tx2 is a transfer gate for reading out the signal 'ductility or pseudo 1g-load from the vertical line; +
JI.

φX, φR, and VR are terminals TX2, Txt, and
B I, C.

The pulse applied to BLD and φV represent the pulse applied to the vertical switch MOS gate.

〔Effect of the invention〕

As explained above, according to the present invention, the CCD type output A
In a solid-state imaging device having an output AMP voltage of the type where the input power is tlI, the noise voltage of the MO8 type FET for the output AMP source follower is held. , the reset noise can be removed without amplifying the noise level, and the TV signal can be obtained by increasing the signal-to-noise ratio.

[Brief explanation of the drawing]

Fig. 1 is a principle diagram of a CCD type directional imaging device, Fig. 2 is a circuit example of output A IMP, Fig. 3 is an explanatory diagram of its output waveform,
Figure 44 is an explanatory diagram of reset noise, Figure 5, Figure 9, and Figure 6 are diagrams of an 11-node extraction circuit for signals that remove conventional noise, and Figures 7 and 8 are diagrams of the present invention. Figure 9 is an example of an output AJJP circuit other than Figure 2, and Figure 1O is a diagram to which the present invention can be applied. Shadow 4 Concave Figure 5 Figure 7 Figure 8 Figure q (0-) (b) ′″fJlo Figure

Claims (1)

[Claims] 1. Continuous pulsed signal charges Qs are sequentially A M
In a solid-state device having an output A M PM path that amplifies and outputs a signal voltage accumulated in a capacitor Co at the P input end 1 and appearing across the capacitor Co, the output signal of the output A M PM path is divided into two. The output signal of one is delayed by a fixed time Δ relative to the other output signal, and then subtracted from the other output signal, and does not include the reset noise that occurs when the signal charge Qs accumulated in the capacitance CoK is removed. After sampling the difference signal part, it is passed through a low-pass filter.
ir! is configured to extract the modulated signal component of one nuclear sampling word! A signal readout device for a solid-state imaging device 4 having the following characteristics.