JPS59143435A - Data transmission system - Google Patents

Abstract

PURPOSE:To reduce the influence of noise received from a power supply line by detecting a zero crossing point of a power supply AC signal and transmitting data synchronously with the detecting timing during a period sufficiently shorter than the cycle of the AC signal. CONSTITUTION:A zero crossing detecting circuit 7 in a transmission controlling part 5 detects the zero crossing point of a power supply AC signal AC and outputs a trigger signal TR to a CPU9. The CPU9 executes interruption at the rise and fall of the signal TR to form a signal T. Data are transmitted during the time (t) from the rise and fall of the signal T which is sufficiently shorter than the cycle of the signal AC. Consequently, the data are tranmitted always at the small amplitude point of the signal AC, so that the influence of power supply noise can be reduced.

Description

[Detailed description of the invention] (b) Field of invention This invention can be applied to, for example, a temperature control device.

The present invention relates to a data transmission method for intermittently exchanging data between two devices, a control device and a regulator.

(B) Conventional technology and its problems Conventionally, for example, in a temperature control device, setting data etc. from the control device side are transmitted to the controller, or controlled system data from the controller is transmitted to the control device side. However, it is performed intermittently during processing timings other than transmission on the control device side and the regulator side, respectively. On the other hand, the controller of a temperature control device is usually installed at the location where the controlled system is installed, and the power signal line may be shared with other power load devices, and the transmission line connecting the control device and the controller is Noise that runs parallel to the power signal line and is superimposed on the power signal line may mix into the transmission line. still,
What is the execution timing of the above transmission?

Depends on the timing created inside the device.

It has nothing to do with noise superimposed on the power signal line. Therefore, at one time, there was a fear that noise superimposed on the power signal line during data transmission would mix into the transmission line and disrupt the transmission.

(c) Purpose of the Invention It is an object of the present invention to provide a data transmission method that eliminates the drawbacks of the conventional data transmission method described above and reduces the influence of noise superimposed on the power signal line.

B) Structure and Effect of the Invention In order to achieve the above object, the data transmission method of the present invention includes a zero-cross detection circuit that detects the zero-cross point of a power AC signal, and synchronizes the zero-cross detection circuit with the zero-cross detection timing, and Data transmission between the two devices is performed near the zero-crossing point in a period that is sufficiently short than the period of the power AC signal.

According to the data transmission method of the present invention, data is transmitted in synchronization with the zero cross of the power AC signal and in the vicinity of the zero cross point in a period sufficiently shorter than the cycle of the power AC signal. Data is transmitted at points with small amplitude.

The influence of power supply noise can be reduced.

(e) Description of Embodiments The present invention will be explained in more detail with reference to embodiments shown in the following four drawings.

FIG. 1 is a schematic block diagram of a temperature control device in which the present invention is implemented. In the figure, reference numeral 1 denotes a control device installed in a control room or the like, and is configured to exchange data with a controller 6 via a transmission line 2. Control device 1
is a setting section 4 for setting and inputting parameters and the like. A transmission control unit 5 that controls data and evening transmission with the controller 6. Setting section 4
The controller is comprised of a display section 6 that displays values set by the controller, data transmitted from the controller, etc., and a zero-cross detection circuit 7 that detects zero-cross points of the power AC signal.

FIG. 2 is a block diagram showing in more detail the internal configuration of the transmission control unit 5 of the temperature control device shown in FIG. A CPU that executes transmission control, etc.

10 is a RAM that stores calculation values necessary for transmission control.

11 is the regulator 6 and the transmission 0. Signal R (see Figure 6 R)
12 is a T signal circuit that outputs a signal T (see T in FIG. 6) that specifies data transmission to the regulator 6 or reception of data transmission from the regulator 6. 13
is a digit signal input/output unit that inputs and outputs a digit timing signal specifying the adjustment H30 control channel. In this embodiment, one control channel is CHl, CH2, CH3, C″H.
Since there are 4 channels, the digit signal consists of 2 bits, CH and CL (see CH and CL in FIG. 6).

Reference numeral 14 denotes an interface circuit for transmitting and receiving data signals D (see Fig. 6) for each channel to and from the regulator 6. A transmission control section having the same configuration as that shown in FIG. 2 is also provided on the lower side of the regulator.

Next, the control device 1 and the regulator 6 in the above-mentioned temperature regulating device
The data transmission operation between the two will be explained.

First, an outline of the overall operation will be explained with reference to the signal waveform time chart shown in FIG.

In FIG. 6, AC is a power supply AC signal waveform, and the zero cross point of this power supply AC signal AC is detected by the zero cross detection circuit 7, and the trigger signal T is detected by the zero cross detection circuit 7.
R is output to the CPU 9.

The CPU 9 receives the trigger signal TR, performs interrupt (1) processing at the rising edge or falling edge of the trigger signal TR, and generates a signal T. This signal T goes High(1'1,1) l LOW(
This is a signal that repeats ``0,,,,'' ), and the period of this signal T and QW is used for data transmission from the controller 6 to the control device 1, and the period of Higb is used for data transmission from the control device 1 to the control device 1. However, data transmission is actually carried out during a short period of time t from the rising or falling point of the signal T.

This time t is a sufficiently short value compared to the period of the power supply alternating current signal AC. The open signal R at this time t becomes High,
Data transmission is now OK. When signal R becomes High,
When both timing signals CH-CL are Higl+, channel /I/CH1 is specified first, data transmission of channel (CH1) is performed based on the read clock CP, and then provisional timing signals C'H and CL are specified. is Higb・
When it goes Low, the channel)vcH'l is designated and its data is transmitted, and then the digit timing signal C
H-CL is +' LOW -Higb.

When changing from Low to Low, each channel) v CH
5+channel) v CH4 is designated, and the data of the designated channels CH5 and CH4 are transmitted. As mentioned above, the data transmission direction is from the controller 6 to the control device 1 after the rise of the signal T, that is, when the T signal is High I+, and from the controller 6 to the control device 1 after the fall of the signal T, that is, when the T signal is LQWO. 1 to the regulator 6. When L time 1 has elapsed after the rise or fall of the signal T, the data transmission operation ends, and the control device 1 and the controller 3 perform other processing of the data transmission operation.

Next, the operation of generating the signal T in the control device 1 will be explained with reference to the flowchart shown in FIG.

Each time the zero-crossing detection circuit 7 applies a trigger output to the CPU 9, an interrupt (1) shown in FIG. 4 is generated, and each time the counter Tsi is calculated by the counter Tsi1 (step ST (hereinafter referred to simply as ST1)). This counter Tsi is RAM10
The signal T is High.

A value corresponding to the Low repetition period is initially set. Following ST1, it is then determined whether the contents of the counter Tsi are 0 or not (ST2). If it is not 0, the signal T is left unchanged and returns.

When the contents of the counter Tsi become 0 in ST2, the previous T
Since the fixed time period 1 has elapsed since the polarity of the signal was reversed, the initial value TSI should be set in the counter TSi (5T3), and then the previous signal T! IQ
, , that is, whether it is Low or not (5T4), "O
If n, the signal T should be inverted to Higl+ and output 5T.
5)', conversely, if it is not "lO2," invert the signal T to L6w and output it, 5T6) and return.

In this way, an interrupt (1) is generated by the rising and falling signals of the trigger signal TR from the zero-crossing detection circuit 7, and each time the number of interruptions, that is, the count number of zero-crossing points reaches a predetermined value, Reverse the inversion of T and change H at regular intervals
A signal T is created in which igb and Low are repeated.

Next, please refer to the flowcharts shown in FIGS. 5 and 6.

The details of the data transmission operation following the rise or fall of the signal T will be explained.

First, the case when the signal T falls, that is, the case where data is transmitted from the control device 1 to the controller 6 will be explained. The CPU 9 of the control device 1 always checks whether the signal T has risen or fallen (ST in Fig. 5).
, 111 5T12), L. Therefore, in the above assumption, this is the falling edge of the signal T.

Judgment No of 5T11, judgment YES of 5T12, small 5T
13, the count contents of the shift digit counter DC are output.

This digit counter DC is a counter for outputting the Ate timing signals CH and CL, and is provided in the RAMIQ. As shown in FIG. 6, at the beginning when the signal T falls, the signals CH, CL, ! , is also High b and channel) v
A signal indicating CH1 is output. This decorative timing signal causes data DR1 of channel /l/CHI to be output (sT14.), and the contents of the 'A3 cow counter are incremented by 1. Accordingly, the contents of the soybean counter DC are high when CH is high.
gb, CL becomes Low (indicating channel CH2) (ST15). Next, it is determined whether the content of the digit counter DC is 0 (whether the signals CH-CL are both Low or not) (S
T16). Channel) Since it is the data output timing of vCHl, the judgment in ST16 at this point is No, and after that, the to time is held (ST17), and the 5T1 is outputted again.
Return to 3. Note that the time retention in STI 7 is 5. This is done in order to maintain the channel /L/@ number of the conversion counter DC for a certain period of time.

When the signal T falls as described above, the data DR1 of the channel CH1 is output from the control device 1, but even when the force regulator 5 outputs the signal T, the rise or fall of the signal T occurs as shown in FIG. Upon receiving an interrupt (2), it is determined whether the signal T is 0 or not (ST31). Therefore, as assumed above, after 9 points of falling of the signal, the determination of whether the signal 'r=0 of 5T31 is YES, and then the 41 timing signal from the digit signal input/output section 1 of the control device 1 Receive CH-CL and read this signal (ST32). As mentioned above, the digit timing signals cH and cL output from the control device 1 are Higb and Hi.
gb (that is, channel) v Since this is a signal specifying CH1, data DR1 of channel/L/CH1 from the interface 14 of the control device 1 is read (S
T33). This completes the data transmission from the control device 1 to the regulator 5 of the channel CH1. In the controller 6, after reading the data DRi, is the digit timing of 5T34 -0?
After the determination No, the process returns to ST32.

When the data transmission of channel/I/CH1 is completed, the control device @1 side outputs the digit timing signal (CM: Hi
Outputs gh, CL: Low), and further outputs fya*)v C
H2 (7) Data DR2 is also output (ST14). Then, the content of the goose counter DC is incremented by 1, and the content is changed to a signal indicating channel/l/CH low (CH: Low, CL: Hi).
gb) (ST15). Next, 5T16,
After 5T17, I returned to STI 3. On the other hand, in regulator 6.

The digit timing signals CH and CL from the control device 1 are read (ST, 2), and the data signal DR2 of the channel CH2 is read (ST33).

Similarly to the above, the digit timing signals and data DRI and DR4 of channels vCH3 and CH4 are outputted from the control device 1 and read into the regulator 6.

When the output of the digit timing signal and data DR4 for channel CH4 is completed, the contents of the 5-digit counter DC become O, and the data transmission processing operation ends. After that, other processing is performed until the next rising point of signal T (ST21).

Similarly, in the controller 6, when reading of the digit timing signal and data D and R4 of channel) v CH4 is completed, s'3.
Since the judgment of 4 = 39 is YES, 9
The process returns from the interrupt (2) process, and other processes will be performed thereafter.

At 9 o'clock when the signal T rises, that is, when data is to be transmitted from the controller 6 to the control device 1, the controller first receives an interrupt (2) due to the rise of the signal T, and at 5T31, the signal T becomes O.
It is determined whether or not. In this case, it is determined whether the signal T is O or not. In this case, since the signal T has changed to High, the 9 judgment is No, and the process moves to 5T35, where it outputs the contents of the digit counter DC (digit timing signal indicating channel CH1) held in the controller itself. , channel) L/
, outputs data DSi of CH1 (ST36).

On the other hand, since the control device 1 detects the rising edge of the signal T,
Is T11 T rising detection detected? The judgment is YES, and then the digit timing signal indicating the channel (v'CH1) transmitted from the controller 5 via the digit signal input/output unit 13 is read (ST18), and the controller The data DS1 of the channel CH1 transmitted via the interface 14 is read (ST19). This completes the transmission of data DS1 on channel 7vCH1 from controller 6 to control device 1. After that, the controller 5 sequentially outputs the contents of the 1-digit counter DC until the contents of the 1-digit counter DC reach O (ST35), and each channel CH2, CH3,
CH4 data DS2, DS3. Sequential output of DS4 (ST36) 11 calculations of 9-digit counter DC (ST37
) and to time output holding are repeated, and in the control device @1, the digit counter DC transmitted from the controller 6
Sequentially read the contents of (ST18), each channel CH2,
cHb.

The sequential reading (S T19 ) of data DS2, DS3, and DS4 of CI (4) is repeated. Then, each channel C
H1゜When the data transmission of CH2, CH3, and CH4 is completed, the DC of 5T38 of controller O is Q or 9. Control device 1-5
Is T20 digit timing 0? Since both of the determinations are YES, the controller 6 and the control device @1 proceed to other processing operations than data transmission.

As described above, in the above embodiment, data is transmitted at the cycle of the power supply AC signal after zero-cross detection, regardless of whether the data is transmitted from the control device to the controller or vice versa. It is a sufficiently short period compared to , and the amplitude of the power supply AC signal is small.
It can reduce the influence of noise from the power line.

Although the above embodiment describes the case where the present invention is implemented in a temperature control device5, the present invention is not limited to this.
It goes without saying that the method can be applied to data transmission between two devices.

[Brief explanation of drawings]

FIG. 1 is a schematic block diagram of a temperature control device in which the present invention is implemented, FIG. 2 is a block diagram showing in more detail the transmission control section of the control device of the temperature control device, and FIG. 6 is the same as that shown in FIG.
Fig. 2 is a time chart of signal waveforms of each part to explain the data transmission operation of the temperature control device, Fig. 4 is a diagram showing the T signal creation flow in the transmission control section shown in Fig. 2, and Fig. 5 is the same. Diagram 6 showing the data transmission processing flow of the transmission control unit
This figure is a diagram showing a data transmission processing flow on the controller side of the temperature control device shown in FIG. 1. 1: Control device, 2: Transmission line. 3: Controller, 5: Transmission control unit, 7: Zero cross detection circuit, 8: ROM, 9: CPU. 10: RAM, 1ro: Digit signal input/output section. 14: Interface. Patent Applicant Tateishi Electric Co., Ltd. Agent Patent Attorney Shigeru Nakaichimura Figure 1 Figure 2 Figure 6

Claims (1)

[Claims] (1) This is a data transmission method that allows data to be sent and received intermittently between two devices. The device includes a zero-crossing detection circuit that detects the zero-crossing point of the power supply AC signal, and is synchronized with the zero-crossing detection timing of the zero-crossing detection circuit and detects the zero-crossing point in the vicinity of the zero-crossing point for a period sufficiently shorter than the period of the power supply AC signal. A data transmission method characterized by transmitting data between two devices.