JPS59142830U - Power supply initialization signal generation circuit - Google Patents
Power supply initialization signal generation circuitInfo
- Publication number
- JPS59142830U JPS59142830U JP3662183U JP3662183U JPS59142830U JP S59142830 U JPS59142830 U JP S59142830U JP 3662183 U JP3662183 U JP 3662183U JP 3662183 U JP3662183 U JP 3662183U JP S59142830 U JPS59142830 U JP S59142830U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- transistor
- initialization signal
- signal generation
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はこの考案に係る電源イニシャライズ信号発生回
路の一実施例を示す回路構成図、第２図は同実施例の動
作を説明するためのタイミング図、第３図は同実施例の
変形例を示す回路構成図である。
１１・・・電源端子、１２・・・電源ライン、１３・・
・アンド回路、１４・・・出力端子、１５・・・緩衝増
幅器、１６・・・ヒステリシス回路、１７・・・バック
アップ電源部。Fig. 1 is a circuit configuration diagram showing an embodiment of the power supply initialization signal generation circuit according to this invention, Fig. 2 is a timing diagram for explaining the operation of the embodiment, and Fig. 3 is a modification of the embodiment. FIG. 11...Power terminal, 12...Power line, 13...
- AND circuit, 14... Output terminal, 15... Buffer amplifier, 16... Hysteresis circuit, 17... Backup power supply section.
Claims (1)
タと、前記電源ラインと前記トランジスタの制御電極と
の間に逆方向に介挿接続された一方向性素子と、前記ト
ランジスタの制御電極と基準電位点との間に直列に介挿
接続された第１及び第２の抵抗と、この第１及び第２の
抵抗の接続点と前記基準電位点との間に介挿接続された
コンデンサと、前記トランジスタの第２の被制御電極と
前記基準電位点との間に介挿接続された第３の抵抗と、
前記第１及び第２の抵抗の接続点の出力と前記トランジ
スタの第２の被制御電極及び前記第３の抵抗の接続点の
出力との論理積をとって電源イニシャライズ信号を生成
する論理積回路とを具備してなることを特徴とする電源
イニシャライズ信号発生回路。a transistor having a first controlled electrode connected to a power supply line; a unidirectional element interposed and connected in a reverse direction between the power supply line and a control electrode of the transistor; and a control electrode of the transistor and a reference. a first and second resistor connected in series between the first and second resistors, and a capacitor connected between the connection point of the first and second resistors and the reference potential point; a third resistor interposed and connected between the second controlled electrode of the transistor and the reference potential point;
an AND circuit that generates a power supply initialization signal by performing a logical product of an output at a connection point between the first and second resistors and an output at a connection point between the second controlled electrode of the transistor and the third resistor; A power supply initialization signal generation circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3662183U JPS59142830U (en) | 1983-03-14 | 1983-03-14 | Power supply initialization signal generation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3662183U JPS59142830U (en) | 1983-03-14 | 1983-03-14 | Power supply initialization signal generation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59142830U true JPS59142830U (en) | 1984-09-25 |
Family
ID=30167286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3662183U Pending JPS59142830U (en) | 1983-03-14 | 1983-03-14 | Power supply initialization signal generation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59142830U (en) |
-
1983
- 1983-03-14 JP JP3662183U patent/JPS59142830U/en active Pending
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