JPS59142787U - Clock circuit structure - Google Patents
Clock circuit structureInfo
- Publication number
- JPS59142787U JPS59142787U JP3772583U JP3772583U JPS59142787U JP S59142787 U JPS59142787 U JP S59142787U JP 3772583 U JP3772583 U JP 3772583U JP 3772583 U JP3772583 U JP 3772583U JP S59142787 U JPS59142787 U JP S59142787U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- sub
- circuit structure
- clock circuit
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Clocks (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の実施例を示す図面である。第２図、第３
図、第４図は本考案の一実施例を示す図面である。第４
−ａ図は平面図、第４−ｂ図はその断面図である。′
１・・・・・・回路基板、２・・・・・・サブ回路基板
、３・・・・・・ＩＣ，４・・・・・・ＩＣ，５・・・
・・・ＩＣ，（５・・・・・・ＩＣ，７・・・・・・モ
ールド剤、８・・・・・・回路スペーサ、９・・曲導通
ピン、１０・・・・・・コンデンサ、１１・・・・・・
リードフレーム。FIG. 1 is a drawing showing a conventional embodiment. Figures 2 and 3
4 are drawings showing an embodiment of the present invention. Fourth
Figure 4-a is a plan view, and Figure 4-b is a sectional view thereof. '1...Circuit board, 2...Sub circuit board, 3...IC, 4...IC, 5...
...IC, (5...IC, 7...molding agent, 8...circuit spacer, 9...bent conduction pin, 10...capacitor , 11...
Lead frame.
Claims (1)
リードフレームより成り、前記主回路基板と前記副回路
基板は前記回路スペーサにより平面方向の位置決めと断
面方向の高さ決めされ、前記主回路基板と前記副回路基
板には平面的に同位置に前記リードフレーム挿入穴が少
なくとも２個以上設けられ、該挿入穴に前記リードフレ
ームが挿入されはんだ付けにより固定されている、該リ
ードフレームは前記挿入穴入部を概直角に曲げられ切断
部は板厚の゛１／２以上の割り込みが施され、２個以上
が連続して形成されており、前記挿入穴に挿入後はんだ
付された後、各前記側り込み部で切断されていることを
特徴とする時計の回路構造。At least a main circuit board, a sub circuit board, a circuit spacer,
The main circuit board and the sub-circuit board are positioned in a planar direction and the height in a cross-sectional direction are determined by the circuit spacer, and the main circuit board and the sub-circuit board are provided at the same position in a plan view. At least two lead frame insertion holes are provided, and the lead frame is inserted into the insertion holes and fixed by soldering.゛It is characterized in that an interruption of 1/2 or more is applied, two or more are formed in succession, and after being inserted into the insertion hole and soldered, it is cut at each of the side insertion portions. The circuit structure of a clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3772583U JPS59142787U (en) | 1983-03-15 | 1983-03-15 | Clock circuit structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3772583U JPS59142787U (en) | 1983-03-15 | 1983-03-15 | Clock circuit structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59142787U true JPS59142787U (en) | 1984-09-25 |
Family
ID=30168413
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3772583U Pending JPS59142787U (en) | 1983-03-15 | 1983-03-15 | Clock circuit structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59142787U (en) |
-
1983
- 1983-03-15 JP JP3772583U patent/JPS59142787U/en active Pending
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