JPS59139199A - Protecting method of storage - Google Patents

Abstract

PURPOSE:To attain the memory protection of key map capacity with the minimum capacity independently of the increase/decrease of a memory space in a system by writing key information corresponding to each bank in a prescribed storing part on the key map at every access of each bank. CONSTITUTION:At the access to a memory, an address selector 12 selects and outputs an upper address A19-8 on a bus as a reading address to a key map 11. On the basis of the address, key information KN is outputted from the corresponding storing part on the key map 11. At the execution of a program, a protection key number to be assigned to the program is written in a PKN register 18 as software. The key information KN and the protection key number PKN from the register 18 are checked by ''0'' checking circuits 14, 15 respectively whether these data are included in an unconditional writable area or not. A coincidence detecting circuit 16 discriminates whether both values coincide with each other or not to execute protection control.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a d1 storage security system, and particularly to a storage protection system for a storage device having a bank configuration.

(b) Prior Art and Problems FIG. 71 is a diagram illustrating a conventional storage protection system. The part shown in the figure is conventionally a storage device (hereinafter referred to as memory).
The memory space 3 of the computer is divided into predetermined areas (256 bytes in the figure) for storage protection. That is, a key map 4 having a storage section corresponding to each area of the memory space 3 is provided, and key information KN regarding memory protection is written in each storage section of this key map 4. This key information KN is set in advance, for example, corresponding to each program stored in the memory space 3. Also key information KN
is based on the address information 1 output by the processing device (not shown) that has accessed the memory space 3.
) is read. The reading of the key information KN and the memory protection operation described below are carried out by the memory protection control section.

On the other hand, 2 is a protection key number register (hereinafter referred to as PKN register), which executes the program in memory space 3. The PROTECHNO 1 e key number PKN is written in the ``c'' area. This protection key number PKN is assigned the same numerical value as the above-mentioned key information KN for the same program. Therefore, by comparing the read key information KN with the contents of the PKN register 2 key map 4, the memory protection control unit can prevent unnecessary access to other areas due to program runaway. In , protection key number P
Whether or not KN and key information KN are predetermined values (the value "0" in the example) determines whether access to the processing device is permitted or not. This is to determine unconditional write permission to enable access to a common work area on the ME% IJ space 3, for example.

As described above, write protection to the memory is performed using the PKN register and key map. However, in the above-mentioned memory proxy storage method, it is necessary to prepare a key map storage area by expanding the memory space or the like.

For example, as shown in FIG. 2, a partial area 5b of the originally 1 Mbyte memory space is made into a bank configuration to expand the memory space to a total of 2 Mbytes. In this way, each time the number of banks in the bank area 5b increases, the key map capacity μ
: Need to be increased.

However, the size of memory space varies depending on the system. Therefore, it is necessary to set the keymap capacity appropriately, but if the maximum memory space is assumed to be large, the keymap may be wasted. In addition, if it is assumed to be small, there is a drawback that the expandability of the system will be poor.

(C1 Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned disadvantages of the conventional technology by providing storage protection that eliminates the need to change the amount of keymaps due to memory space expansion and that can be applied without losing system expandability. There are three ways to think of the method.

(d) Structure of the Invention In order to achieve the above object, the memory protection system of the present invention is such that each bank is accessed every time it is accessed.

(e) Examples of the invention The present invention will be explained in detail below using Examples.

FIG. 3 shows an access system to the memory space expanded by the bank configuration shown in FIG. That is, according to the address outputs A19 to AI of the processor 6, the common area 5 of the memory
A and bank area 5b are accessed. Further, banks 1 to 4 are selected using extended addresses EA3 to EAf. These extended addresses EA3-EA are set by processor 6 writing to extended address register 7. Writing of the address to the register 7 is performed according to the AND condition of specifying the puncture area by the address outputs A19 to A7 of the deco 4-6 and outputting the write signal WR/TE. - Figure 4 is a diagram showing an example of the memory processing control circuit according to the present invention, in which 18 is a PKN register corresponding to 2 in Figure 1, and 11 is a key map corresponding to 4 in Figure 1. It is. In the wooden case, it is. In other words,
The storage unit 11b has a storage capacity to store key information for a unit bank in the bank area 5b. Therefore, the key information of each bank θ to 4 is written into the storage section 11b on the key map ll alternately (that is, each time the bank to be accessed changes).

For example, when protecting the memory space in units of 256 bytes as shown in FIG.
has only a capacity of IK×6 bits.

Furthermore, the storage section 11a appears in the common area 5a of the memory space. The reason why it is possible to use the storage section 11b for a unit bank in common for the key information of each bank 1 to 4 in this way is due to the following reason. That is, application programs (programs constituting different programs and tasks) are stored in each bank/~4 of the memory space. Further, a management program for managing each application program is stored in the common area 5a. Therefore, as a characteristic of access, there is almost no data transfer between banks (that is, between application programs), and data transfer is normally performed only between banks and the common area 5a. In this embodiment, data transfer between banks is prohibited by hardware, and key information for each bank is shared and stored in the same area on the key map.

The operation of the embodiment circuit shown in FIG. 4 will be explained below.

An address bus (or an address from the processor 6), not shown, is connected to the key map 11 via an address selector 12. Also, the data bus or the data output of the processor 6 is transmitted via the data selector 13! is connected. The address selector 12 selects the upper address A19-s on the bus from the key map 1 when the processor 6 accesses the memory (not shown).
Selectively output as a read address to 1. The key information KN is output from the corresponding storage section on the Q1 key map 11 according to the read address.

On the other hand, when the processor 6 executes the program, the protection key number assigned to the program is written into the PKN register 8 by software. Key information KN output from key map 11 and protixilon key number PK output from PKN register 8
Check circuits 14 and 15 for each NH1'I'' check whether or not the area is unconditionally writable.Furthermore, a match detection circuit 16 determines whether or not the two values are equal. .This coincidence detection circuit 16 and π check circuit 14
．． 15, the protection control shown in FIG. 1 is performed. That is, the key information KN is input by the AND gate 17.
If the protection key number PKN and the protection key number PKN are not the specified value "C" and the two are different key values, an error message is output.

Further, when writing key information onto the key mag 11, the selector 12 selects the addresses AI1-Az output together with the access signal I/OAC of the processor 6. A data line RD of upper and lower 6 bits from the processor 6 is input to the data selector 13 . These data are selected depending on the state of the lowest address pid of the write addresses AI1 to AO to the key map 11.

Writing of key information to the key map 11 described above is performed, for example, when the system is operating. Further, in the common storage section 11b on the key map 11, mourning key information is written in accordance with a newly accessed bank every time the processor 26 switches banks, that is, every time the application program is replaced.

(f) Effects of the Invention According to the present invention as detailed above, the key map capacity is not affected by the increase or decrease in the memory space of the system. In addition, even if the map capacity is fixed in a fixed manner, protection control can be performed without interfering with the expandability of the system.

[Brief explanation of the drawing]

Figure m1 is a diagram explaining a conventional memory protection method using key information, Figure 2 is a diagram showing an expanded memory space, t
s3 is a diagram showing an access system for the memory space shown in FIG. 2, and FIG. 4 is a diagram showing an embodiment of the present invention. 2,18
is the protection key number register %4=11 is the key map, indicating the 6-digit processor @

Claims (1)

[Claims] A storage device, a processing device that performs access for reading and writing data to the storage device, and a storage section corresponding to each predetermined storage area on the storage device, and a storage section that has information about the storage protection of each storage area. a key map in which key information is stored, the key information corresponding to the storage area on the storage device that the processing device attempts to access is read out from the key map, and based on the key information, whether or not the processing device can access the storage area; In a data processing system that stipulates that the storage device is composed of a plurality of bank areas and a common area common to each bank area, when the processing unit accesses each bank area, the bank accessed by the processing unit is 1. A storage protection system comprising: means for writing key information for each bank area into the same storage section on the key map; and key information for each bank area is stored in the same storage section on the key map.