JPS59138336A - Method for exposing pattern on semiconductor wafer - Google Patents
Method for exposing pattern on semiconductor waferInfo
- Publication number
- JPS59138336A JPS59138336A JP58012521A JP1252183A JPS59138336A JP S59138336 A JPS59138336 A JP S59138336A JP 58012521 A JP58012521 A JP 58012521A JP 1252183 A JP1252183 A JP 1252183A JP S59138336 A JPS59138336 A JP S59138336A
- Authority
- JP
- Japan
- Prior art keywords
- mask
- wafer
- semiconductor wafer
- film
- resist film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、半導体ウェハへのパターン露光方法に関する
。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of pattern exposure on a semiconductor wafer.
従来、半導体ウェハの表面に所望パターンのレジスト膜
等を形成、するために、第1図に示すようなパターン露
光方法が行われている。先ず、表面に予めレジスト膜l
が形成された半導体ウェハ2を、真空チャック3上に吸
引固着する。Conventionally, a pattern exposure method as shown in FIG. 1 has been used to form a resist film or the like in a desired pattern on the surface of a semiconductor wafer. First, a resist film is applied on the surface in advance.
The semiconductor wafer 2 on which is formed is suctioned and fixed onto the vacuum chuck 3.
次いで、レジスト膜1上に所定パターンのフォトマスク
4を載置する。このフォトマスク4をマスクにして紫外
線を照射し、レジスト膜1のパターン露光を行う。この
ようにしてパターン露光を行うものでは、第2図(5)
及び同図(B)に示す如く、真空チャック3の頂部の平
坦面上に半導体ウェハ2を載置してパターン露光を行う
ため次のような問題があった。Next, a photomask 4 having a predetermined pattern is placed on the resist film 1. Using this photomask 4 as a mask, ultraviolet rays are irradiated to expose the resist film 1 in a pattern. In the case where pattern exposure is performed in this way, Fig. 2 (5)
As shown in FIG. 3B, the semiconductor wafer 2 is placed on the flat surface of the top of the vacuum chuck 3 and pattern exposure is performed, which causes the following problems.
■ レジスト膜Iを介してフォトマスク4と半導体ウェ
ハ2とが全面で密着しているため、紫外線)1光を施す
とレジスト膜1とフォトマスク4の下面とが化学的、物
理的に吸着し、フォトマスク4を半導体ウェハ2から容
易に剥すことができない。■ Since the photomask 4 and the semiconductor wafer 2 are in close contact with each other over the entire surface through the resist film I, when one ray of ultraviolet light is applied, the resist film 1 and the lower surface of the photomask 4 are chemically and physically adsorbed. , the photomask 4 cannot be easily peeled off from the semiconductor wafer 2.
■ フォトマスク4の剥し操作を容易にするため、レジ
スト膜Iの表面やフォトマスク4の下面に吸着防止剤を
塗布することが行われているが、工程が増加すると共に
吸着防止剤を均一な膜厚で塗布し難い。■ In order to facilitate the removal operation of the photomask 4, an anti-adsorption agent is applied to the surface of the resist film I and the bottom surface of the photomask 4, but as the number of steps increases, it is difficult to apply the anti-adsorption agent uniformly. Difficult to apply due to thickness.
〔発明の目的〕、
本発明は、ウェハまたはマスクの表面に吸着防止剤を塗
布することなく、ウェハとマスクの離れを容易にして作
業性及び経済性の向上を達成した半導体ウェハへのパタ
ーン露光方法である。[Object of the Invention] The present invention provides pattern exposure for semiconductor wafers that facilitates separation of the wafer and mask without applying an anti-adsorption agent to the surface of the wafer or mask, thereby improving workability and economic efficiency. It's a method.
本発明は、ウェハを断面凸形に変形してマスク押付は時
の力がウェハ面に対して部分的に集中するようにし、吸
着防止剤を使用することなく、ウェハとマスクの離れを
容易にして作業性及び経済性の向上を達成した半導体ウ
ェハのパターン露光方法である。The present invention deforms the wafer into a convex cross-section so that the force when pressing the mask is partially concentrated on the wafer surface, making it easy to separate the wafer and mask without using an anti-adsorption agent. This is a pattern exposure method for semiconductor wafers that has improved workability and economical efficiency.
以下、本発明の実施例について図面を参照して説明する
。Embodiments of the present invention will be described below with reference to the drawings.
先ず、第3図(5)及、び同図(至)に示す如き真空チ
ャックlOを用意する。この真空チャック1゜は、半導
体ウェハ11を固着するための吸着孔12を頂部10a
に多数個有している。頂部10a の中央部には、
凸部13が形成されている。凸部13は、真空チャック
10上に固着する半導体ウェハ11を凸状に湾曲させる
ものである。この作用を有するものであれば、凸部13
の位置、大きさ、高さ・は、如何なるように設定しても
良い。−例を挙げると、直径110葬φの頂部10a
の中央部に直径10m111φ、高さ約10μmの凸
部Z3を形成しても良い。First, a vacuum chuck 10 as shown in FIG. 3 (5) and FIG. 3 (to) is prepared. This vacuum chuck 1° has a suction hole 12 for fixing a semiconductor wafer 11 at the top 10a.
We have many of them. In the center of the top 10a,
A convex portion 13 is formed. The convex portion 13 curves the semiconductor wafer 11 fixed onto the vacuum chuck 10 into a convex shape. If it has this effect, the convex portion 13
The position, size, and height of can be set as desired. - For example, the top 10a with a diameter of 110 mm
A convex portion Z3 having a diameter of 10 m111φ and a height of about 10 μm may be formed at the center of the plate.
次いで、第4図(Nに示す如く、真空チャック10内を
予め減圧状態に設定して、表面にレジスト膜14を形成
した半導体ウェハ11を頂部10a 上に吸引固着す
る。このとき、半導体ウェハ11は、レジスト膜14側
に凸状に湾曲し、その下面の凸部z3の近傍には、隙間
15が形成されている。Next, as shown in FIG. 4 (N), the interior of the vacuum chuck 10 is previously set to a reduced pressure state, and the semiconductor wafer 11 with the resist film 14 formed on its surface is suctioned and fixed onto the top portion 10a.At this time, the semiconductor wafer 11 is curved in a convex shape toward the resist film 14 side, and a gap 15 is formed near the convex portion z3 on the lower surface thereof.
次に、同図(Blに示す如く、凸状に湾曲した半導体ウ
ェハlIのレジスト膜14上に所定パターンのフォトマ
スクZ6を載置し、レジスト膜I4側に押し付ける。フ
ォトマスク16は、凸状に湾曲した半導体ウェイ)11
上に、その中央部で時に強い接着力を受けながら、レジ
スト膜Z4を介して密着する。この状態で所定波長の紫
外線による露光処理を、フォトマスク16を介して半導
体ウェハ11に施す。Next, as shown in FIG. 11
The resist film Z4 is adhered to the top through the resist film Z4, sometimes receiving a strong adhesive force at the center thereof. In this state, the semiconductor wafer 11 is exposed to ultraviolet light of a predetermined wavelength through the photomask 16.
次いで、露光処理後同図(qに示す如く、フォトマスク
16に力ぬていた押し付は力を解除シる。押し付は力が
解かれると、フォトマスクI6は平坦な状態となり、レ
ジスト膜Z4の周囲部分では、フォトマスク16との間
に隙間17ができる。この隙間Z7から空気が侵入し、
フォトマスク16を一レジスト膜14から容易に剥がす
゛ことができる。しかも、フォトマスク16とレジスト
膜I4の各々の接着面には、接着防止剤が全く塗布され
ていないので、塗布作業に要する時間分だけ作業性を向
上できる。また、接着防止剤を不要にして経済性を向上
させることができる。 。Next, after the exposure process, as shown in FIG. A gap 17 is created between Z4 and the photomask 16. Air enters through this gap Z7,
The photomask 16 can be easily peeled off from the resist film 14. Moreover, since no anti-adhesion agent is applied to the adhesion surfaces of the photomask 16 and the resist film I4, workability can be improved by the time required for the application process. Moreover, it is possible to eliminate the need for an anti-adhesive agent, thereby improving economical efficiency. .
因に、本発明方法によれば、従来の方法に比べて作業性
を約3分短縮することができる。また、パターン露光後
に全てのフォトマスク16を容易に剥離できたが、従来
方法によるものでは、25%のフォトマスクI6を完全
に剥せないことが実験的に確認された。Incidentally, according to the method of the present invention, work efficiency can be reduced by about 3 minutes compared to the conventional method. Further, although all of the photomasks 16 could be easily peeled off after pattern exposure, it was experimentally confirmed that 25% of the photomask I6 could not be completely peeled off using the conventional method.
以上説明した如く、本発明に係る・半導体ウェハのパタ
ーン露光方法によれば、ウェハまたはマスクの表面に吸
着防止剤を塗布することなく、ウェハとマスクの離れを
容易にして作業性及び経済性を向上させることができる
等顕著な効果を奏するものである。As explained above, according to the semiconductor wafer pattern exposure method according to the present invention, the wafer and mask can be easily separated without applying an anti-adsorption agent to the surface of the wafer or mask, thereby improving workability and economy. It has remarkable effects such as being able to improve performance.
第1図は、従来の方法でレジスト膜のパターン露光を行
っている状態を示す説明図、第2図(8は、従来方法に
て使用する真空チャックの平面図、同図(Elは、同真
空チャックの断面図、第3図(5)は、本発明方法にて
使用する真空チャン”りの平面図、同図(至)は、同真
空チャックの断面図、@4図(N乃至同図(qは、本発
明方法を工程順に示す説明図である。
10・・・真空チャック、10a・・・頂部、lI・・
・半導体ウェハ、12・・・吸着孔、13・・・凸部、
14・・・レジスト膜、I5・・・隙間、16・・・フ
ォトマスク、17・・・隙間。
出願人代理人 弁理士 鈴 江 武 彦矛1図
第2図FIG. 1 is an explanatory diagram showing a state in which pattern exposure of a resist film is performed using a conventional method, and FIG. 2 (8 is a plan view of a vacuum chuck used in the conventional method; Figure 3 (5) is a cross-sectional view of the vacuum chuck, and Figure 3 (5) is a plan view of the vacuum chamber used in the method of the present invention. Figure (q is an explanatory diagram showing the method of the present invention in the order of steps. 10... Vacuum chuck, 10a... Top, lI...
- Semiconductor wafer, 12... suction hole, 13... convex part,
14...Resist film, I5...Gap, 16...Photomask, 17...Gap. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2
Claims (1)
記半導体ウェハを該レジスト膜の形成面側に凸状に変形
させた後、該レジスト膜上にフォトマスクを載置する工
程と、該フォトマスクをマスクにして前記レジスト膜に
露光処理を施す工程とを具備することを特徴とする半導
体ウェハへのパターン露光方法。a step of forming a resist film on a surface of a semiconductor wafer; a step of placing a photomask on the resist film after deforming the semiconductor wafer into a convex shape toward the surface on which the resist film is formed; and a step of placing a photomask on the resist film; A method for pattern exposure on a semiconductor wafer, comprising the step of subjecting the resist film to exposure using a mask.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58012521A JPS59138336A (en) | 1983-01-28 | 1983-01-28 | Method for exposing pattern on semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58012521A JPS59138336A (en) | 1983-01-28 | 1983-01-28 | Method for exposing pattern on semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59138336A true JPS59138336A (en) | 1984-08-08 |
Family
ID=11807639
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58012521A Pending JPS59138336A (en) | 1983-01-28 | 1983-01-28 | Method for exposing pattern on semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59138336A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6951593B2 (en) * | 2001-01-15 | 2005-10-04 | Lintec Corporation | Laminating device and laminating method |
-
1983
- 1983-01-28 JP JP58012521A patent/JPS59138336A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6951593B2 (en) * | 2001-01-15 | 2005-10-04 | Lintec Corporation | Laminating device and laminating method |
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