JPS59133589A - Expansion display for matrix panel display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention 0) Industrial Field of Application The present invention is a method for displaying television images, etc. using a matrix panel having liquid crystal (LCD) elements and LED (light emitting diode) elements as light emitting display elements. The present invention relates to a matrix panel display device.

(0) Conventional technology In recent years, LCDs have been used as an alternative to glass tubes.

Matrix panels using LEDs and the like have begun to be put into practical use, but because it is difficult to integrate a large number of display elements at a high density, this type of display panel requires less power than a single unit such as a television video signal. It consists of For this reason%
Display device KF using a prayer panel: When enlarging and displaying a part of an image, it can be easily realized, as when displaying a video signal in an analog manner using a glass tube. was difficult.

(c) Purpose of the Light The present invention has been made in view of the above points, and proposes a method that is compatible with the above-mentioned matrix panel display device and can display the image size in a comparatively soft TtI simply by increasing A1. The purpose is to

9. Summary of the Invention The present invention provides l! to be displayed in the matrix panel display device as described above. 9! : A of 1H of image signal /
l) Normal display mode 1 for the A/D conversion circuit that performs conversion.
At the same time as supplying a sampling clock of 1 wave number, the operation of the A/D conversion circuit, which is performed once for mHV in the normal display mode, is set to -H once for each row +1, and each time (1 line). The A/D & converter output for 10 minutes is stored in the memory, and the signal for one line read every nH from this memory is used as the horizontal drive signal, and the pulse generated every nH is the vertical drive signal. It is characterized by the use of a matrix panel.

(E) Embodiment @ Figure 1 shows a schematic configuration of an embodiment of a matrix panel display device employing the present invention. force, tarotsuk generation part), enlarged position specification part (earth),
Tarots Cliff Kanto q) The power and the structure are weakened.

In the matrix panel section il+, the Y' electrode group in the water direction is 160/J-, and the vertical X'c is 4%.
7. i! jj The LCD panel (6) having 120 units, that is, 160×120 units of display water, the Y side shift register (7), the latch circuit (8), and the Y electrode driver circuit G (91> Fang Kaiju 薊渞恞) and X
tuff shift register (l 1) EC Hi

The display signal generation unit (text) is an amplifier 111 that receives a television video signal or a reproduced video signal from the VTR''4.
i2 circuit (14) and a predetermined valley 1H of its output video signal
A103p sequentially at the sampling timing to state the details
7 options (A/D change time 1G (15i), selection time W4j+6.l switched by mode switching signal (MC),
The A/D that can be derived by this selection 1 (approximately α6)
The configuration includes a pair of field memories (17) that store the output signals of the switching circuit (15) one line at a time.

The tarok generator Sj generates horizontal and vertical signals from the video signal 1fl1MlijJJVHs9 (i(S) (V
S) Synchronization separation circuit that outputs w minutes mm (1st sampling clock (CA
I) and shift clock (CB), and a second sampling clock (CA).
2) Consists of (i-generated brown 2 clock circuit).

Here, while it is a 320H period pulse generated every 1H within the self-induced eclipse interval (240H) in the second sampling clock (CA2) ld1 field,
The first sampling pulse (CAl) is a pulse that is generated during 1H within the above-mentioned effective stationary period and α in the next 1H.

Further, the shift clock (L, :B) is a pulse every 2H. (Fig. 2) The expanded position ift designation section jj) id, horizontal synchronization signal (
H8) is reset and the previous Kyo 2 sampling clock (
CA2) is reset by the Y-side kakunta (21), which generates an output from the time when the number determined by the Y-side preset signal (ys) is counted until the time when 160 pulses are counted, and the ``$ direct synchronization signal (VS). The X-side counter generates an output from the time when the horizontal period signal (H8) is counted by the number determined by the X-side preset signal (XS) until the time when 120 visited pulses are counted.
I can do it.

@The lock switching part) is the previous Y side kakunta (21)
and X-side counter (second
The clock gate (a) that derives the sampling clock (CA2) and the mode (sword exchange signal 'l' (, 1lif
C) and the first sampling clock (
CA1) or the above-mentioned clock gate (c) gold pass 7c is determined from the tarot switching circuit (24) which derives the second sampling clock (CA2').

Note that (destination) is a counter that is reset by the raw synchronization signal (VS) and generates an output only during the effective scanning period (240H) within one field by counting the horizontal synchronization signal (HS), and this counter ( The output of 2 is the X side shift register 0 of the matrix panel section t1+.
is applied to the Also, examples include horizontal and vertical synchronization signals (H3
) (VS) and generates a luminance signal to be applied to the Y-side driver circuit (9) and the X-side driver circuit (10). Since it is not directly related to this, a detailed explanation will be omitted.

The embodiment of FIG. 1 is generally constructed as described above, and its masterpiece will be explained below with reference to FIGS. 2 to 4.

(T) Normally (confidence of -do in this mode, turn off -do) by the negative signal (MC). Therefore, this A/Df converter circuit (160 samplers in the country of Getaimin'y”
A/j, ) f at the time of sampling.
Circuit output, that is, digital (image metal) signal can be selected (16) V
ζ is introduced. This j/1LjR circuit (lfil is connected to the first pass line (,B
l) The clock is changed to 1+11 and the clock (CAI) from the first tarlock generation circuit (1st clock) is transferred to the shift register (11) of the matrix panel 1n (ill).
Therefore, the shift register (11) stores digit number 1d of 160 strokes per line. And, each of these Id++ is the previous 10th Tsuku occurrence time W!
Since it is latched by the latch circuit (8) at the timing of the other clock (, CB) from I (+9), one station, one
The line's worth of digital signals will be held for a period of 2H.

Then, after each of them (No. 14) is subjected to D/Af conversion in the X electrode driver circuit (9), it is applied to each of the 160 Y electrode groups of the LCD panel (6).

On the other hand, since the output of H Kakunta Ryo is applied to the X side shift register (11) of the matrix panel section (1), the 2H width pulse (SCI) ( SC2)...(SC
xzo) (see Figure 2, Figure 5 (a)), and each pulse is transmitted to a group of 120 X electrodes on the LCD panel (6) via the X electrode driver circuit (12). It is applied to each one one after another.

is displayed on the LCD panel (6).

(b) Anti-perspirant in enlargement mode In this mode, if we are to enlarge the area of 1 area at the center of the screen in Figure 4 - (by i in the vertical and horizontal directions), the The initial value of the side kakunta (21) is set to 80, and the initial value of the X side kakunta v'4 is set by the X-side preset signal (XS). 6
It goes to 0. Then, up to the X side kakunta, the horizontal synchronizing pulse (H5) within the effective scanning period of one field is
The output (XO) (see @6 (b)) is generated from the time when 180 pieces are counted to the time when 180 pieces are counted, and the Y side kakunta (21) outputs the second
Since the output (YO) is generated from the time when 80 tallocks (CA2) from the clock generation circuit (2)) are counted until the time when 240 tallocks are counted, the tally gate (2)
31 is 120H of the effective scanning period 240H after all.
It will be opened only during the -ZH period of the medium heat section within each 1H corresponding to minutes. Therefore, during each IH period of this clock gate ('231), the second tally generating circuit (4)
) are derived in units of 160 clocks (CA2).

Now, in this mode, the clock switching circuit (see Figure 2) uses the mode switching signal (MC) to select each of the 160 clocks (CA2') from the clock gate (support).
is derived and given as a sampling pulse to the A/D conversion circuit (15). Therefore, this A/D conversion circuit 1@(151) performs A/D conversion at 160 sampling timings within each 7H period described above, and each digital signal thereof is introduced for the selection circuit. At this time, this selection circuit (16) has been switched to the second pass line (B2) side by the previous mode switching signal (MC), so the tally clock (CA2') from the tally gate (b) causes the field memory 07) to be selected. One memory of each of the previous two
Digital signals for 160 pixels in H are stored for one line, for a total of 120 lines. Figure 3 (
b) (SCl') (SC2')...(SC120
') indicates the vertical loading timing for this memory.

At the same time as the merging of the praying field memory aη into one side, the beginning of the other memory 0() is carried out, but that 1
By the way, this mt output is the first clock generation circuit (19)
It is performed every 1H by the clock (CAI) from , and is the signal for one valley line used for that pile.

As in normal mode, Y side shift register (7)
The data is stored in the latch circuit (8) and held for 2H periods each by the tally (CB) from the first tally generating circuit (19).

On the other hand, 4. Even in this mode, the output of the H clock generator (B) and the clock (CB) from the first tally clock generation circuit (19) are applied to the X side shift register (1). Driver circuit (12)
The same 2H width pulse (SC1) (S
C2) - (SC120) (see FIG. 5(a)) is applied.

Therefore, in the #I enlargement mode, the central part of the effective screen of one field is enlarged four times and the LCD panel (6)
It is displayed in all songs.

Of course, the magnification magnification and the magnification position 111 can be further adjusted by changing the preset values of the frequency ratio and the Kajunta 5!1).

(F) Effects of the Invention As described above, according to the present invention, in a matrix panel display device in which the unit display unit constituting the matrix panel has fewer pixels than the number of pixels of the video signal to be displayed, the image elements can be You can easily enlarge the section.

[Brief explanation of the drawing]

Figure 1 is Kibatsu F! Figure 2 is a diagram showing the operation timing in the horizontal direction, and Figures 3 (a) and 3 (b) are diagrams showing the timing of the previous work in the half direction due to stagnation in the field memory. FIG. 4 is a diagram showing the enlarged position of the screen. (Sword...matrix panel section, (S)...display signal creation section, (inferior...clock generation capital, (Sat))
... Enlarged position designation section, (Season... Tarot switching section Fig. 2 160 ha9th TS8 Fig. (a) \~\ ゛~\

Claims (1)

[Claims] (1) In a display device in which the number of display elements constituting the matrix panel is smaller than the number of pixels of the video signal to be displayed, 111! The recorded image is A for 1H (1 horizontal scanning period) of the issue.
n in normal display mode to the A/D conversion circuit that performs /D conversion.
Provides a sampling lock of twice the frequency (n is a natural number greater than 2), and in normal display mode mH
The fJ operation of the shearing A/D conversion circuit, which is performed once in (m is a natural number where m≧2), is performed once in mH, and the A/D conversion for each one time (1 line bamboo) is performed. Store the output in field memory,
1H for one line read out from this memory to nl(m)
The main part of the image is enlarged and displayed by n times by driving the matrix panel using the pulse generated every nH as a horizontal drive signal and the pulse generated every nH as a vertical drive signal. An enlarged display method in a matrix panel display device.