JPS59132657A - Photoelectric conversion device - Google Patents

Photoelectric conversion device

Info

Publication number
JPS59132657A
JPS59132657A JP58008367A JP836783A JPS59132657A JP S59132657 A JPS59132657 A JP S59132657A JP 58008367 A JP58008367 A JP 58008367A JP 836783 A JP836783 A JP 836783A JP S59132657 A JPS59132657 A JP S59132657A
Authority
JP
Japan
Prior art keywords
layer
photoelectric conversion
region
regions
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58008367A
Other languages
Japanese (ja)
Inventor
Masato Yoneda
正人 米田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58008367A priority Critical patent/JPS59132657A/en
Publication of JPS59132657A publication Critical patent/JPS59132657A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/075Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To enable the use of a sensitivity layer of a low specific resistance and contrive to improve the transverse directional isolation by providing a plurality of signal sampling electrodes or regions and a photoelectric conversion layer joining thereto and having a selective impurity barrier region. CONSTITUTION:The signal sampling electrodes or regions 8 are selectively arranged on a substrate 7 of semiconductor, etc., and an N type layer 9, an I type layer, and a P type layer 11 composed of amorphous Si are deposited by silan gas, etc. and addition gas. Further, an implanted region 15 is formed by selective ion implantation, e.g., by implanting a P type impurity such as boron B. Next, a clear electrode 12 of an ITO and the like is laminted. It is also available that this implanted substance is a high resistant substance such as oxygen, nitrogen, or carbon. For the formation of this implanted region 15, there is a method such as thermal dispersion by a film source containing impurities. A negative voltage is impressed on the clear electrode 12, and a positive voltage on the sampling electrodes or regions 8, and an electric field E is drawn in the positive direction to electrons.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は光電変換層を有する光電変換装置に関する。[Detailed description of the invention] Industrial applications The present invention relates to a photoelectric conversion device having a photoelectric conversion layer.

従来例の構成とその問題点 近年、W、E 5pearらにより1976年にアモル
ファスシリコンの荷電子制御、即ちP型およびn型半導
体層の形成が可能であることが示されて以来単結晶でな
い非晶質(アモルファス)シリコンの基礎研究並びに応
用研究が盛んにおこなわれるようになってきた。応用研
究の一端としてp−1−n型ダイオード構造をもつ太陽
電池の研究が盛んなことは言うまでもがいが、この光に
よる電流をエネルギーとして利用するのではなく光電変
換上ンサーデバイスへの応用研究も始められている。
Structures of conventional examples and their problems In recent years, since W, E 5pear et al. showed in 1976 that it was possible to control charge electrons in amorphous silicon, that is, form P-type and n-type semiconductor layers, non-single-crystal materials have been developed. Basic and applied research on crystalline (amorphous) silicon has become active. It goes without saying that research into solar cells with a p-1-n diode structure is active as part of applied research, but rather than using the current generated by this light as energy, it is important to apply it to photoelectric conversion sensors. Research has also begun.

一般にアモルファスシリコンはシラン(SiH4)ガス
のクロー放η1:分i++(を法で製作されることが多
く第1図はこの方法で作成された犬陽昂:准の情シ造の
面倒aとハント′モチ/I/bを示し、光電変換センザ
ー嘆も本質的には類似の構造をとる。第1図において、
1はガラス又は金属の基板、2はジボランカス(B2)
!6)などを添加したn型アモルファスシリコンJ’l
’i (nI曽)、3は不純物ガスを添加しないイント
リンシソクアモルファヌシリコンj曽(iFJ)である
。もちろん1層3に微量の不純物ガスを添加しても良い
。4はホヌフィン(PH3)などの不純物ガスを添加し
たp型アモルファスシリコン層(1)J甑)、5は金属
電極(At、Auなと)又は透明型I’1l(ITo 
 々と)である。光は基板1か又は電1″萌5側から入
射する。b図はa図のパント゛モデルを示し、光の入射
によって電子と正孔のキャリア文16が発生し電子は基
板1側へ正孔は電極5の方へ拡散したものが電流となり
外部に取り出される。
In general, amorphous silicon is often manufactured by the method of releasing silane (SiH4) gas by the method of η1:min i++ (Fig. The photoelectric conversion sensor also has essentially a similar structure.In Fig. 1,
1 is a glass or metal substrate, 2 is diborancus (B2)
! 6) n-type amorphous silicon J'l added with etc.
'i (nI so), 3 is an intrinsic amorphous silicon j so (iFJ) to which no impurity gas is added. Of course, a trace amount of impurity gas may be added to each layer 3. 4 is a p-type amorphous silicon layer (1) to which impurity gas such as Honufin (PH3) is added, 5 is a metal electrode (At, Au, etc.) or transparent type I'1l (ITo).
). Light is incident from the substrate 1 or from the side of the substrate 1. Figure b shows the pant model of figure a, and the incidence of light generates a carrier pattern 16 of electrons and holes, and the electrons are transferred to the substrate 1 side. What diffuses toward the electrode 5 becomes a current and is taken out to the outside.

この拡散により両側に到達するキャリア数が多い程外部
へ取り出せる電流量が多くなる。即ちこの1層3の比抵
抗が小さく拡散長が長い程良いわけであり、通常のシラ
ンガヌの分解では比抵抗は約10Ω0m程度である。一
方センザー膜として使用する場合はこの感度層である1
層3の比抵抗が10〜10Ω1− (ニアn層19と大
きくなけれは信号の横方向への拡散が起り信号分間1特
性が悪く々る。
The greater the number of carriers that reach both sides due to this diffusion, the greater the amount of current that can be extracted to the outside. That is, the smaller the resistivity of this single layer 3 and the longer the diffusion length, the better. In normal decomposition of silanganu, the resistivity is about 10Ω0m. On the other hand, when used as a sensor film, this sensitive layer 1
If the resistivity of the layer 3 is not as large as 10 to 10 Ω1- (near n layer 19), the signal will be diffused in the lateral direction, and the signal-to-signal characteristics will be poor.

第2図は太陽電池と同類の構造のセンサーの一例を示し
たもので、a図は半導体などの基板7の上に走査回路(
図示ぜず)により電気的に走査される信号サンプリンク
電極あるいは領域8を配置し、その」―に光電変換層と
してn型アモルファスシリコン層(n 層) 9 、イ
ン1−リンシックアモル77 ヌN (1AQJ7 )
 1Q 、 p 、7rQアモルファスシリコンN(p
層)11および光入射側の透明電極層12が積層されて
いる。b図は光の入射方向が逆であり、透明なガラス基
板13の」二に透明電極12、p型アモルファスシリコ
ンJm (pFJ )’ 11 、イ:/トリンシソク
Ea (ill ) 1o、nW’リアモルファスシリ
コン層(n層)9およびサンプリング電極あるいは領域
8が積層されており、a、bは製造順序が異なる例であ
る。
Figure 2 shows an example of a sensor with a structure similar to that of a solar cell, and Figure a shows a scanning circuit (
A signal sampling link electrode or region 8 is arranged which is electrically scanned by a signal sampling link electrode (not shown), and an n-type amorphous silicon layer (n layer) 9 is formed as a photoelectric conversion layer thereon. (1AQJ7)
1Q, p, 7rQ amorphous silicon N (p
layer) 11 and a transparent electrode layer 12 on the light incident side are laminated. In figure b, the incident direction of light is reversed, and the transparent electrode 12, the p-type amorphous silicon Jm (pFJ)' 11, the amorphous silicon Ea (ill) 1o, nW' rear amorphous silicon is formed on the transparent glass substrate 13. A silicon layer (n layer) 9 and a sampling electrode or region 8 are stacked, and a and b are examples in which the manufacturing order is different.

さてセンサー膜は一般に外部から1・゛リフ1−電界を
印加して光によってセンサー内部で発生した光信号キャ
リア(電子や1F孔)を有効に外部回路に引き出してお
り、この点が太陽電池とは異なる。
Now, in general, sensor membranes apply a 1-ref 1-electric field from the outside to effectively pull out optical signal carriers (electrons and 1F holes) generated inside the sensor by light to the external circuit, and this point is different from solar cells. is different.

また第2図のn層9および9層11は111なるプロソ
キンク層であり、外部電圧を印加した時に正電極からの
正孔の注入、負電極側からの電子の注入を阻止して外部
からの印加電圧による暗電流の増加をおさえて光信号の
S/Nを良くする働きをし、主たる光信号を発生させる
感度層は1層10である。従ってn層9.pJ轡11は
絶縁膜(S102゜Si3N4など)や三硫化アンチモ
ンなどの層であってもよい。寸だこうしたプロソキンク
層を用いることなり感度層と両側の導電電極との仕事関
数の違いによる電子あるいは止孔の注入を阻止する構造
のものでもよい。
In addition, the n-layer 9 and the 9-layer 11 in Fig. 2 are prosokink layers 111, which prevent the injection of holes from the positive electrode and electrons from the negative electrode when an external voltage is applied. One layer 10 serves as a sensitive layer that suppresses the increase in dark current due to applied voltage and improves the S/N ratio of the optical signal, and generates the main optical signal. Therefore, the n-layer 9. The pJ layer 11 may be an insulating film (such as S102°Si3N4) or a layer of antimony trisulfide. By using such a prosokink layer, the structure may be such that injection of electrons or blocking holes is prevented due to the difference in work function between the sensitive layer and the conductive electrodes on both sides.

次に第3図a、bは第2図aを一例としたセンサーとし
ての動作状態を示す。前述のようにセンサーとして使用
するために透明電極12に負の電圧、サンプリング電極
あるいは領域8に正の電圧を印加しセンサー内部にドリ
フト電界E(電子に対して正の方向)を形成する。第3
図aは透明電極12側からサンプリング電1iAの上に
光が入射した時の素子の断面に於ける光信号電荷14(
電子)の移動を模擬的に表現したもので、光信号電荷1
4はセンサー内の1・゛リフト電界Σによりサンプリン
グ電(’MAの方向に移動するが一方すンプリング電(
与Bの方にも拡散現象と電界Eによって多少の光信号電
荷14が移動してしまう。この様子をバンドモデルを用
いて表現したものが第3図すであり、サンプリンク電極
Aの」−に入射した光による光は号14がサンプリンク
電極Bにも移動、蓄蹟され横方向解像度を劣化させる。
Next, FIGS. 3a and 3b show the operating state of the sensor using FIG. 2a as an example. As mentioned above, in order to use it as a sensor, a negative voltage is applied to the transparent electrode 12 and a positive voltage is applied to the sampling electrode or region 8 to form a drift electric field E (positive direction with respect to electrons) inside the sensor. Third
Figure a shows the optical signal charge 14 (
This is a simulated representation of the movement of electrons), where the optical signal charge 1
4 moves in the direction of the sampling voltage ('MA) due to the 1.lift electric field Σ in the sensor, while the sampling voltage (
Due to the diffusion phenomenon and the electric field E, some optical signal charge 14 also moves toward the input B. This situation is expressed using a band model in Figure 3, where the light incident on the sample link electrode A moves to the sample link electrode B, where it is accumulated and the lateral resolution is increased. deteriorate.

このため感度層に徽惜の不純物ガヌ(N2やB2H6な
ど)を添加して高抵抗化をはかることも研究されてはい
るが、高抵抗化により光信号を外部に取り出すのにもよ
り高いドリフト電界が必要と々り低電圧駆動が困ガ[で
あり、低電圧駆動で且つ高解像1隻という三者の条件を
満足することに問題点を有していた。
For this reason, research has been conducted to increase the resistance by adding the impurity Ganu (N2, B2H6, etc.) to the sensitive layer, but increasing the resistance also makes it more expensive to extract the optical signal to the outside. Since a drift electric field is required, low-voltage driving is difficult, and there is a problem in satisfying the three conditions of low-voltage driving and one high-resolution device.

発明の目的 本発明はかかる問題に鑑み、比抵抗の低いj感度層の使
用を可能とし、寸だ横方向分間1を改善した構造のセン
サーを提供するものである。
OBJECTS OF THE INVENTION In view of the above-mentioned problems, the present invention provides a sensor having a structure that enables the use of a j-sensitivity layer having a low specific resistance and significantly improves the transverse direction.

発明の構成 本発明は複数個の信号サンプリンク電極あるいは領域と
、これに結合し選択的な不純物バリア領域をもつ光電、
変換層を備えた光電変換装置であり、選択的な不純物バ
リア領域により光信号の横方向拡散を抑制し横方向解像
度を改善するものである。
SUMMARY OF THE INVENTION The present invention provides a photovoltaic device having a plurality of signal sampling link electrodes or regions and a selective impurity barrier region coupled thereto.
This is a photoelectric conversion device including a conversion layer, which suppresses lateral diffusion of optical signals by selective impurity barrier regions and improves lateral resolution.

実施例の説明 7 第4図は横方向解像度の改善を目的として第4図aの深
い注入領域15を選択的に形成した構造の本発明の一実
施例センザー構造を示し、第2゜3図を同一部分には同
一番号を伺す。第4図の作成方法は半導体などの基板7
の上に信号サンプリング電極あるいは領域8を選択的に
配置しプラズマクロー放電分解法によりシランガヌ(5
iH4)などおよび添加ガスによりアモルファスシリコ
ンよりなるn型層9.1)脅10.p型層11を堆積さ
せ更に選択的なイオン注入たとえばボロンBなどのp型
不純物を注入して注入領域15を形成する。
DESCRIPTION OF EMBODIMENT 7 FIG. 4 shows a sensor structure according to an embodiment of the present invention in which the deep implantation region 15 shown in FIG. 4a is selectively formed for the purpose of improving lateral resolution, and FIG. Please use the same number for the same part. The manufacturing method shown in Fig. 4 is for a substrate 7 such as a semiconductor.
A signal sampling electrode or region 8 is selectively placed on top of the silanganu (5
iH4) etc. and an n-type layer made of amorphous silicon by adding gas 9.1) Threat 10. A p-type layer 11 is deposited, and then a p-type impurity such as boron B is selectively implanted to form an implanted region 15.

次いでITOなどの透明電極12を積層する。この深い
注入領域15の形成のためにイオン注入だけでは不充分
である場合は、低温(約300℃)での水素プラズマ中
あるいは水素炉での熱処理や、レーザーによる選択的熱
処理等も考えられる。
Next, a transparent electrode 12 such as ITO is laminated. If ion implantation alone is insufficient to form the deep implanted region 15, heat treatment in hydrogen plasma or a hydrogen furnace at a low temperature (approximately 300° C.), selective heat treatment using a laser, etc. may also be considered.

またこの注入物質は酸素や穿索や炭素などの高抵抗化物
質であっても良い。一般に単結晶のシリコン中では30
0℃程度の低温での不純物の拡散は非常に遅く1〜2μ
mの深い拡散層を形成するには数十日以上の熱処理が必
要であるが、アモルファスシリコンでは単結晶の場合よ
り10桁程度も早く、数時間以下の低温熟熱121Hに
より可能である。
The injection material may also be a high resistance material such as oxygen, perforation, or carbon. Generally, in single crystal silicon, 30
Diffusion of impurities at low temperatures of around 0°C is extremely slow, 1-2μ
Forming a deep diffusion layer of m depth requires heat treatment for several tens of days or more, but in amorphous silicon it is possible by low temperature aging 121H in several hours or less, which is about 10 orders of magnitude faster than in the case of single crystal.

もちろん注入領域15の形成には不純物を含むフィルム
源による熱拡散などの方法もある。
Of course, the injection region 15 can also be formed by thermal diffusion using a film source containing impurities.

第4図すはa図の1苗造をもつセンサーの動作状態のエ
ネルギーバンド図であり、透明電極12には負の電圧、
サンプリング電極あるいは領域8には止の電圧が印加さ
れており、電界Eは電子に対して正の方向に描いである
。第4図すの16のボテンシャル的な丘の部分が深い注
入領域であり、サンプリンク電糊五の−に面の光により
発生した光信号電荷14はセンサー内の1−′リフ1−
電界Eによりサンプリンク電+iAに流れていく。この
時拡11・k現象により1黄方向へのにじみとなろうと
するが、横方向には深い注入領域16[よるポテンシャ
ル障壁が形成されており拡散現象を妨げ、結果として隣
りのサンプリング電極Bに移動し蓄積される信号電荷は
少量となり横方向解像度の劣化が改善される。
Figure 4 is an energy band diagram of the operating state of the sensor with one seedling shown in figure a, with a negative voltage applied to the transparent electrode 12,
A stop voltage is applied to the sampling electrode or region 8, and the electric field E is drawn in the positive direction with respect to the electrons. The potential-like hill part 16 in Figure 4 is a deep injection region, and the optical signal charge 14 generated by the light on the - surface of the sample link electrode 5 is transferred to the 1-' rift 1- in the sensor.
The electric field E causes the sample link electric current to flow to +iA. At this time, due to the expansion 11·k phenomenon, it tends to bleed in the 1-yellow direction, but a potential barrier is formed in the lateral direction by the deep injection region 16, which prevents the diffusion phenomenon, and as a result, the adjacent sampling electrode B The amount of signal charge that moves and accumulates is small, and deterioration in lateral resolution is improved.

7.7 同様に第5図a、bは光の入射が基板側からの素子の構
造およびバンド(1?1造図を示す。ガラスなどの基板
13の上に透明電極層12.p型層11゜1層10.n
型層9および信号サンプリング電極あるいは領域8を形
成し、更に深い注入領域15を形成する。この形成はサ
ンプリンク電極8をマスクにしても良いし、nバに層9
の後にパターン出しを行い注入あるいは拡散して次にサ
ンプリング電極8を形成しても良い。この場合も深い注
入領域が1層1o即ち感度層内部まで深く注入されてお
り、光の入射により発生する光信号電荷14はドリフト
電界Eによりサンプリンク電極側に移動するが、この時
深い注入領域16のポテンシャル障壁により、たとえば
低い比抵抗(約10Ω、Crn)程度の感度層を用いて
も横方向の拡散を防ぐことができる。
7.7 Similarly, FIGS. 5a and 5b show the structure and band (1?1) structure of the element when light is incident from the substrate side. On the substrate 13 such as glass, there is a transparent electrode layer 12 and a p-type layer. 11゜1 layer 10.n
A mold layer 9 and a signal sampling electrode or region 8 are formed, and a deep implant region 15 is formed. This formation may be done by using the sample link electrode 8 as a mask, or by using the layer 9 on the n-bar.
After that, patterning may be performed, and the sampling electrode 8 may be formed by implantation or diffusion. In this case as well, the deep injection region is injected deep into the layer 1o, that is, into the sensitive layer, and the optical signal charge 14 generated by the incidence of light moves toward the sample link electrode due to the drift electric field E, but at this time, the deep injection region The potential barrier of 16 makes it possible to prevent lateral diffusion even when using a sensitive layer with, for example, a low resistivity (approximately 10 Ω, Crn).

更に第6図a、bは光電変検素イの上面からの注入ある
いは拡散ではなく光電変換層を形成する前にあらかじめ
基板側に拡散源をサンプリング電極の間に製作しておき
、前述のような熱処理をほどこすことによりバリア領域
を設ける素子である。
Furthermore, Figures 6a and b show that instead of injection or diffusion from the top surface of the photoelectric conversion sensor A, a diffusion source is fabricated on the substrate side between the sampling electrodes before forming the photoelectric conversion layer, as described above. This is an element in which a barrier region is provided by applying a heat treatment.

aにおいて7は半導体などの基板、8は信号サンプリン
グ電極あるいは領域、9はアモルファスシリコンn型層
、10はi層、11はp型層、12は透明電極で、15
は不純物バリア領域であり、16はバリア領域16の形
成のだめの拡散源である。この例でも、光により発生し
た信号電荷14はやはり不純物バリア領域により横方向
への拡散が抑制され解像度の劣力をきたすことはない。
In a, 7 is a substrate such as a semiconductor, 8 is a signal sampling electrode or region, 9 is an amorphous silicon n-type layer, 10 is an i-layer, 11 is a p-type layer, 12 is a transparent electrode, 15
is an impurity barrier region, and 16 is a diffusion source for forming the barrier region 16. In this example as well, the signal charges 14 generated by light are prevented from diffusing in the lateral direction by the impurity barrier region, so that resolution is not degraded.

また図すは同様に基板からの拡散源による不純物バリア
領域の形成の別の例であり、前述の図と同一部分には同
一番号を付す。
The figure also shows another example of forming an impurity barrier region using a diffusion source from the substrate, and the same parts as in the previous figure are given the same numbers.

第6図の例によれは、バリア領域15が基板7゜13の
近傍に存在し・、光電変換層10の」一方にバリア領域
16がないため光電変換効率がより向」ニすることにな
る。
In the example of FIG. 6, the barrier region 15 is present near the substrate 7° 13, and the barrier region 16 is absent on one side of the photoelectric conversion layer 10, so the photoelectric conversion efficiency is further improved. .

寸だこれまでは光信号キャリアとして主に電子をとり扱
って来たが正孔でも良く、このときはバイアス電圧を逆
に印加すればよい。まだ、実施例の一例としてアモルフ
ァスシリコンをとり−にけたが、他のアモルファス物質
たとえばゲルマニウムなどでも良く、壕だ最近の多結晶
シリコンのレーザーアニールによる再結晶シリコンによ
る光電変換層であっても、捷たもちろん中結晶シリコン
やゲルマニウムあるいは化合物半導体、化合物アモルフ
ァスでも良いことはいう寸でもない。ただ、その場合は
深い注入領域のバリア障壁を形成する方法は選択的レー
ザーアニールなどの技術が必要である。また、n型層、
p型層は前述のようにプロソギング層や半導電電極との
仕事関数の違いを利用したショートギー障壁層であって
も良い。
So far, we have mainly treated electrons as optical signal carriers, but holes can also be used, in which case a bias voltage can be applied in the opposite direction. Although we have taken amorphous silicon as an example of the embodiment, other amorphous materials such as germanium may be used, and even a photoelectric conversion layer made of recrystallized silicon produced by laser annealing of polycrystalline silicon, which has recently been applied, may also be used. Of course, medium-crystalline silicon, germanium, compound semiconductors, and compound amorphous materials are not necessarily suitable. However, in that case, a technique such as selective laser annealing is required to form a barrier in the deep implanted region. In addition, an n-type layer,
As described above, the p-type layer may be a prosogging layer or a short-Gy barrier layer that utilizes the difference in work function from the semiconducting electrode.

発明の効果 以上のように本発明によりは、比較的低い比抵抗のWS
SMCim)を持つアモルファスシリコンセンサーの横
方向解像度の改善を、たとえばイオン注入という従来よ
り単結晶シリコン技術に用いられる方法等の応用により
達成することができ、従来のI−■族の化合物センサー
や他のアモルファス化合物上ンサーに比べ汚染などの心
配もなくシリコンプロセスに容易に導入しうるセンサー
が可能となる。
Effects of the Invention As described above, the present invention provides a WS with relatively low resistivity.
Improving the lateral resolution of amorphous silicon sensors with SMCim) can be achieved by applying techniques such as ion implantation, traditionally used in single-crystal silicon technology, compared to conventional Group I-■ compound sensors and others. This makes it possible to create a sensor that can be easily introduced into a silicon process without worrying about contamination compared to sensors based on amorphous compounds.

捷だ、この低い比抵抗の感度層をもつセンサーはアモル
ファス、単結晶、化合物などの作IJk物質に関係なく
、光信号電荷の移動段が大き〈従来型の高い比抵抗の感
度層をもつセンサーに比べ低いハイアヌ電即で駆動する
ことができ、近年の低消費電力化にもみあう低電圧駆動
センサーを可能ならしめるものである。
The sensor with this low resistivity sensitive layer has a large optical signal charge transfer stage regardless of the IJk material, such as amorphous, single crystal, or compound. This makes it possible to create a low-voltage drive sensor that can be driven at a lower power consumption compared to the conventional sensor, and is compatible with the recent reduction in power consumption.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a、) 、 (b)けそねそれ従来の太陽電池
の断面構造図、そのバンドモデル図、第2図(a) 、
 (b)は太陽電池と同類の構造の従来のセンサー1+
7.II造のセンサー構造断面図、第3図(a−) 、
 、(b)はそれぞれセンサーの動作状態の概念図、バ
ンドモデル図、第4図(a) 、 (b)はそれぞれ本
発明の一実施例にかかる深い注入領域を選択的に持つ構
造のセンサー動作状態の概念断面図、ハンドモデル図、
第6図(a) 、 (b)は本発明の他の実施例のセン
サー(?/I造の素子の駆動状態の概念断面図、バント
′モデル図、第6図(a)。 (b)は深い不純物バリア領域の形成のために基板側1
3   。 に拡散源をもつ実施例の構造図である。 7・・・・・・半導体などの基板、8・・・・・・信号
サンプリング電極あるいは領域、9・・・・・・n型ア
モルファスシリコン層(nJEl)、10・・・・・・
イントリンシックアモルファスシリコンIi@(i7t
d)、11・・・・・・p型アモルファスシリコン層(
p層)、12・・・・・・透明電極層、13・・・・・
・ガラヌ基板、14・・・・・・光信号電荷(電子)、
16・・・・・・深い注入領域、16・・・・・・不純
物拡散源。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図 第3図 第4図 @5図 介
Figure 1 (a,), (b) Cross-sectional structure diagram of a conventional solar cell, its band model diagram, Figure 2 (a),
(b) is a conventional sensor 1+ with a structure similar to that of a solar cell.
7. Cross-sectional view of the II-built sensor structure, Figure 3 (a-),
, (b) are a conceptual diagram and a band model diagram of the operating state of the sensor, respectively, and FIGS. 4(a) and (b) are respectively the operation of a sensor with a structure having selectively deep injection regions according to an embodiment of the present invention. Conceptual cross-sectional diagram of the state, hand model diagram,
FIGS. 6(a) and 6(b) are conceptual cross-sectional views of the driving state of the sensor (?/I-structured element) of another embodiment of the present invention, and a Bund' model diagram; FIG. 6(a).(b) is the substrate side 1 for forming a deep impurity barrier region.
3. FIG. 3 is a structural diagram of an embodiment having a diffusion source in FIG. 7... Substrate such as semiconductor, 8... Signal sampling electrode or region, 9... N-type amorphous silicon layer (nJEl), 10...
Intrinsic amorphous silicon Ii@(i7t
d), 11... p-type amorphous silicon layer (
p layer), 12...transparent electrode layer, 13...
・Galanu substrate, 14... Optical signal charge (electron),
16... Deep implantation region, 16... Impurity diffusion source. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Figure 4 @ Figure 5

Claims (2)

【特許請求の範囲】[Claims] (1)複数個の信号サンプリング電極あるいは領域と、
前記サンプリング電極あるいは領域に結合した光電変換
層と、前記光電変換層に選択的に形成された前記複数個
のサンプリング電極あるいは領域に集められる光信号の
横方向分離用不純物バリア領域とを有することを特徴と
する光電変換装置。
(1) a plurality of signal sampling electrodes or regions;
A photoelectric conversion layer coupled to the sampling electrode or region, and an impurity barrier region selectively formed in the photoelectric conversion layer for lateral separation of optical signals collected in the plurality of sampling electrodes or regions. Features of photoelectric conversion device.
(2)不純物バリア領域が光電変換層の表面層あるいは
プロソキンク層から感度層まで達していることを特徴と
する特許請求の範囲第1項に記載の光電変換装置。
(2) The photoelectric conversion device according to claim 1, wherein the impurity barrier region extends from the surface layer or prosokink layer of the photoelectric conversion layer to the sensitive layer.
JP58008367A 1983-01-20 1983-01-20 Photoelectric conversion device Pending JPS59132657A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58008367A JPS59132657A (en) 1983-01-20 1983-01-20 Photoelectric conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58008367A JPS59132657A (en) 1983-01-20 1983-01-20 Photoelectric conversion device

Publications (1)

Publication Number Publication Date
JPS59132657A true JPS59132657A (en) 1984-07-30

Family

ID=11691264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58008367A Pending JPS59132657A (en) 1983-01-20 1983-01-20 Photoelectric conversion device

Country Status (1)

Country Link
JP (1) JPS59132657A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5349981A (en) * 1976-10-18 1978-05-06 Nippon Telegr & Teleph Corp <Ntt> Photoelectric conversion element
JPS57187976A (en) * 1981-05-13 1982-11-18 Matsushita Electric Ind Co Ltd Semiconductor photoelectric converter
JPS57193057A (en) * 1981-05-22 1982-11-27 Nec Corp Photodiode array

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5349981A (en) * 1976-10-18 1978-05-06 Nippon Telegr & Teleph Corp <Ntt> Photoelectric conversion element
JPS57187976A (en) * 1981-05-13 1982-11-18 Matsushita Electric Ind Co Ltd Semiconductor photoelectric converter
JPS57193057A (en) * 1981-05-22 1982-11-27 Nec Corp Photodiode array

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