JPS59129468A - Composite optical semiconductor element - Google Patents

Composite optical semiconductor element

Info

Publication number
JPS59129468A
JPS59129468A JP58003360A JP336083A JPS59129468A JP S59129468 A JPS59129468 A JP S59129468A JP 58003360 A JP58003360 A JP 58003360A JP 336083 A JP336083 A JP 336083A JP S59129468 A JPS59129468 A JP S59129468A
Authority
JP
Japan
Prior art keywords
layer
junction
light
semiconductor
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58003360A
Other languages
Japanese (ja)
Other versions
JPH0343790B2 (en
Inventor
Masaru Nakamura
優 中村
Takeshi Koseki
健 小関
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Toshiba Corp
Original Assignee
Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58003360A priority Critical patent/JPS59129468A/en
Publication of JPS59129468A publication Critical patent/JPS59129468A/en
Publication of JPH0343790B2 publication Critical patent/JPH0343790B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
    • H01L31/16Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources
    • H01L31/167Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers
    • H01L31/173Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers formed in, or on, a common substrate

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To insulate both a semiconductor light-emitting element and a semiconductor photo-detecting element electrically sufficiently, and to enable unifying so that the junction capacitance is reduced by each forming diodes under reverse bias to several P-N junction of the semiconductor light-emitting element and the semiconductor photo-detecting element. CONSTITUTION:A semiconductor light-emitting element consisting of an LED3-10 with a P-N junction forming a light-emitting section and a photo-detecting element consisting of a photodiode PD3-20 with a P-N junction detecting an optical output from the LED3-10 are unified between opposite each N layer of these two P-N junctions through a low impurity concentration layer 3-30 and a P layer 3-50 each functioning as P-N junctions under reverse bias to these P-N junctions. In such structure, diodes 3-70, 3-71 under reverse bias are each formed to several P-N junction of the LED3-10 and the PD3-20 as shown in an equivalent circuit. Accordingly, the LED3-10 and the PD3-20 are insulated electrically and can be unified, and junction capacitance between both elements can be reduced.

Description

【発明の詳細な説明】 [発明の属する技術分野] この発明は半導体発光素子と半導体光検出素子とからな
る複合光半導体素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a composite optical semiconductor device comprising a semiconductor light emitting device and a semiconductor photodetecting device.

[従来技術とその問題点] 近時、光通信技術の釘なる発展を0指して、光半導体素
子の複合化が盛んである。
[Prior art and its problems] In recent years, with the rapid development of optical communication technology, the integration of optical semiconductor devices has become popular.

このような複合化に於いては、従来、第1図に示すよう
な、例えば発光ダイオード(以下LEDと略称する)(
1−10)からなる半導体発光素子上に抵抗性層となる
低不純物濃度層(1−:30 )を介して、例えばフォ
トダイオード(以下FDと略称する)(1−20)から
なる光検出素子が形成されたものが考案されている。
In such compounding, conventionally, for example, a light emitting diode (hereinafter abbreviated as LED) (as shown in FIG. 1) has been used.
For example, a photodetector element consisting of a photodiode (hereinafter abbreviated as FD) (1-20) is placed on the semiconductor light emitting element consisting of 1-10) via a low impurity concentration layer (1-:30) serving as a resistive layer. has been devised.

前記LED(1−10)は、例えばP型GaA@からな
る基板(i −11)上に、例えばN型GaAaからな
る電流狭窄層(1−12)を介して、例えばP型Ga以
A6からなる第1の組成層(1−+3)が形成されてい
る。
The LED (1-10) is formed of, for example, P-type Ga or A6 on a substrate (i-11) made of, for example, P-type GaA@, through a current confinement layer (1-12) made of, for example, N-type GaAa. A first composition layer (1-+3) is formed.

れている構造となっている。また、とのbzD(1−1
0)の一方の電極(1−16)は、N型GaALA6か
らなる第2の組成層(1−15)の上部表面の一部に設
けられており、他方の電極(1−17)は、P型GaA
6からなる基板(1−11)の下部表面番二股けられて
いる。
The structure is as follows. Also, bzD(1-1
One electrode (1-16) of 0) is provided on a part of the upper surface of the second composition layer (1-15) made of N-type GaALA6, and the other electrode (1-17) is P-type GaA
The lower surface of the substrate (1-11) consisting of 6 is divided into two parts.

次直二、前記FD(1−20)は、例えばN型G4ΩA
8からなるN型層(1−22)上≦二、例えばP型Ga
kBからなるP型層(1−23)が形成されて構成され
ている。
Next, the FD (1-20) is, for example, N type G4ΩA
N-type layer (1-22) consisting of 8≦2, e.g. P-type Ga
A P-type layer (1-23) of kB is formed.

このFD(1−20)の一方の@極(1−24)は、N
型層(1−22)の上部表面の一部に設けられ、他方の
%L極(1−25)は、P型層(1−23)の一部にオ
ーミックコンタクトを得るために形成された拡散層形成
部(1−26)の上部表面に設けられている。
One @ pole (1-24) of this FD (1-20) is N
It was provided on a part of the upper surface of the type layer (1-22), and the other %L pole (1-25) was formed to obtain ohmic contact with a part of the P-type layer (1-23). It is provided on the upper surface of the diffusion layer forming section (1-26).

以上の構造I−より、  L E D (1−1o)か
らの光出力の一部はPD(1−20)で検出され、さら
に光出力の他の一部はF D (1−20)を透過して
外部を二設けられた、例えば光ファイバ(1−40)か
らなる光伝送路へ入射する。
From the above structure I-, part of the optical output from L E D (1-1o) is detected by PD (1-20), and another part of the optical output is detected by F D (1-20). The light passes through and enters an optical transmission line provided externally, for example, consisting of an optical fiber (1-40).

そI7て前記光出力の一部を検出したPD(1−20)
からの電気出力は、  II E D (1−10)の
モニタに使用される。
PD (1-20) that detected part of the optical output
The electrical output from is used to monitor IIED (1-10).

上述の構造において、L w D (1−10)とFD
(1−20)との間に形成される低不純物濃度層(1−
3+) )は、I、 E D (1−10)とF D 
(1−2(1)を電気的に絶縁してL w D (1−
10)の動作電流がFD(1−20)へ漏れ込むのを防
いでいる。
In the above structure, L w D (1-10) and FD
(1-20) and a low impurity concentration layer formed between (1-20) and (1-20).
3+) ) is I, E D (1-10) and F D
(1-2 (1) is electrically insulated and L w D (1-
10) is prevented from leaking into the FD (1-20).

このような低不純物1IJ4度l@(]−30)は、従
来、例えは特開昭55−145380号公報に開示され
ているように、イオン打込による絶縁層として形成され
ていた。
Such a low impurity 1IJ4°l@(]-30) has conventionally been formed as an insulating layer by ion implantation, as disclosed, for example, in Japanese Patent Application Laid-Open No. 55-145380.

このイオン打込(二より絶縁層を形成する際、高純If
化プロセスの確立しりSlに対してのイオン打込技術で
は不純物濃度の低減は1×10/−以下に達しており、
比抵抗に換q、すると数10にΩ・側の高抵抗層を形成
することが可能となっている。
This ion implantation (when forming the second insulating layer, high-purity If
With the ion implantation technology for Sl, the reduction in impurity concentration has reached 1×10/- or less.
Converting to specific resistance q, it is possible to form a high resistance layer on the Ω· side of several tens of Ω.

しかし々がら、LFiD若しくけ半導体レーザで主とし
て用いられている、例えばGaAB系の組成層に、上述
C二よる、例えば9素又は酸素イオンのイオン打込や、
その細分子線エピタキシャル成長(M B B : M
o1ecular Beam Epitaxy )や有
機金属熱分解気相成長法(MOOVD : Metal
oryanicOhemical Vapor Dep
ositlon )などの技術を用いても不純物濃度を
lX1414/c#l乃至I X 10  / clに
低減するのが限界となっている。
However, ion implantation of, for example, 9-element or oxygen ions using the above-mentioned C2 into a composition layer of, for example, GaAB, which is mainly used in LFiD or structured semiconductor lasers,
Its fine molecular beam epitaxial growth (MBB: M
o1ular beam epitaxy) and metal organic pyrolysis vapor phase deposition (MOOVD: Metal
oryanicOhemical Vapor Dep
Even if techniques such as ositlon) are used, the limit is to reduce the impurity concentration to IX1414/c#l to IX10/cl.

即ち、比抵抗に換算すると数100・1となり、FD(
1−20)の径を、例えば100μmとし、不純物濃度
層(1−30)の厚さを、例えば10μmとした際は、
この低不純物濃度層(1−30)による抵抗は数100
Ω程度の低抵抗となる。
In other words, when converted to specific resistance, it becomes several 100.1, which is FD (
When the diameter of 1-20) is, for example, 100 μm, and the thickness of the impurity concentration layer (1-30) is, for example, 10 μm,
The resistance due to this low impurity concentration layer (1-30) is several hundred
The resistance is as low as Ω.

従って上述の構造C二おいては、第2図に示す等価回路
のととくLEDとFDを低抵抗の不純物濃度層(1−3
0)で結合していることになり、LEDとFDを実除に
電気的に絶縁するのは困難である。
Therefore, in the above structure C2, the LED and FD in the equivalent circuit shown in FIG.
0), and it is difficult to electrically insulate the LED and FD to a certain extent.

その結果、LKDとFDを一体形成したときLEDのm
υ作m’l IAtが一部PDへ流れ込み、FDで真の
モニタ111流を検出することが困難であった。
As a result, when LKD and FD are integrally formed, the LED m
Part of the υ production m'l IAt flowed into the PD, making it difficult to detect the true monitor 111 flow on the FD.

さらに、従来のイオン打込により形成される層の厚さは
1μm程度と々す、この薄い膜のために生ずる容量が太
きく TJw D (1−H))とFD(1−20)と
の間の接合容量が新たな問題として生じていた。
Furthermore, the thickness of the layer formed by conventional ion implantation is about 1 μm, and the resulting capacitance is large due to this thin film. Junction capacitance between the two has arisen as a new problem.

[発明の目的] この発明は上記の欠点を考慮してなされたものであり、
その目的とするところは、LEDとFDとを電気的に十
分絶縁しかつ接合容量が軽減するよう(ニ一体化形成し
て、FDで真のモニタ電流を検出することができる複合
光半導体素子を提供することである。
[Object of the invention] This invention was made in consideration of the above drawbacks,
The purpose of this is to sufficiently electrically insulate the LED and FD and reduce junction capacitance (by forming them in one piece, we can create a composite optical semiconductor element that can detect the true monitor current with the FD). It is to provide.

[発明の概要] この発明け、第10P−N接合を有する半導体発光素子
と、この第1のP−N接合からの光出力を検出する絽2
のP−N接合を有する半導体光検出素子とを、第1およ
び第2のP−N接合の相対する各層間に、抵抗性層であ
る低不純物濃度層と前記第1および第2のP−N接合i
二対して夫々逆バイアスP−N接合となるp fWj若
しくけN層若しくはP−N接合層との積層構造を介して
一体化形成した複合光半導体素子を得るようにしたもの
である。
[Summary of the Invention] The present invention provides a semiconductor light emitting device having a tenth P-N junction, and a cell 2 for detecting light output from the first P-N junction.
A semiconductor photodetecting element having a P-N junction of N junction i
A composite optical semiconductor element is obtained which is formed integrally with two pairs of pfWj, a structure N layer, or a P-N junction layer, each of which forms a reverse bias PN junction, through a laminated structure.

[発明の効果] この発明によりLEDとPDとを電気的ご二十分絶縁す
ることで信号分離を行いかつ接合容量が軽減するよう【
二容易iニ一体化形成することができ、さら5二PDで
真のモニタ電流を検出することができる複合光半導体素
子を得ることができる。
[Effects of the invention] This invention enables signal separation and reduces junction capacitance by electrically insulating the LED and PD by 20 minutes.
It is possible to obtain a composite optical semiconductor device which can easily be formed into two integrated devices and which can detect a true monitor current using 52 PDs.

[発明の実施例] この発明の第1の実施例を紀3図および第4図を診照し
て詣明する。
[Embodiment of the Invention] A first embodiment of the invention will be explained with reference to Figures 3 and 4 of Ki.

発光部を形成する第1のP−N接合を有する、例えばT
J l!!D (a−IO)からなる半導1体発光素子
と、このL B D (3−10)からの光出力を受光
部により検出する第2のP−N接合を有する、例えばP
D(3−20)からなる光検出素子とを、第1および第
2のP−N接合の相対する各N層間に低不純物濃度層(
a−30)と、第1および第2のP−N接合C二対して
夫々逆バイアスP−N接合となるような1層(3−50
)とを介して一体化形成している。
For example, a T
Jl! ! For example, a P-N junction having a semiconductor unitary light emitting device consisting of D (a-IO) and a second P-N junction for detecting the light output from this L B D (3-10) by a light receiving section.
D(3-20), and a low impurity concentration layer (
a-30) and one layer (3-50
) and are integrally formed.

前記LED(3−]0)は、例えば不純物濃度が1×1
018/ctlで、厚さが100乃至200μmのP 
m aahBからなる基板(3−11)上に、例えば不
純物濃度が1×10/crIで、厚さが4乃至5μmの
N型層 a A6からなる電流狭窄層(3−12)を介
して、例えば゛不純物濃度がlXl0 /c−で、厚さ
が4乃至5μmのP型Ga1−絃ムA8 (χ=0.3
乃至0.4)からなる第1の組成層(3−13)が形成
されている。
The LED (3-]0) has an impurity concentration of 1×1, for example.
018/ctl with a thickness of 100 to 200 μm
On a substrate (3-11) made of m aahB, for example, a current confinement layer (3-12) made of an N-type layer aA6 with an impurity concentration of 1×10/crI and a thickness of 4 to 5 μm is formed. For example, a P-type Ga1-metal A8 with an impurity concentration of lXl0/c- and a thickness of 4 to 5 μm (χ=0.3
A first composition layer (3-13) having a composition of 0.4 to 0.4) is formed.

さらにこの第1の組成層(3−13)上には、例えば不
純物濃度が1xio/mで、厚さが1μmのN型GaA
Bからなる活性層(3−14)を介して、例えば不純物
濃度がI X 1018/lr4で、厚さが5μmのN
層Gal −zAJLzAa (χ=0.3乃至0.4
)からなる第2の組成層(3−15)が形成された構造
となっている。
Further, on this first composition layer (3-13), for example, N-type GaA with an impurity concentration of 1 xio/m and a thickness of 1 μm is formed.
For example, N with an impurity concentration of I x 1018/lr4 and a thickness of 5 μm is passed through the active layer (3-14) made of B.
Layer Gal −zAJLzAa (χ=0.3 to 0.4
) A second composition layer (3-15) is formed.

なお、前記電流狭窄層(3−12)は、一部l″−電流
寒中を良くして高発光効率を得るため(二形成したもの
である。
Incidentally, the current confinement layer (3-12) is partially formed in order to improve l''-current flow and obtain high luminous efficiency.

また、とのLED(3−10)の一方の電極(3−16
)は、第2の組成層(3−15)の上部表面の一部に設
けられており、他方の電極(3−17)は基板(3−1
1)の下部表面l二股けられている。
Also, one electrode (3-16) of the LED (3-10) with
) is provided on a part of the upper surface of the second composition layer (3-15), and the other electrode (3-17) is provided on the substrate (3-1
1) The lower surface l is bifurcated.

次C1前記FD(3−20)は、例えば不純物濃度がl
Xl018/dで、厚さが1μmのN型Gal−gAJ
zA6(”=0.3乃至0.4)からなるN型層(3−
22)上に、例えば不純物濃度が1×1018/cdで
、厚さが3μmのP型層、l −ddzAB  (z 
= 0.3乃至0.4)からなるP型層(3−23)が
形成されて構成されている。
Next C1 the FD (3-20) has an impurity concentration of 1, for example.
N-type Gal-gAJ with Xl018/d and a thickness of 1 μm
N-type layer (3-
22) On top, a P-type layer, l -ddzAB (z
= 0.3 to 0.4) is formed and configured.

このFD(3−20)の一方の電極(3−24)は、N
型層(3−22)の上部表面の一部に設けられ、他方の
電極(3−25)は、P型層(3−23)の一部にオー
ミックコンタクトを得るために形成された、例えばP+
型GaA3からなる拡散層(3−26)の上部表面C二
股けられている。
One electrode (3-24) of this FD (3-20) is N
The other electrode (3-25) is provided on a part of the upper surface of the type layer (3-22), and the other electrode (3-25) is formed to obtain an ohmic contact with a part of the P-type layer (3-23), e.g. P+
The upper surface C of the diffusion layer (3-26) made of GaA3 type is bifurcated.

以上のような構造に於いては、I、 B D (3−1
0)のN型層(3−15)とこれ(−相対するFD(3
−20)のN型層(3−22)の各層間にPP型層 3
−50 )を介在させることで、第4図f二示す等価回
路のごとくLED(3−10)およびFD(3−20)
の各P−N接合に対して夫々逆バイアスのダイオード(
3−70および3−71 )が形成されることになる。
In the above structure, I, BD (3-1
0) N-type layer (3-15) and this (-opposed FD (3
-20) PP type layer 3 between each layer of N type layer (3-22)
-50), the LED (3-10) and FD (3-20) can be
A reverse-biased diode (
3-70 and 3-71) will be formed.

即ち、外部回路との接続によって定まるLEn(3−川
)のN型層(3−15)の電位が、FD(3−20)の
N型層(3−22)の電位より高い場合は、I、F!D
(3−Iff)のN型層(3−22)と前記P型層(,
1−50)とで形成されることになるP−N接合が逆バ
イアスのダイオード(3−70)として働くことになる
0甘た、上述の電位関係が逆の場合は%FD(320)
とP型層(3−50)とで形成されることf二なるP 
−N接合が逆バイアスのダイオード(3−71)として
働くことになる。
That is, if the potential of the N-type layer (3-15) of LEn (3-river) determined by the connection with the external circuit is higher than the potential of the N-type layer (3-22) of FD (3-20), I, F! D
(3-Iff), the N-type layer (3-22) and the P-type layer (,
1-50) will act as a reverse-biased diode (3-70).If the above potential relationship is reversed, %FD(320)
and P type layer (3-50).
The -N junction functions as a reverse bias diode (3-71).

一方、P型層(3−50)とともに介在させる抵抗性の
低不純物濃度層(3−30)は、分子線エピタキシャル
成長あるいは有機金属分解気相成長法を用いて5乃至2
0μm程度の厚さとすることができ、LBD(3−10
)とF D (3−2(1)との容量結合を有効に防止
することができる。
On the other hand, the resistive low impurity concentration layer (3-30) interposed together with the P-type layer (3-50) is formed using molecular beam epitaxial growth or metal-organic decomposition vapor phase epitaxy.
The thickness can be approximately 0 μm, and the LBD (3-10
) and F D (3-2(1)) can be effectively prevented.

以上のようにこの発明によれば、上述の構造によりL 
E D (3−In)とFD(3−20)とを電気的に
絶縁して一体化形成することができ、かつLED(3−
10)とF D (3−2(3)との間の接合容量を軽
i1&することができる。
As described above, according to the present invention, L
E D (3-In) and FD (3-20) can be electrically insulated and integrally formed, and LED (3-In) can be electrically insulated and integrated.
10) and F D (3-2 (3)) can be reduced to i1&.

次I:、この発明の第1の実施例をさらに改良した第2
の実施例を第5図を参照1−て説明する。
Next I: A second embodiment that further improves the first embodiment of the invention.
An embodiment will be described with reference to FIG.

I、 E D (3−10)およびP型層(3−56)
、低不純物濃度r@(3−30)の組成、不純物濃度9
層厚等は前述の第1の実施例と同じである。
I, ED (3-10) and P-type layer (3-56)
, composition with low impurity concentration r@(3-30), impurity concentration 9
The layer thickness etc. are the same as in the first embodiment described above.

この第2の実施例は、  LE D (3−10)上に
PP型層 3−50 )および低不純物濃度層(3−:
30 )を介在して形成するFD(5−20)にLED
(3−10)からの光出力を外部に通過させる空間即ち
光通過部(5−60)を設けている。
This second embodiment includes a PP type layer 3-50) and a low impurity concentration layer (3-:
LED on the FD (5-20) formed by interposing
A space (5-60) for passing the light output from (3-10) to the outside is provided.

前記p D (5−2t))は、例えば不純物編度がI
 X 1018/C−で、厚さが1μmのN型GaAB
からなるN型層(5−22)上に、例えば不純物置ル”
がlXl0/lで、厚さが3μmのP型GaA3からな
るP型層(5−23)が形成されている。
The p D (5-2t)) is, for example, if the impurity knitting degree is I
N-type GaAB with X 1018/C- and a thickness of 1 μm
For example, an impurity is placed on the N-type layer (5-22) consisting of
A P-type layer (5-23) made of P-type GaA3 with a thickness of 3 μm and a thickness of 1X10/l is formed.

即ち、L E D (3−10)の活性層(3−14)
からの光出力は、FD(5−20)で受光されるととも
に、その中心部をくり抜いた構造となっている為、光通
過部(5−60)を通って外部にも一部出力され、光フ
ァイバ(1−4t))へ入射する。
That is, the active layer (3-14) of L E D (3-10)
The light output from the FD (5-20) is received by the FD (5-20), and since its center is hollowed out, a portion of the light is output to the outside through the light passage section (5-60). into the optical fiber (1-4t)).

従って、上述の構造で第1の実施例のごとくLF!D(
3−10)とF D (5−2(1)とを電気的に絶縁
しかつ接合容量が軽減するよう一体化形成することがで
き、甘たP D (5−20)の形成面の面積縮小(二
よりFD(5−20)の接合容量を下は高感朋化できる
Therefore, with the above structure, LF! D(
3-10) and F D (5-2 (1)) can be integrally formed to electrically insulate and reduce junction capacitance, and the area of the forming surface of Amata P D (5-20) can be By reducing the junction capacitance of FD (5-20), the sensitivity can be increased.

さらに、■、FD(3−10)の光ファイバ(1−40
)への光出力面とl151−面(二設けられたF D 
(5−20)で受光されることにより、光ファイバー(
1−4(J )への光出力とF D (3−20)への
光出力とが異なる歪を受けることなくかなりの相似波形
として得られるため、 p D (3−2!0)による
モニター梢度を同上させることができる。
In addition, ■, FD (3-10) optical fiber (1-40
) and the light output surface to the l151-plane (two provided F D
(5-20), the optical fiber (
Since the optical output to 1-4 (J) and the optical output to FD (3-20) are obtained as fairly similar waveforms without being subjected to different distortions, monitoring by p D (3-2!0) It is possible to increase the degree of treetopness.

また、FD(3−20)を第1の実施例のごとく透過型
とする際、光ファイバ(1−413)への所定の光出力
を得るためにB、P D (3−20)の組成、不純物
濃ハ19層厚等を極めて精密に設定する必要があるが、
上述のくり抜き構造C−よるとpD(3−20)のM1
成、不純物濃度1層厚等の条件を犬112 に緩和する
ことができる。
In addition, when the FD (3-20) is a transmission type as in the first embodiment, the composition of B and P D (3-20) is changed in order to obtain a predetermined optical output to the optical fiber (1-413). , it is necessary to set the impurity concentration layer thickness etc. extremely precisely.
According to the above hollowed-out structure C-, M1 of pD(3-20)
Conditions such as layer thickness, impurity concentration, and layer thickness can be relaxed to 112 degrees.

なお、LEDとFDとの相対する各相は、上述の第1お
よび第2の実施例においてはN層であるが、上記相対す
る各相が2層であるときけ第1および第2の実施例とは
逆1−%逆バイアスダイオード用としてN層を介在させ
れば良いことは明らかである。
Note that each of the opposing phases between the LED and the FD is N layers in the first and second embodiments described above, but when each of the opposing phases is two layers, the first and second embodiments have N layers. It is clear that it is sufficient to interpose an N layer for a 1-% reverse bias diode, contrary to the example.

さらに、この発明の第3の実施例を第6図および第7図
を参照して説明する。
Furthermore, a third embodiment of the present invention will be described with reference to FIGS. 6 and 7.

L E D (3−10) 、 p型層I!(3−50
)および低不純物温度層(’ 3−30 )の組成、不
純物濃度1層厚等は前述の第10笑施例と同じである。
L E D (3-10), p-type layer I! (3-50
) and the low impurity temperature layer ('3-30), the impurity concentration layer thickness, etc. are the same as in the tenth embodiment described above.

この第3の実施例け、LED (’3−10)とPD(
6−20)とを、LED(3−10)上の積層+1b 
+−P型層(’a−50) + N型層(6−70)お
よび低不純物温度層(3−30)を介在して一体化形成
したものである。
This third example uses LED ('3-10) and PD (
6-20) and the lamination +1b on the LED (3-10)
+- P type layer ('a-50) + N type layer (6-70) and low impurity temperature layer (3-30) are interposed and formed integrally.

ここで前ir!’ F D (6−20)は、例えば不
純物濃度が1 X 1018/dで、卸さが1層mのP
型層 aA6からなるP型層(6−22)上に、例えば
不純物濃度がI X 1018/cr4で、厚さが3μ
mのN型層 a ABからなるN型層(6−2:Dが形
成されている。
Here is the previous ir! ' F D (6-20) is, for example, P with an impurity concentration of 1 x 1018/d and a thickness of 1 layer m.
For example, on the P-type layer (6-22) made of type layer aA6, the impurity concentration is I x 1018/cr4 and the thickness is 3μ.
m N-type layer a N-type layer (6-2: D is formed) consisting of AB.

¥Pた、F D (6−20)の一方の電極(6−24
)ld、P型層(6−22)の−上部表面の一部に設け
られ、他方の電極(6−25)はN型層(6−23)の
上部表面の一部に設けられている。
¥P, one electrode (6-24) of F D (6-20)
)ld, provided on a part of the top surface of the P-type layer (6-22), and the other electrode (6-25) provided on a part of the top surface of the N-type layer (6-23) .

このN型層(6−23)に他方の電極(6−25)を設
ける際は、例えばAu −E11合金を400℃乃至5
00°C程度で熱処理して形成する。
When providing the other electrode (6-25) on this N-type layer (6-23), for example, Au-E11 alloy is heated at 400°C to 50°C.
It is formed by heat treatment at about 00°C.

即ちこの実施例は、L ED (3−10)のN型層(
3−15)とこれに相対するFD(6−20)のP型層
(6−22)の各層間に、LED(3−10)の嬉1の
P−N接合およびF D (6−20)の第2のP−N
接合11対して夫々逆バイアスのP−N接合となるよう
なP型層(3−50)およびN型層 (6−70) 7
5;形成さねている構造となっている。
That is, in this example, the N-type layer (
3-15) and the P-type layer (6-22) of the FD (6-20) facing this, there is a P-N junction of the LED (3-10) and the P-N junction of the FD (6-20). ) second P-N of
A P-type layer (3-50) and an N-type layer (6-70) that form a reverse-biased P-N junction with respect to the junction 11 7
5; It has a structure in which it is formed.

従って%  L Fi D (3−10)のN型層(3
−45)とPD (6−211)のP型層(6−22)
の電位関係C二かかわりなく、第7図C二示す等価回路
のどと< T、 F D(3−10)およびF D (
6−20) l二対して夫々逆バイアスのダイオード(
7−70および7−71)が形成され、面抵抗層となる
Therefore, the N-type layer (3
-45) and P-type layer (6-22) of PD (6-211)
Regardless of the potential relationship C2, the equivalent circuit shown in FIG.
6-20) Reverse biased diodes (
7-70 and 7-71) are formed to form a sheet resistance layer.

以上、この構造により一体化形成するLEDおよびFD
の相対する各層がP型およびN型の異なる層であっても
、TJ Fi D (3−10)とFD(3−20)を
電気的g二絶縁し、かつ接合容量を軽減することができ
る。
As mentioned above, the LED and FD that are integrally formed with this structure
Even if the opposing layers are P-type and N-type, it is possible to electrically insulate TJ Fi D (3-10) and FD (3-20) and reduce the junction capacitance. .

次(ユ、この発明の第3の実施例をさらに改良した給4
の実施例を第8図を参照して説明する。
Next
An example of this will be described with reference to FIG.

L E D (3−10) 、 pff、H1il+ 
(3−50) 、 NmN (6−70)および低不純
物濃度層(3−:30 )の組成、不純物濃度1層厚等
は、前述の第3の実施例と同じである。
L E D (3-10), pff, H1il+
The compositions of the (3-50), NmN (6-70) and low impurity concentration layers (3-:30), the thickness of one layer of impurity concentration, etc. are the same as in the third embodiment described above.

この第4の実施例は、  L K D (3−10)上
に積層j胆にP型層(3−5(1)、N型層(6−70
)および低不純物m度層(3−:30 )を介在して形
成するFD(8−2+’l)−二組2の実施例と同様に
L ED (3−10)からの光出力を外部に通過させ
る光通過部(5−60)を設けたものである。
This fourth embodiment has a P-type layer (3-5(1)) and an N-type layer (6-70) stacked on LKD (3-10).
) and a low impurity layer (3-:30), the light output from the LED (3-10) is transferred to the outside. A light passage section (5-60) is provided to allow the light to pass through.

前記P D (8−20)は、例えば不純物濃度が1×
1018/cdで、厚さが1μmのP型GaABからな
るP型層(8−22)−ヒに、例えば不純物濃度がI 
X 1018/cJで、厚さが3μmのN型層 a A
 BからなるN型層(8−2:3)が形成されている。
For example, the P D (8-20) has an impurity concentration of 1×
1018/cd, the P-type layer (8-22) made of P-type GaAB with a thickness of 1 μm has an impurity concentration of I, for example.
X 1018/cJ, N-type layer with a thickness of 3 μm a A
An N-type layer (8-2:3) made of B is formed.

かつ接合容量を軽減するよう一体化形成し、 FD(8
−20)の接合容量の軽減により高感度化するととがで
きる。
It is also integrally formed to reduce the junction capacitance.
-20) High sensitivity can be achieved by reducing the junction capacitance.

さらに、ファイバ(1−4,0)への光出力とPD(8
−21) ) 謬尭出力とがかなりの相似波形として得
ることができ、また、FD(8−20)の組成、不純物
濃度9層厚等の条件を緩オロすることができる。
Furthermore, optical output to fiber (1-4,0) and PD (8
-21)) It is possible to obtain waveforms that are quite similar to the output, and conditions such as the composition of the FD (8-20), the impurity concentration, and the thickness of the 9-layer layer can be moderately adjusted.

なお% LIDとFDとの相対する各層は、上述の第3
および第4の実施例の場合、LED側がN層でありED
側がP層であるがh LED側がP層   ′でFD側
がN層の場合は、上述の第3および第4の実施例とは積
層関係が逆のP−N接合層を介在させれば良いことは明
らかである。
Note that each opposing layer between LID and FD is the same as the third layer described above.
In the case of the fourth embodiment, the LED side is the N layer and the ED
If the LED side is the P layer and the FD side is the N layer, it is sufficient to interpose a P-N junction layer whose lamination relationship is opposite to that of the third and fourth embodiments described above. is clear.

また、上述の第1乃至第4の実施例CおいてLEDとF
Dとの間に介在する低不純物濃度層とP層若しくはN層
若しくはP−N接合層とのf#層関係が逆の場合でも良
いことは明らかである。
Furthermore, in the first to fourth embodiments C described above, the LED and F
It is clear that the f# layer relationship between the low impurity concentration layer interposed between D and the P layer, N layer, or PN junction layer may be reversed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はLEDとFDを複合化した従来例の構造の断面
図、第2図は第1図に示す従来例の構造の等価回路図で
あり、第3図はこの発明の第1の実施例を示す複合光半
導体素子の断面図、第4図は第3図C示す複合光半導体
素子の等価回路図、第5図は第3図に示す第1の実施例
をさらC二改良した第2の実施例を示す複合光半導体素
子の断面図、第6図はこの発明の第3の実施例を示す複
合光半導体素子の断面図、第7図は第6図に示す複合光
半導体素子の等価回路図であり、第8図は第6図に示す
第3の実施例をさらに改良した第4の実施例を示す複合
光半導体素子の断面図である。 1−40・・・光ファイバ  3−10・・・LFiD
3−11・・・基板    3−12・・・電流狭窄層
3−13・・・第1の組成78  3−14・・・活性
層3−15・・・第2の組成層 3−16.3−17・・・LEDの電極3−20. 5
−20. 6−20. 8−20・・・ED3−22.
5−22.6−23.8−23・・・FDのN型層3−
23.5−23.6−22.8−22・・・FDのP型
層3−24. 3−25. 5−24. 5−256−
24.6−25.8−24.8−25・・・FDの電極
3−26.5−26.6−26.8−26・・・拡散層
3−:30・・・低不純物濃度層 3−50・・・P型
層3−70.3−71.7−70.7−71・・・逆バ
イアスのダイオード 5−60・・・光通過部  6−70・・・N型層代理
人 弁理士 則 近 憲 佑 外1名第8図 手続補正書(自発) 1、事件の表示 昭和58年特願第3360号 2、発明の名称 複合光半導体素子 3、補正をする者 事件との関係 特許出卵人 (307)  東京芝浦電気株式会社 4、代理人 〒io。 東京都千代田区内幸町1−1−6 明細書の発明の詳細な説明の欄 6、補正の内容 (1)明細書第8頁第13行目t7) 「GaAs J
を[GaAs又はGa1−xAffl、As (x =
 0.05〜0.1 )−Jと補正する。 (2)明細書第9頁第6行目乃至第7行目の「Oal 
x、fiJ xAs (x = 0.3乃至0.4)J
を[Ga1 、AA!、As (x=0.3乃至0.4
)又はGaAs Jと補正する。 (3)明細書第14頁第3行目の[GaAs Jを[G
aAs又はGa 1.AidxAs (x = 0.3
〜0.4 ) Jと補正する。 以  上
FIG. 1 is a sectional view of a conventional structure in which an LED and FD are combined, FIG. 2 is an equivalent circuit diagram of the conventional structure shown in FIG. 1, and FIG. 3 is a first embodiment of the present invention. 4 is an equivalent circuit diagram of the composite optical semiconductor device shown in FIG. 3C, and FIG. 5 is a cross-sectional view of the composite optical semiconductor device shown in FIG. 6 is a cross-sectional view of a composite optical semiconductor device showing a third embodiment of the present invention, and FIG. 7 is a cross-sectional view of a composite optical semiconductor device showing a third embodiment of the present invention. This is an equivalent circuit diagram, and FIG. 8 is a sectional view of a composite optical semiconductor device showing a fourth embodiment which is a further improvement of the third embodiment shown in FIG. 1-40...Optical fiber 3-10...LFiD
3-11... Substrate 3-12... Current confinement layer 3-13... First composition 78 3-14... Active layer 3-15... Second composition layer 3-16. 3-17...LED electrode 3-20. 5
-20. 6-20. 8-20...ED3-22.
5-22.6-23.8-23...N-type layer 3- of FD
23.5-23.6-22.8-22...P-type layer 3-24 of FD. 3-25. 5-24. 5-256-
24.6-25.8-24.8-25... FD electrode 3-26.5-26.6-26.8-26... Diffusion layer 3-: 30... Low impurity concentration layer 3-50...P type layer 3-70.3-71.7-70.7-71...Reverse bias diode 5-60...Light passing section 6-70...N type layer substitute Person: Patent Attorney Noriyuki Chika and 1 other Figure 8 Procedural Amendment (Voluntary) 1. Indication of the case, Patent Application No. 3360 of 1982. 2. Name of the invention, composite optical semiconductor device. 3. Name of the person making the amendment. Related: Patent originator (307) Tokyo Shibaura Electric Co., Ltd. 4, agent 〒io. 1-1-6 Uchisaiwai-cho, Chiyoda-ku, Tokyo Detailed description of the invention in the specification column 6, Contents of amendment (1) Specification page 8 line 13 t7) "GaAs J
[GaAs or Ga1-xAffl, As (x =
0.05~0.1)-J. (2) “Oal” on page 9, line 6 to line 7 of the specification
x, fiJ xAs (x = 0.3 to 0.4)J
[Ga1, AA! , As (x=0.3 to 0.4
) or GaAs J. (3) [GaAs J] on page 14, line 3 of the specification
aAs or Ga 1. AidxAs (x = 0.3
~0.4) Corrected as J. that's all

Claims (1)

【特許請求の範囲】 (1)発光部を形成する第1のP−N接合を有する半導
体発光素子と、この半導体発光素子からの光出力の一部
を受光する受光部を形成する第2のP−N接合を有する
半導体光検出素子とを抵抗性層を介して積層形成してな
る複合光半導体索子C1於いて、前記第1および第2の
P−N接合が相対する各層間1”l−、前記第1および
第20P−N接合基一対して夫々逆バイアスのP−N接
合となるようなP層若しくけN層若しくはP−N接合層
を介在させてなることを特徴とする複合光半導体素子0
(2)前記半導体検出素子は、前記半導体発光素子から
の光出力の他の一部を外部i二透過させるものであるこ
とを特徴とする特許請求の範囲第1項記載の複合光半導
体素子。 (8)前記半導体光検出素子は、中央6二前記半導体発
光素子からの光出力の他の一部を外部に通過させる光通
過部を有することを特徴とする特許請求の範囲第1項記
載の捨金光半導体素子。 (4)前記抵抗性層に、5乃至20μmの厚さを有する
ことを特徴とする特許請求の範囲第1項記載の複合光半
導体素子。
[Scope of Claims] (1) A semiconductor light-emitting element having a first PN junction forming a light-emitting part, and a second light-receiving part forming a light-receiving part that receives part of the light output from the semiconductor light-emitting element. In a composite optical semiconductor cable C1 formed by laminating a semiconductor photodetecting element having a P-N junction via a resistive layer, an interlayer 1'' between the first and second P-N junctions faces each other. l-, a P layer or an N layer or a P-N junction layer is interposed between the first and 20th P-N junction groups to form a reverse-biased P-N junction, respectively. Composite optical semiconductor device 0
(2) The composite optical semiconductor device according to claim 1, wherein the semiconductor detection device transmits another part of the optical output from the semiconductor light emitting device to the outside. (8) The semiconductor light detecting element has a light passage section in the center 62 through which the other part of the light output from the semiconductor light emitting element passes to the outside. Waste metal optical semiconductor device. (4) The composite optical semiconductor device according to claim 1, wherein the resistive layer has a thickness of 5 to 20 μm.
JP58003360A 1983-01-14 1983-01-14 Composite optical semiconductor element Granted JPS59129468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58003360A JPS59129468A (en) 1983-01-14 1983-01-14 Composite optical semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58003360A JPS59129468A (en) 1983-01-14 1983-01-14 Composite optical semiconductor element

Publications (2)

Publication Number Publication Date
JPS59129468A true JPS59129468A (en) 1984-07-25
JPH0343790B2 JPH0343790B2 (en) 1991-07-03

Family

ID=11555178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58003360A Granted JPS59129468A (en) 1983-01-14 1983-01-14 Composite optical semiconductor element

Country Status (1)

Country Link
JP (1) JPS59129468A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT201800007970A1 (en) * 2018-08-08 2020-02-08 St Microelectronics Srl OPTOELECTRONIC HETEROSTRUCTURE DEVICE FOR THE EMISSION AND DETECTION OF ELECTROMAGNETIC RADIATION, AND RELATED MANUFACTURING PROCEDURE

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5378794A (en) * 1976-12-23 1978-07-12 Toshiba Corp Photo semiconductor element
JPS55145380A (en) * 1979-05-01 1980-11-12 Nippon Telegr & Teleph Corp <Ntt> Semiconductor photo coupler device

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Publication number Priority date Publication date Assignee Title
JPS5378794A (en) * 1976-12-23 1978-07-12 Toshiba Corp Photo semiconductor element
JPS55145380A (en) * 1979-05-01 1980-11-12 Nippon Telegr & Teleph Corp <Ntt> Semiconductor photo coupler device

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Publication number Priority date Publication date Assignee Title
IT201800007970A1 (en) * 2018-08-08 2020-02-08 St Microelectronics Srl OPTOELECTRONIC HETEROSTRUCTURE DEVICE FOR THE EMISSION AND DETECTION OF ELECTROMAGNETIC RADIATION, AND RELATED MANUFACTURING PROCEDURE
US11049990B2 (en) 2018-08-08 2021-06-29 Stmicroelectronics S.R.L. Heterostructure optoelectronic device for emitting and detecting electromagnetic radiation, and manufacturing process thereof

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