JP2995359B2 - Semiconductor photodetector and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor photodetector formed by providing a pn junction in a semiconductor layer, and more specifically to a semiconductor photodetector having a structure capable of reducing parasitic capacitance and parasitic resistance caused by an ohmic electrode. The present invention relates to a semiconductor photodetector capable of high-speed response and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 2 is a schematic sectional view of a conventional general pin photodiode. Conventional, semiconductor p
A so-called pin photodiode that performs photoelectric conversion using a depletion layer formed by an n-junction includes a p-type conductive layer 23, an n-type low carrier concentration light absorption layer 22, and an n-type conductive layer 21, as shown in FIG. It is configured. An n-type ohmic electrode 26 is attached to the n-type conductive layer 23, and a p-type ohmic electrode 27 is attached to the p-type conductive layer 23. Reference numeral 20 denotes a semi-insulating semiconductor substrate. When an InP substrate, for example, is used as this substrate,
Reference numerals 2 and 23 each include an n-type InP layer, an n-type low carrier concentration InGaAs light absorbing layer, and a p-type InGaAs layer.

A photodiode having such a structure has p
A reverse bias voltage is applied between the n-type conductive layer 23 and the n-type conductive layer 21 to form a depletion layer in the n-type low carrier light absorption layer 22, and light is incident using a high electric field applied to the depletion layer. The incident light 30 that has passed through the conductive layer on the side (the p-type conductive layer 23 in FIG. 2) and reached the n-type low carrier concentration light absorption layer 22 is photoelectrically converted. However, it is necessary to form the ohmic electrode 27 on the upper part of the conductive layer on the light incident side. Therefore, it is necessary to provide a pn junction region having a size obtained by adding the area of the ohmic electrode region in addition to the area of the light receiving region.

[0004]

In order to increase the speed of the photodiode, it is necessary to reduce the area of the pn junction region in order to reduce the capacitance of the photodiode. In a conventional photodiode,
Since the area of the ohmic electrode 27 also needs to be reduced as the area of the pn junction region is reduced, there has been a problem that the parasitic resistance due to the ohmic electrode increases and high speed operation is significantly hindered.

The present invention has been made in view of the above points, and an object of the present invention is to solve the above-mentioned problems of the prior art and to provide a semiconductor photodetector capable of high-speed response.

[0006]

The construction of the present invention is as follows. That is, the present invention comprises a p-type conductive layer, an n-type low carrier concentration layer, and an n-type conductive layer in a direction perpendicular to the semiconductor substrate in this order or in the reverse order, and the upper conductive layer A photodiode having a p-type electrode or an n-type electrode selectively formed in a part thereof, wherein the area of the upper conductive layer is larger than the pn junction area. It is.

[0007]

According to the present invention, by forming a conductive layer having an area larger than the pn junction area of the photodiode above the pn junction of the photodiode, the parasitic capacitance and the parasitic resistance caused by the ohmic electrode are reduced at the same time. it can. Therefore, the response speed can be increased as compared with a conventional photodiode having an ohmic electrode having an area smaller than the pn junction area.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the embodiments shown in the drawings. FIG. 1 is a process chart for explaining a method of manufacturing a photodiode according to one embodiment of the present invention, and FIG. 1 (f) shows the structure of the photodiode in a final step. Here, 10 is a semi-insulating InP substrate, and 11 is an n-type InP substrate.
nP layer, 12 is an n-type low carrier concentration InGaAs light absorbing layer, 13 is a p-type InGaAs layer, 14 is a low carrier concentration InP layer, 15 is a p-type InP layer, 16 is an n-type ohmic electrode, and 17 is a p-type ohmic electrode. , 18 and 19 are insulating thin films.

That is, as shown in FIG. 1F, an n-type InP layer 11 formed in a stripe on a semi-insulating InP substrate 10 has an n-type photodiode.
Type low carrier concentration InGaAs light absorbing layer 12 and p
Type InGaAs layers 13 are sequentially stacked.
The InP layer 14 having a low carrier concentration sandwiches the insulating thin film 19 deposited on the side surfaces of the InP substrate 1 and 12.
0. A p-type InP layer 15 is stacked on each of the layers 12, 13 and 14 as a semiconductor layer having a conductivity type opposite to that of the n-type InP layer 11. Further, an upper portion of the low carrier concentration InP layer 14 and a p-type InP layer are formed. 1
5 are formed in a stripe shape extending in a direction orthogonal to the stripe direction of the n-type InP layer 11.

In the photodiode having the structure of this embodiment, InGaAs layers 12 and 13 forming a pn junction are provided.
Vertically above and below, a stripe-shaped p-electrode layer 15
And an n-electrode layer 11 are arranged. This gives p
Immediately below the electrode layer 15 is the low carrier concentration layer 14, which is insulated from the n electrode layer 11 by the insulating thin film 19, so that the p electrode layer 15 is larger than the pn junction area. Also, it is possible to suppress an increase in parasitic capacitance generated between the p-electrode layer 15 and the n-electrode layer 11. The method for manufacturing this photodiode is as follows.

(1) As shown in FIG. 1A, first, a semi-insulating I
The n-type InP layer 11 having a thickness of 0.2 μm, the n-type low carrier concentration InGaAs light absorbing layer 12 having a thickness of 0.3 μm, and the p-type InG having a thickness of 0.1 μm are formed on the nP substrate 10 by MOVPE.
The aAs layer 13 is sequentially epitaxially grown to form a photodiode layer. (2) Next, as shown in FIG. 1B, a thickness of 0.2 μm and a width of 5 μm are formed on the p-type InGaAs layer 13 by using a plasma CVD method.
m, a striped silicon nitride film 18 having a length of 50 μm is formed, and using this as a mask, InP is formed by chlorine-based RIE.
Etching is performed until the substrate 10 is exposed.

(3) Using the plasma CVD method again, FIG.
As shown in (c), the InP substrate 10, the upper surface of the silicon nitride film 18, the InP layer 11, the InGaAs light absorbing layer 12,
A silicon nitride film 19 having a thickness of 0.2 μm is deposited on the side surface of the p-type InGaAs layer 13, and thereafter, In is formed by a fluorine-based RIE method.
The silicon nitride film 19 deposited on the P substrate 10 and the silicon nitride film 18 is removed. (4) Thereafter, as shown in FIG. 1 (d), a low carrier concentration I having a thickness of 0.6 μm was formed on the InP substrate 10 by MOVPE.
The nP layer 14 is selectively regrown.

(5) Next, as shown in FIG.
After the silicon nitride film 18 deposited on the aAs layer 13 is removed by a fluorine-based RIE method, the thickness of the InGaAs layer 13 and the low carrier concentration InP layer 14 is reduced by MOVPE.
The 0.2 μm p-type InP layer 15 is regrown. (6) Finally, as shown in FIG. 1 (f), etching is performed in a stripe shape in a direction orthogonal to the stripe formed in the above-described process using a chlorine-based RIE method until the InP layer 11 is exposed. Further, a p-type ohmic electrode 17 is formed on the p-type InP layer 15 and an n-type ohmic electrode 16 is formed on the n-type InP layer 11.

In this embodiment, an example is shown in which the p-type InGaAs layer 13 is introduced.
Since an n-junction is formed at the hetero interface between the InP layer 15 and the InGaAs light absorbing layer 12, a depletion layer is formed over the hetero interface, and therefore, trapping of photoexcited carriers traveling through the depletion layer occurs, and the response speed of the photodiode is reduced. Almost the same effect can be expected, though it may decrease.

Further, an n-type InP layer 11 of a photodiode layer, an n-type low carrier concentration InGaAs light absorbing layer 12,
Although an example is shown in which a silicon nitride film 19 is arranged to provide electrical insulation between the InGaAs layer 13 and the low carrier concentration InP layer 14, other than a silicon nitride film, such as a silicon oxide film and a titanium oxide film, etc. The same effect can be expected by using the dielectric film of the above. Furthermore, when the dark current of the photodiode is not a problem, a semi-insulating InP layer can be directly disposed adjacent to the photodiode layer without using these dielectric films.

In the step (2) of this embodiment, the n-type InP layer 11 and the n-type low carrier concentration InGaAs
The s light absorbing layer 12 and the p-type InGaAs layer 13 are processed into stripes having a uniform width, and in the step (6), the InGaAs light absorbing layer 12 and the p-type InGaAs layer 1 are formed.
3, the example in which the low carrier concentration InP layer 14 and the p-type InP layer 15 are processed into a stripe shape having a uniform width has been described. A photodiode with reduced resistance can be realized. Although an example in which a photodiode is manufactured by the above method has been described, an optical element such as a surface emitting laser, an optical switch, and a modulator can be manufactured by using the same method.

[0017]

As described above, the present invention increases the area of the ohmic electrode by forming a conductive layer having an area larger than the pn junction area of the photodiode on the photodiode layer, As a result, the parasitic capacitance and the parasitic resistance caused by the ohmic electrode can be reduced at the same time, so that there is an advantage that a semiconductor photodetector capable of high-speed response can be realized.

[Brief description of the drawings]

FIG. 1 is a process diagram illustrating a method for manufacturing a photodiode according to an embodiment of the present invention.

FIG. 2 is a schematic sectional view of a conventional general photodiode.

[Explanation of symbols]

 Reference Signs List 10 semi-insulating InP substrate 11 n-type InP layer 12 n-type low carrier concentration InGaAs light absorbing layer 13 p-type InGaAs layer 14 low carrier concentration InP layer 16 n-type ohmic electrode 17 p-type ohmic electrode 18 Insulating thin film

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Atsuro Kozen 1-6-1, Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (56) Reference JP-A-3-96917 (JP, A) JP Hei 3-53565 (JP, A) JP-A-61-182273 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 31/10-31/119

Claims (2)

(57) [Claims] A second semiconductor having a low carrier concentration is laminated on a first conductive semiconductor formed in a stripe shape on a semi-insulating semiconductor substrate.
A third semiconductor having a low carrier concentration is stacked on the semi-insulating semiconductor substrate with an insulating thin film deposited on the side surface of the semiconductor in the opposite direction, and a third semiconductor opposite to the first semiconductor is provided on the second and third semiconductors. Wherein the fourth semiconductor of the conductivity type is stacked, and the upper part of the third semiconductor and the fourth semiconductor are formed in a stripe shape extending in a direction different from the stripe direction of the first semiconductor. Semiconductor photodetector. (1) a step of sequentially laminating a first conductive semiconductor and a second semiconductor having a low carrier concentration on a semi-insulating semiconductor substrate; and (2) stripe-forming these first and second semiconductors. (3) forming an insulating thin film on the top and side surfaces of the stripe; (4) forming a low carrier on the semi-insulating semiconductor substrate adjacent to the stripe with the insulating thin film interposed therebetween. (5) a step of stacking a fourth semiconductor having a conductivity type opposite to that of the first semiconductor on the second and third semiconductors, and (6) a third semiconductor. And the fourth semiconductor are combined with the above (2)
Processing the semiconductor light detector into a stripe extending in a direction different from the direction of the stripe formed in the step.