JPS59124146A - Manufacture of glass sealed semiconductor device - Google Patents
Manufacture of glass sealed semiconductor deviceInfo
- Publication number
- JPS59124146A JPS59124146A JP22998582A JP22998582A JPS59124146A JP S59124146 A JPS59124146 A JP S59124146A JP 22998582 A JP22998582 A JP 22998582A JP 22998582 A JP22998582 A JP 22998582A JP S59124146 A JPS59124146 A JP S59124146A
- Authority
- JP
- Japan
- Prior art keywords
- glass
- material layer
- insulating substrate
- glass material
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
Abstract
Description
【発明の詳細な説明】
この発明は、硝子封止半導体装置の製造方法に係り、特
に多数リードを有する硝子封止半導体装置の製造方法に
関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a glass-sealed semiconductor device, and more particularly to a method of manufacturing a glass-sealed semiconductor device having a large number of leads.
従来の硝子封止半導体装置の製造方法を、第1図から第
4図に示す。まず第1図のように、絶縁基板1の上に封
止材の硝子材料2を均一な厚みで形成し、つぎに第2図
のリードフレーム3を、第3図のように硝子材料z上に
圧着し半導体素子6を組立でる。次に第4図のように、
蓋部基板5上に硝子材料4を形成したキャップで硝子封
止して硝子封止半導体装置を得ている。A conventional method for manufacturing a glass-sealed semiconductor device is shown in FIGS. 1 to 4. First, as shown in Fig. 1, a glass material 2 as a sealing material is formed to have a uniform thickness on an insulating substrate 1, and then a lead frame 3 shown in Fig. 2 is formed on a glass material z as shown in Fig. 3. The semiconductor element 6 is assembled by pressure bonding. Next, as shown in Figure 4,
A glass-sealed semiconductor device is obtained by sealing the glass with a cap in which the glass material 4 is formed on the lid part substrate 5.
この様な硝子封止半導体装置の製造方法は、特に多数リ
ードを有するリードフレームを硝子材料層に圧着したと
き、絶縁基板の中央部と端部との圧着性を比較すると、
絶縁基板の端部の方が硝子材料が流れ易い。その為、端
部の方の硝子流れを抑えると、絶縁基板の中央部で圧着
性が不足し、後工程のリードフレームを所定の位置で整
形する工程又は半導体素子を組立てる工程で、硝子にク
ラックが入ったシ硝子が欠けたシするトラブルが発生し
、40ビン以上の硝子封止半導体装置の歩留り及び外観
を損うことがあった。In this method of manufacturing a glass-sealed semiconductor device, especially when a lead frame having a large number of leads is crimped onto a glass material layer, comparing the crimping properties between the center part and the edge part of the insulating substrate,
The glass material flows more easily at the edges of the insulating substrate. Therefore, if the flow of glass toward the edges is suppressed, the crimpability at the center of the insulating substrate will be insufficient, and the glass will crack during the subsequent process of shaping the lead frame in a predetermined position or assembling the semiconductor element. A problem occurred in which the glass containing the glass was chipped, which could impair the yield and appearance of glass-sealed semiconductor devices of 40 or more bottles.
本発明の目的は、上述した従来の硝子封止半導体装置の
製造方法を改良し、高品質を有する多数ピンの半導体装
置を高歩留シで製造することを可能にした製造方法を提
供することでおる。An object of the present invention is to provide a manufacturing method that improves the above-described conventional glass-sealed semiconductor device manufacturing method and makes it possible to manufacture high-quality, multi-pin semiconductor devices with high yield. I'll go.
本発明の製造方法は、絶縁基板の上にリードフレームを
圧着するだめの硝子材料層を形成するに際し、前記絶縁
基板の四隅の領域の硝子材料層の厚さを、極端の場合は
零を含めて、その他の領域の硝子材料層より薄く形成す
る工程を含んでいる。In the manufacturing method of the present invention, when forming a glass material layer for crimping a lead frame on an insulating substrate, the thickness of the glass material layer in the four corner regions of the insulating substrate is adjusted to include zero in extreme cases. This includes a step of forming the glass material layer thinner than the glass material layer in other areas.
つぎに本発明を実施例によシ説明する。Next, the present invention will be explained using examples.
第5図ないし第8図は本発明の製造工程順の斜視図であ
る。まず、第5図のように、絶縁基板1の上に、四隅の
領域1aを除いた領域のみに硝子材料層12を均一の厚
さに形成する。または、四隅の領域1aにはその他の領
域の硝子材料層の厚さより薄く硝子材料層を形成する。5 to 8 are perspective views showing the order of manufacturing steps of the present invention. First, as shown in FIG. 5, a glass material layer 12 is formed to have a uniform thickness on an insulating substrate 1 only in regions other than the four corner regions 1a. Alternatively, a glass material layer is formed in the four corner regions 1a to be thinner than the glass material layer in the other regions.
つぎに第6図に示すリードフレーム3を硝子材料層12
によシ、第7図のように、絶縁基板1の上に圧着する。Next, the lead frame 3 shown in FIG.
Then, as shown in FIG. 7, it is crimped onto the insulating substrate 1.
さらに、半導体素子6fc組立て、つぎに第8図のよう
に、蓋基板5に硝子材料層4を形成してなるキャップを
絶縁基板1の上にかぶせて硝子封止し、第8図に示す硝
子封止半導体装置を得ている。Furthermore, as shown in FIG. 8, the semiconductor element 6fc is assembled. Next, as shown in FIG. A sealed semiconductor device is obtained.
この様な硝子封止半導体装置の製造方法の場合、絶縁基
板に形成する硝子材料層がリードフレームとの圧着性が
良好となる領域、即ち、絶縁基板の4隅の領域に形成し
ないか又は薄く形成する為、絶縁基板の中央部付近と略
同等の圧着性を得る事が出来る。それ故、多数ピンを有
する硝子封止半導体装置を製造する時のリードフレーム
の圧着を均一に行なう事が出来、又、硝子封止時も封止
部分による硝子流れ具合の不具合を防ぎ、硝子封止半導
体装置の外観を良好にする事が出来る。In the case of such a manufacturing method of a glass-sealed semiconductor device, the glass material layer formed on the insulating substrate is not formed in the area where the pressure bonding with the lead frame is good, that is, the four corner areas of the insulating substrate, or is thin. Because of this, it is possible to obtain approximately the same compression bonding properties as near the center of the insulating substrate. Therefore, when manufacturing a glass-sealed semiconductor device having a large number of pins, the lead frame can be crimped uniformly, and when glass-sealed, problems with glass flow due to the sealing part can be prevented, and the glass-sealed The appearance of the semiconductor device can be improved.
半導体素子の組立工程においぞも、多数ビンを有するも
のでも絶縁基板上の硝子材料層にリードフレームを均一
に圧着が出来る為に組立工程及びリードフレームの整形
時に硝子が欠けたシ又はクラックが入る事を防ぐ事が出
来る。Even in the assembly process of semiconductor devices, even if there are many bottles, the lead frame cannot be evenly crimped onto the glass material layer on the insulating substrate, so chips or cracks in the glass may occur during the assembly process and shaping of the lead frame. Things can be prevented.
以上の様に本発明による半導体装置の製造方法では40
ピンリ一ド以上を有する硝子封止半導体装置の組立工程
の安定化及び外観を向上させる事が出来る利点を有する
。As described above, in the method of manufacturing a semiconductor device according to the present invention, 40
This has the advantage of stabilizing the assembly process and improving the appearance of a glass-sealed semiconductor device having a pin lead or higher.
第1図から第4図は従来の硝子封止半導体装置の製造方
法を示す工程図で、第5図から第8図は本発明の一実施
例を説明するための工程図である。
1・・・・・・絶縁基板、la・・・・・・絶縁基板の
四隅の領域、2.12・・・・・・硝子材料層、3・・
・・・・リードフレーム、4・・・・・・蓋基板の硝子
材料層、5・・・・・・蓋基板、6・・・・・・半導体
素子。1 to 4 are process diagrams showing a conventional method for manufacturing a glass-sealed semiconductor device, and FIGS. 5 to 8 are process diagrams for explaining one embodiment of the present invention. 1... Insulating substrate, la... Four corner areas of insulating substrate, 2.12... Glass material layer, 3...
. . . Lead frame, 4 . . . Glass material layer of lid substrate, 5 . . . Lid substrate, 6 . . . Semiconductor element.
Claims (1)
を除いた領域のみに前記硝子材料層を形成するか、また
は上記絶縁基板の四隅の領域の硝子材料層の厚さをその
他の領域の硝子材料層の厚さより薄く形成することを特
徴とする硝子封止半導体装置の製造方法。In the method for manufacturing a device, the glass material layer is formed only in an area other than the four corner areas on the insulating substrate, or the thickness of the glass material layer in the four corner areas of the insulating substrate is made equal to the thickness of the glass material layer in other areas. A method for manufacturing a glass-sealed semiconductor device, characterized in that the device is formed thinner than the thickness of a material layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22998582A JPS59124146A (en) | 1982-12-29 | 1982-12-29 | Manufacture of glass sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22998582A JPS59124146A (en) | 1982-12-29 | 1982-12-29 | Manufacture of glass sealed semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59124146A true JPS59124146A (en) | 1984-07-18 |
Family
ID=16900789
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22998582A Pending JPS59124146A (en) | 1982-12-29 | 1982-12-29 | Manufacture of glass sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59124146A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01162245U (en) * | 1988-04-25 | 1989-11-10 | ||
EP0347991A2 (en) * | 1988-06-22 | 1989-12-27 | Koninklijke Philips Electronics N.V. | Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages |
JPH07245856A (en) * | 1994-03-04 | 1995-09-19 | Furukawa Electric Co Ltd:The | Jumper wire of aerial transmission line |
-
1982
- 1982-12-29 JP JP22998582A patent/JPS59124146A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01162245U (en) * | 1988-04-25 | 1989-11-10 | ||
EP0347991A2 (en) * | 1988-06-22 | 1989-12-27 | Koninklijke Philips Electronics N.V. | Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages |
JPH07245856A (en) * | 1994-03-04 | 1995-09-19 | Furukawa Electric Co Ltd:The | Jumper wire of aerial transmission line |
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