JPS59122224A - Synchronizing pulse detector - Google Patents
Synchronizing pulse detectorInfo
- Publication number
- JPS59122224A JPS59122224A JP22977482A JP22977482A JPS59122224A JP S59122224 A JPS59122224 A JP S59122224A JP 22977482 A JP22977482 A JP 22977482A JP 22977482 A JP22977482 A JP 22977482A JP S59122224 A JPS59122224 A JP S59122224A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- delay line
- frequency
- time
- synchronizing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は異なる周波数成分を持つ一定周期をもつパル
718号によりパルス変調された高周波信号を周波数成
分毎に積度よくかつ迅速に分離し同期パルスを検出する
同期パルス検出装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION This invention is a synchronization pulse detection method that detects a synchronization pulse by efficiently and quickly separating a high frequency signal pulse-modulated by PAL No. 718 having a constant period and having different frequency components into each frequency component. It is related to the device.
従来から一般に用いられてきたこの種装置の構成を41
図に従って説明する。第1図の(11)〜(N1)はバ
ントパスフィルタ、(12)〜(N2)はこのバントパ
スフィルタ(11)〜(N1)のそれぞれ出力を検波す
る検波器、(1)はこの検波器(12)〜(N2)の検
波出力の状況を判断し、同期パルスか否かを−1(fi
l?する同期パルス検出回d、(100)は入力端子で
ある。The configuration of this type of device that has been commonly used in the past is 41
This will be explained according to the diagram. In Figure 1, (11) to (N1) are band pass filters, (12) to (N2) are detectors that detect the outputs of these band pass filters (11) to (N1), respectively, and (1) is this detection. The state of the detection output of the detectors (12) to (N2) is judged, and whether it is a synchronization pulse or not is determined by -1 (fi
l? The synchronization pulse detection time d, (100) is an input terminal.
次にIIIJ作について説明する。第1図の入力端子(
100)に人力する、パルス変調されたや1異なる周波
数成分を持つ高周波信′8ri、バントパスフィルタ(
11)〜(N1)の内の該当通過バンド?もつものを通
過するようになっている。従って、冒周波吋号が fl
、fzという2波で構成きれており第2図(イ)、かツ
コレらの周波数が1 dのバントパスフィルタの通過バ
ンドでカバーされていない時は第2図の←)及び(ハ)
のごとく、第1図の該当逆波器からパルスがfg f2
に対応して、1固別に出力される。信1号周波飲とフィ
ルタとは1:1で対応させであるのでこの出力されたパ
ルスの飲をかぞえることによりいくつの周波数成分を持
つ高周波であることが検出することができる。Next, I will explain about IIIJ's works. The input terminal in Figure 1 (
100), pulse-modulated high-frequency signals with different frequency components, and a band-pass filter (
11) Applicable passband among (N1)? It is designed to pass through things. Therefore, the first wave number is fl
, fz, and when the frequency of Katsukore et al. is not covered by the pass band of the 1 d bandpass filter, it is shown in Figure 2 (←) and (C).
As shown in Fig. 1, the pulse from the corresponding inverter is fg f2
1 is output separately corresponding to . Since there is a 1:1 correspondence between the signal 1 frequency difference and the filter, by counting the difference in the output pulse, it is possible to detect how many frequency components the high frequency has.
従来の同期パルス検出回路は以上のように構成されてい
るので、受信帯域(BM工tZ ) iCk イテ、精
度良く(例えはbultz単位で)同期パルスを検出す
るには第1図のバントパスフィルタ(11)〜(Nl)
及び第1図の検波器(12)〜(N2)の戒を石としな
ければならない。B)1)の時は、従来の同期パルス検
出回路では、バントパスフィルタ及び俣波器を多くする
ことが心受で、寸法重爺及び製造誦格が犬となる欠点が
あった。Since the conventional synchronous pulse detection circuit is configured as described above, in order to detect the synchronous pulse with high accuracy (for example, in bultz units), the band pass filter shown in Fig. 1 is used. (11) ~ (Nl)
And the precepts of the detectors (12) to (N2) in Figure 1 must be kept in mind. B) In the case of 1), in the conventional synchronous pulse detection circuit, it is desirable to increase the number of band pass filters and waveforms, which has the disadvantage of being large in size and difficult to manufacture.
この発8Aは上記のような従来のものの欠点を除去する
ためになされたもので、同期パルスの分離に分散型遅延
線を用いることにより、小型で精度よく、かく安価に製
造できる同期パルス検出回路を提供することを目的とし
ている。This generation 8A was developed to eliminate the drawbacks of the conventional ones as described above, and by using a distributed delay line to separate the synchronous pulses, it is a synchronous pulse detection circuit that can be manufactured in a small size, with high precision, and at a low cost. is intended to provide.
以下この発明の一実施例を第3図について説明する。図
において(101)は本装置の入力端子、(102)は
スイッチであり、入力端子(101)に人力された高周
波パルスが、スイッチ(102)を通過した直置に、入
力端子(101)と後続する回路との間を所定の時間断
とするもの、(103)は分散型遅延線であり、人力す
る相異なるパルス変調された高周波のそれぞれの周波数
に応じて、その通過(遅延)時間を決定するもの1.1
04)はパルス分析回路であす、IJr前記分散型、+
!!延線(103)の出力パルスをカウントして、その
カウント数から人力された高周波が、1波が複数波かを
瞬時に判断するものである。An embodiment of the present invention will be described below with reference to FIG. In the figure, (101) is the input terminal of this device, (102) is the switch, and the high-frequency pulse that is manually applied to the input terminal (101) passes through the switch (102) and is directly connected to the input terminal (101). (103) is a distributed delay line that disconnects the following circuit for a predetermined period of time, and the passage (delay) time is determined according to the frequency of each of the different pulse-modulated high frequencies manually generated. What to decide 1.1
04) is a pulse analysis circuit, IJr said distributed type, +
! ! The output pulses of the wire extension (103) are counted, and based on the counted number, a manually generated high-frequency wave instantly determines whether one wave is multiple waves.
分散型遅延線(103) K入力するパルス変調された
相異なる周波数(fxXfz とする)1戊0を持つ
高周波信号は、第4図の人出力特性を持つ分散型遅延線
(103)を通過する1祭、fl、f2の高周波はそれ
ぞれTz=F(ft)、T2=F(f2)だけ遅延して
出力される(第5図)。すなわち第5図に示すように入
力端子(101)VC入力する高周波信8(第5図(イ
))より、それぞれTl、 T2の時間だけ遅延して分
散型遅延線(1)から出力され、fl、f2は時間的に
分離される。パルス分析回路(2)ではこの時間的に分
離された周波数に対応して発生するパルス状高周波信号
(第3図(ハ)参照)をカウントすることにより、この
場合r/′i2波の同期パルスであることを判断する。Distributed delay line (103) K Input pulse-modulated high-frequency signals with different frequencies (referred to as fxXfz) 1 and 0 pass through the distributed delay line (103) having the human output characteristics shown in Figure 4. The high frequencies of 1, fl, and f2 are output after being delayed by Tz=F(ft) and T2=F(f2), respectively (FIG. 5). That is, as shown in FIG. 5, from the high frequency signal 8 (FIG. 5 (a)) inputted to the input terminal (101) VC, the signals are outputted from the distributed delay line (1) with a delay of time Tl and T2, respectively. fl and f2 are separated in time. The pulse analysis circuit (2) counts the pulsed high-frequency signals (see Figure 3 (c)) generated corresponding to these temporally separated frequencies, and in this case, the synchronized pulse of r/'i two waves is detected. determine that it is.
第5図(ロ)はスイッチ(102)の作動時間を示す。FIG. 5(b) shows the operating time of the switch (102).
高周波入力信号の立下り時点にて分散型遅延# (10
3)の入力端を所とし、所定の信号以外による誤動検出
を防止する。Distributed delay # (10
3) to prevent false detection due to signals other than the predetermined signals.
分散型遅延線(103)の出力はパルス分析回路で検波
すると共に蓄積処理されどの周波数のものが同期性信号
かを検出する。The output of the distributed delay line (103) is detected by a pulse analysis circuit and stored and processed to detect which frequency is a synchronous signal.
本芙施例では、2波についてのみ記述したが、N1固の
相異なる周波数を持つ同期パルスを検出する装置にも同
様の幼果を奏する。In this embodiment, only two waves have been described, but a similar effect can be achieved in a device that detects synchronization pulses having different frequencies of N1.
以上のように、この発明によれば分散型遅延線を用いる
ようにしているので同期パルスの分1111が簡単にか
つ迅速に出来るから装置が安価に出来る。As described above, according to the present invention, since the distributed delay line is used, the synchronization pulse 1111 can be easily and quickly produced, and the apparatus can be made inexpensive.
第1図は従来の同期パルス検出装置、第2図は第1図の
動作説明図、第3図は本発明の一実施例を示す図、第4
図け0散型遅延線の人出力特性、第5図は動作説明図で
ある。
図中、(101)は人力する相異なる周波数成分を持つ
高周波信号の入力端子、(102)け入力端子(101
)と後続の分散型遅延線(103)の間を所定のタイミ
ングで接断するスイッチ、(1o4)は同期パルス検出
回路である。
代 理 人 葛 野 信 −第1図
第2図
第3図
第4図
第5図FIG. 1 is a conventional synchronous pulse detection device, FIG. 2 is an explanatory diagram of the operation of FIG. 1, FIG. 3 is a diagram showing an embodiment of the present invention, and FIG.
Figure 5 is an explanatory diagram of the human output characteristics of the zero-dispersed delay line. In the figure, (101) is an input terminal for manually input high-frequency signals with different frequency components, and (102) is an input terminal (101) for inputting high-frequency signals having different frequency components.
) and the subsequent distributed delay line (103) at a predetermined timing, and (1o4) is a synchronous pulse detection circuit. Agent Makoto Kuzuno - Figure 1 Figure 2 Figure 3 Figure 4 Figure 5
Claims (1)
同期性信号を検出するものにおいて、パルス変調された
異なる周波数成分を持つ高周波信号を周波数成分ごとに
異なる時間遅延をさせる分散型遅延線と、この分散型遅
延線の出力信号からパル718号を抽出し同期パルスか
否かを判断する同期検出回路と、所定入力信号が立下っ
た時点から所定時間人力信号を所とするスイッチとを有
することを特徴とする同期パルス検出装置。A distributed delay line that delays pulse-modulated high-frequency signals having different frequency components at different times for each frequency component in a device for detecting synchronization signals using pulse-modulated modulated wave signals having different frequency components; It has a synchronization detection circuit that extracts pulse No. 718 from the output signal of the distributed delay line and determines whether it is a synchronization pulse or not, and a switch that uses a human input signal for a predetermined period of time from the time when a predetermined input signal falls. A synchronous pulse detection device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22977482A JPS59122224A (en) | 1982-12-28 | 1982-12-28 | Synchronizing pulse detector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22977482A JPS59122224A (en) | 1982-12-28 | 1982-12-28 | Synchronizing pulse detector |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59122224A true JPS59122224A (en) | 1984-07-14 |
Family
ID=16897459
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22977482A Pending JPS59122224A (en) | 1982-12-28 | 1982-12-28 | Synchronizing pulse detector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59122224A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49131393A (en) * | 1973-04-19 | 1974-12-17 |
-
1982
- 1982-12-28 JP JP22977482A patent/JPS59122224A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49131393A (en) * | 1973-04-19 | 1974-12-17 |
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