JPS59117344A - Failure preventing device in data communication system - Google Patents

Abstract

PURPOSE:To prevent a failure by detecting the failure of a counter by a reset signal and a timing signal of the counter. CONSTITUTION:When the timing signal Ti changes twice or more in one frame, an output of a flip-flop 401 rises once or more and a flip-flop 402 is set. Further, when a reset signal TFRM is turned on and a signal Ti is turned on, an AND gate 403 is set. In this case, a flip-flop 406 is reset, the signal Ti is inhibited by an AND gate 407 to prevent a failure.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a data communication system, particularly a data communication system in which a large number of terminal devices are all connected to a common signal line and data is transmitted and received between the terminals using a time division multiplexing method. The present invention relates to a failure prevention device suitable for communication systems.

[Prior art]

First, the entire time division multiplexing device will be explained with reference to FIG. The time division multiplexing device 100 has multiple terminals 121, 122
...123 to the terminal control units 111, 112
．． ... 113, multiplexed by the multiplexing/distributing section 103, and sending it to the signal line 102. The signal received from signal #101 is distributed by the multiplexing/distributing section 103, and the terminal control section 1
111...113 to the terminal 121. ...124
Send to. Among the data on the signal lines 101 and 102, for example, as shown in FIG.
, T21°..., the data of the terminal 124 is T14. T2
4 time slots.

A unit that is repeated at a period from Tll to T21 is called a frame. The present invention relates to a frame-format time division multiplex communication system having a time slot 5YNCk for a synchronization pattern indicating a frame delimiter #), and using time slots other than the time slot 5YNC for communication between terminals.

The timing Ti (i is the terminal number) at which the multiplexing/distributing unit 103 transmits and receives data from each terminal in a predetermined time slot is determined by a timing signal TILT for each time slot.
It can be created using the counter circuit shown in FIG. 3 from the timing signal TFRM indicating frame separation. The timing signal TSLT and the timing signal TFRM are signals having timings as shown in FIG. 2, for example, and can be generated directly within the multiplexer 100 or obtained separately from the signal received from the signal line 102. .

In FIG. 3, a counter 301 is reset by a timing signal TFRM, is counted by a timing signal TILT, and the output signal of the counter is encoded by a decoder 302 to generate timing signals Tl, T2 . ...T
Create N.

In this method of giving the timing signal Ti to the terminal control section and transmitting data from the terminal to all signal lines, there are the following problems. In other words, due to a failure in the counter 301 and decoder 302 or a failure in the Ti signal line,
If the signal Ti turns on more than once during one frame period, or if the on signal is output continuously, the terminal control unit that receives the signal TI will be assigned to another terminal. It ends up transmitting and receiving all data to and from the time slot that is supposed to be in use, interfering with the communications of legitimate terminals using that time slot.

The aim is to provide a complete set of anti-obstruction devices to prevent enemy forces from interfering with the enemy.

[Summary of the invention]

In the present invention, the terminal control section has a 1g
The timing Ti for transmitting and receiving data to and from the signal path is only once during one frame period, and the timing Ti does not occur in the time slot to which the synchronization pattern is assigned. By providing a means for fully monitoring whether Ti satisfies the above two conditions and a means for inhibiting a signal Ti that does not satisfy the above two conditions, it is possible to minimize all failures caused by failures in the signal Ti generation circuit. It is characterized by preventing

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be explained with reference to FIG.

Figure 4 shows the data transmission/reception timing signal Ti for each terminal control unit.
2 shows an abnormality detection circuit and a circuit that prohibits the output of Ti in response to an abnormality detection signal. In this figure, signals Ti and TFRM are the same signals as shown in FIGS. 2 and 3.

The flip 70 knobs 401 and 402 constitute a counter,
It is reset by the signal TFRM every frame, and the signal T
Count all changes of 1. The signal Ti is 1 in one frame.
Since this is a signal that turns on only once, if it changes twice or more, the 7 lip-flop 402 is set, and the OR game) 405-
The flip-flop 406 is reset through the i signal, and the AND gate 407 inhibits the input signal Ti. Here, the signal Ti is a signal obtained by gating the signal Ti with the output of the 7-lip-flop 406, and is the same as the signal TI when no abnormality is detected, and turns off when an abnormality is detected. By using it as a transmission/reception timing signal for all the terminal control units, it is possible to prevent communications of other terminals from being disturbed only once due to an abnormality in the signal Ti.

On the other hand, a fault in which the signal Ti is both in the on state can be solved by detecting that the signal Ti is on at the timing of the signal TFRM in the ungate 403, and resetting the 7-lip-flop 406 by passing it through the OR gate 405'. Similarly, it is possible to inhibit the signal Ti.

The flip-flop 406 has a function of permitting/prohibiting communication between each terminal and the terminal control unit, and is set when the power is turned on or communication is started.

In this embodiment, the circuit shown in FIG. 4 is centrally installed in the multiplexing/distributing section 103 in relation to the signal Ti generation circuit shown in FIG. 3, or each terminal control section Ill, 112 . ...1
There is no essential difference whether they are installed in 13 locations.

According to this embodiment, if the timing signal Ti, which is transmitted and received from all data signal lines of each terminal, is turned on more than once in one frame, or is fixed to the on state, all communications of other terminals are blocked. Even if a failure occurs, the interference to each terminal is reduced to 1
It has the effect of only being used once.

〔Effect of the invention〕

As described above, according to the present invention, in a time division multiplexing communication system, each terminal can prevent interference with the communication of other terminals due to a failure in the timing signal generation circuit that indicates the time slot allocated for transmission and reception. This makes it possible to detect all disturbances in the circuit on the terminal side and to take measures to prevent interference.In addition, it is possible to limit interference to communication of other terminals only once, which has the effect of increasing the reliability of the system.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a time division multiplexing apparatus according to the present invention, FIG. 2 is a timing chart explaining time division multiplexing transmission costs, and FIG.
The figure shows a transmitting/receiving timing generating circuit, and FIG. 4 is a configuration diagram of an embodiment of a circuit realizing the system according to the present invention. 100... Time division multiplexing device, 401, 402...
Timing signal counter, 4o3... Timing signal on fixed detection gate, 4o6... Communication permission/prohibition flag 1 Figure 'Az Figure ■ 3 Figure 4 Ro

Claims (1)

[Claims] At least one multiplexing device having a plurality of terminal control devices is connected to a common signal transmission path, and data is communicated between each terminal by a time division multiplexing method, and at least one time slot is provided. In a data communication system that is not used for communication, the timing signal for transmitting and receiving data between the signal transmission path and the terminal in the multiplexer is 2 times per frame.
A failure prevention device comprising: a circuit for detecting an abnormality that is turned on more than once, a circuit that detects an abnormality that is turned on during a synchronization character period, and a circuit that prohibits a transmission/reception timing signal that indicates an abnormality.