JPS59117220A - Sputtering device - Google Patents

Sputtering device

Info

Publication number
JPS59117220A
JPS59117220A JP22627782A JP22627782A JPS59117220A JP S59117220 A JPS59117220 A JP S59117220A JP 22627782 A JP22627782 A JP 22627782A JP 22627782 A JP22627782 A JP 22627782A JP S59117220 A JPS59117220 A JP S59117220A
Authority
JP
Japan
Prior art keywords
targets
sputtering
wafers
wafer
shapers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22627782A
Other languages
Japanese (ja)
Inventor
Toshihiko Sato
俊彦 佐藤
Kazuhiro Koga
和博 古賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP22627782A priority Critical patent/JPS59117220A/en
Publication of JPS59117220A publication Critical patent/JPS59117220A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering

Abstract

PURPOSE:To form sputtered films of uniform thickness on a large diametric wafer or wafers of a large number by a method wherein shapers of the necessary shape are arranged in front of targets, and a sputtering device is constructed so as to enable to change and control partially the formation speed of the sputtering films according to the shapers thereof. CONSTITUTION:A shapers 21 is constructed of an SiO2 plate supported holding the insulated condition, and an opening part 23 consisting of longitudinal and transverse grooves is formed at the middle region or at the central part thereof. Shape and size of the opening part 23 thereof are decided according to the various primary factors of material quality and size of the target 12, intensity of high-frequency electric power sources 19, 22, and further, the distances between the targets 12 and wafers 14, etc. Because the shapers 21 having the openings 23 of the necessary shape are provided in front of the targets 12, distribution of frequency of penetrating impacts of Ar ions to the targets, frequency of sputtering of SiO2 against the wafers from the targets, etc., are differed at the surfaces of the targets, partial difference is generated also in the fiml formation speeds to the wafers 14 facing to the targets thereof, and inequality of film thickness is corrected to attain formation of the films of uniform film thickness extending over the broad extent of the wafer.

Description

【発明の詳細な説明】 本発明はスパッタ装置に関し、特にスパッタ形成した膜
の均一化を図ったスパッタ装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sputtering apparatus, and more particularly to a sputtering apparatus that achieves uniformity of a sputtered film.

半導体装置の製造に際してはスパッタ技術が利用されて
おり、近年では特に良好な絶縁膜、保護膜として5iO
y(石英)のスパッタ膜が利用されている。そして、こ
のスパッタ石英膜の形成に際しても、従来から使用され
るスパッタ装置による膜形成では下地段差上の被覆性向
上を図ることが困難なことから、近年では所謂バイアス
スパッタ法と称されるスパッタ方法が使用されてきてい
る。
Sputtering technology is used in the manufacture of semiconductor devices, and in recent years 5iO has been used as a particularly good insulating film and protective film.
A sputtered film of y (quartz) is used. When forming this sputtered quartz film, it is difficult to improve the coverage on the base step by forming the film using conventional sputtering equipment, so in recent years a sputtering method called the so-called bias sputtering method has been used. has been used.

このスパッタ方法は高周波電力をターゲットのみならず
基板(ウェーハ基板等)ホルダ電極にも印加し、スパッ
タデポジションと同時にスパッタエツチング作用をも行
なわせ、これにより基板上に形成した膜の下地段差上被
覆性を向上させ、さらに膜表面を平坦化しながら膜形成
を進行させて均一な厚さの膜を形成しようとするもので
ある。
In this sputtering method, high-frequency power is applied not only to the target but also to the substrate (wafer substrate, etc.) holder electrode, and a sputter etching action is performed at the same time as sputter deposition, thereby coating the underlying step surface of the film formed on the substrate. The objective is to form a film with a uniform thickness by improving the film surface properties and flattening the film surface while proceeding with film formation.

しかしながら、この方法によれば小径ウェーハ等の狭い
面積内においては均一な膜厚が得られ易いが、ウェーハ
が大径化された場合や実際のスパッタ装置のように多数
枚のウェーハを同時に処理するような場合にはスパッタ
面積が大きくなり、各ウェー・・間での膜厚にばらつき
が生じ易い。例えば第1図に示すように、周囲数箇所に
ターゲット2を配置したケーシング1の中央に略円筒形
のホルダ電極3を軸転可能に設け、このホルダ電極30
局面に上下方向にウェーハ4を保持させた上で所要の高
周波電力をターゲット2及びホルダ電極3に印加し、か
つケーシング1内を所定のガス雰囲気に保ってスパッタ
を行なうように構成した装置が提案されている。ところ
が、この構造のものでは、特に上下方向においてスパッ
タ現象に差が生じ、第2図に示すよ5に上下に配設保持
したウェーハ4a、4bに形成された膜の厚さが上下部
位で小さく、これらの中間部位で大きくなるという現象
が生じて均一な膜厚が得られていない。
However, with this method, it is easy to obtain a uniform film thickness within a narrow area such as a small-diameter wafer, but when the wafer has a large diameter or a large number of wafers are processed simultaneously as in an actual sputtering device, In such a case, the sputtering area becomes large and the film thickness tends to vary between wafers. For example, as shown in FIG. 1, a substantially cylindrical holder electrode 3 is rotatably provided in the center of a casing 1 in which targets 2 are arranged at several locations around the casing 1.
An apparatus is proposed that is configured to hold the wafer 4 vertically on a surface, apply the required high frequency power to the target 2 and the holder electrode 3, and perform sputtering while maintaining the inside of the casing 1 in a predetermined gas atmosphere. has been done. However, with this structure, there is a difference in the sputtering phenomenon, especially in the vertical direction, and as shown in FIG. , a phenomenon occurs in which the film becomes large in the intermediate region between them, and a uniform film thickness cannot be obtained.

このような膜厚の不均一が生ずると、例えばスルーホー
ル加工時にパターン重ね合せの誤差により生じる「目あ
き」部で下地パッシベーション膜にまで孔が形成される
(膜が薄いため)ことがあり、上部に形成するA−e配
線がこの部分で断線するという不具合が発生する。
If such uneven film thickness occurs, for example, holes may be formed in the underlying passivation film (because the film is thin) at the "gaps" caused by errors in pattern overlay during through-hole processing. A problem occurs in that the A-e wiring formed in the upper part is disconnected at this portion.

本発明の目的は、大径ウェーハや多数のウェーハにスパ
ッタ膜を形成する場合にも各ウェーハに均一な厚さの膜
を形成することができるスパッタ装置を提供することに
ある。
An object of the present invention is to provide a sputtering apparatus that can form a film of uniform thickness on each wafer even when forming a sputtered film on a large diameter wafer or a large number of wafers.

この目的を達成するために本発明はターゲットの前面に
所要形状のシェイパを配設し、このシェイパによりスパ
ッタ膜の形成速度を部分的に変化調整し得るように構成
したものである。
In order to achieve this object, the present invention is configured such that a shaper of a desired shape is disposed in front of the target, and the formation rate of the sputtered film can be partially changed and adjusted by the shaper.

以下、本発明を図示の実施例により説明する。Hereinafter, the present invention will be explained with reference to illustrated embodiments.

第3図及び第4図は本発明のスパッタ装置の平面構成図
と正面構成図であり、箱状のケーシング11の中央には
略円筒状のホルダ電極13を回転軸15によって水平方
向に回転できるように支持している。前記ケーシング1
1にはガス供給口16と排気口17を連設し、ケーシン
グ内を所要のガス(例えばAr)雰囲気でかつ所要のガ
ス圧力に保持している。また、ケーシング11の四周囲
には石英材のターゲット12をカバー18を用いて支持
し、これには高周波電力源19を接続している。
3 and 4 are a plan configuration diagram and a front configuration diagram of the sputtering apparatus of the present invention, in which a substantially cylindrical holder electrode 13 is installed in the center of a box-shaped casing 11 and can be rotated horizontally by a rotating shaft 15. I support it as such. Said casing 1
1 is provided with a gas supply port 16 and an exhaust port 17 in series to maintain the inside of the casing in a required gas atmosphere (for example, Ar) and at a required gas pressure. Further, a target 12 made of quartz is supported around the four peripheries of the casing 11 using a cover 18, and a high frequency power source 19 is connected to this.

そして、前記各ターゲット12の前面位置にはブラケッ
ト20を用いてシェイパ21を支持している。このシェ
イパ21は後述する。
A shaper 21 is supported at the front position of each target 12 using a bracket 20. This shaper 21 will be described later.

一方、前記ホルダ電極13の周面には、石英スパッタ膜
を形成する多数枚のウエーノ・14を上下および周方向
に配列して支持させている。ウェーハ14は特に上下方
向においてターゲット12の上下寸法以内に配設される
ことが好ましい。また、前記ホルダ電極13には高周波
電力源22を接続している。
On the other hand, on the circumferential surface of the holder electrode 13, a large number of wafers 14 forming a quartz sputtered film are arranged and supported in the vertical and circumferential direction. It is preferable that the wafer 14 be disposed within the vertical dimension of the target 12, particularly in the vertical direction. Further, a high frequency power source 22 is connected to the holder electrode 13.

−前記シェイパ21は絶縁状態を保って支持されたSi
n、板からなり、第5図に示すようにその中帯乃至中心
部には縦横の溝からなる開口部23を形成している。こ
の開口部23の形状及び寸法は、前記したターゲット1
2の材質、太きさや高周波電力源19.20の強度、更
にはクーデZ、 ト12とウェーハ14との距離等檻々
の要因によって決定されろ。本例では中央位置に設けた
1本の縦溝23aと、これに直交してその幅が不揃いな
4本の横溝23bとによって形成している。なお、シェ
イパ21とターゲット12の間には微小間隙が構成され
る。
- The shaper 21 is made of Si supported in an insulating state.
As shown in FIG. 5, an opening 23 consisting of vertical and horizontal grooves is formed in the middle band or center of the plate. The shape and dimensions of this opening 23 are determined by the target 1 described above.
It is determined by various factors such as the material and thickness of the wafer 2, the strength of the high frequency power source 19 and 20, and the distance between the wafer 12 and the wafer 14. In this example, it is formed by one longitudinal groove 23a provided at the center position and four lateral grooves 23b orthogonal to the longitudinal groove 23a and having irregular widths. Note that a minute gap is formed between the shaper 21 and the target 12.

以上の構成によればケーシング11内に所要の反応用ガ
スを供給すると共に内部を所定の真空圧とし、かつター
ゲット12及びホルダ電極13に夫々高周波電力を印加
すればスパッタが開始される。即ち、ガス中のイオン、
例えばArイオンは電界によってターゲット12に衝突
され、この衝撃によってS r 02をスパッタし、こ
れをウェーハ14表面に堆積させて膜を形成する。この
とき、Arイオンの一部はホルダ電極13に印加された
高周波電力(バイアス)によってウエーノ・14表面に
衝突してこれを逆スパツタ、つまりスパッタエツチング
するため、下地段差上に堆積された5in2の角を削っ
て表面を平坦化する。したがって、これを継続すること
によりウェーハ上には表面平坦なS iO,膜が形成さ
れることになる。そして、この作用に際してターゲット
12の前には所要形状の開口部23を有するシェイパ2
1を設置しているので、Arイオンのターゲットへの衝
突頻度やターゲットからウェーハへ向けてのS i O
,。
According to the above configuration, sputtering is started by supplying a required reaction gas into the casing 11, setting the interior to a predetermined vacuum pressure, and applying high frequency power to the target 12 and the holder electrode 13, respectively. That is, ions in the gas,
For example, Ar ions are bombarded by the target 12 by an electric field, and the impact sputters S r 02, which is deposited on the surface of the wafer 14 to form a film. At this time, some of the Ar ions collide with the surface of the wafer 14 due to the high frequency power (bias) applied to the holder electrode 13 and cause reverse sputtering, that is, sputter etching. Sharpen the corners and flatten the surface. Therefore, by continuing this process, a SiO film with a flat surface will be formed on the wafer. For this action, a shaper 2 having an opening 23 of a desired shape is placed in front of the target 12.
1 is installed, the frequency of Ar ion collisions with the target and the S i O from the target to the wafer are
,.

のスパッタ頻度等の分布がターゲット表面において異な
るようになり、これによりこれに対向するウェーハ14
への膜形成速度にも部分的な差が発生する。したがって
、従来生じていた膜厚の不均一がこの速度の差によって
是正されてウェーハの広い範囲にわたって均一な膜厚の
膜が形成され、大径のウェーハはもとよりボルダ電極1
3の上下に配置した各ウェーハにわたって均一な膜を形
成できる。ホルダ電極13はスパッタの最中ゆっくりと
回転しているので、周方向に配置したウェーハの周方向
の厚さ分布を均一化できるのは言うまでもない。
The distribution of sputtering frequency etc. becomes different on the target surface, which causes the wafer 14 facing
Local differences also occur in the rate of film formation. Therefore, the non-uniformity in film thickness that has conventionally occurred is corrected by this difference in speed, and a film with a uniform thickness is formed over a wide range of the wafer.
A uniform film can be formed over each wafer placed above and below the wafer. Since the holder electrode 13 rotates slowly during sputtering, it goes without saying that the circumferential thickness distribution of the wafers arranged in the circumferential direction can be made uniform.

したがって、均一な膜を形成できることによりスルーホ
ールの加工においてもA詔配線の切断等の不具合が生じ
ることもなく、また石英スパッタ膜の膜厚均一化を可能
とすることにより高速論理LSIの実現を図ることもで
きる。
Therefore, by being able to form a uniform film, there will be no problems such as cutting of the A-wiring when processing through-holes, and by making it possible to make the film thickness of the quartz sputtered film uniform, it will be possible to realize high-speed logic LSIs. You can also try it out.

ここで、前記シェイパ21の開口部23の形状は一例を
示すものであり、ターゲット材料や形状等の要因に応じ
て適宜変化調整することが好ましいのは前述の通りであ
る。
Here, the shape of the opening 23 of the shaper 21 is shown as an example, and as described above, it is preferable to change and adjust the shape as appropriate depending on factors such as the target material and shape.

以上のように本発明のスパッタ装置は、所謂バイアスス
パッタ構造として構成すると共にターゲットの前面に所
要形状の開口部を有するシェイパを配設しているので、
開口部の形状に応じてスパッタ膜の形成速度を部分的に
変化調整することができ、これにより大径ウェーハやホ
ルダ電極上の多数枚のウェーハ等、広い面積にわたって
均一なスパッタ膜を形成することができるという効果を
奏する。
As described above, the sputtering apparatus of the present invention is configured as a so-called bias sputtering structure and is provided with a shaper having an opening of a desired shape in front of the target.
The sputtered film formation speed can be partially adjusted depending on the shape of the opening, making it possible to form a uniform sputtered film over a wide area, such as large diameter wafers or multiple wafers on a holder electrode. It has the effect of being able to.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のバイアススパッタ装置の概念図、第2図
は不具合を説明する図、 第3図及び第4図は本発明のスパッタ装置の平面及び正
面方向からの各断面図、 第5図はシェイパの正面図である。 11・・・ケーシング、12・・・ターゲット、13・
・・ホルダ電極、14・・・ウェーハ、19・・・高周
波電力源、21・・・シェイパ、22・・・高周波電力
源、23・・・開口部。 第  1  図 / 〆 第  2  図 第  3  図 /2
FIG. 1 is a conceptual diagram of a conventional bias sputtering device, FIG. 2 is a diagram explaining a problem, FIGS. 3 and 4 are cross-sectional views of the sputtering device of the present invention from a plane and a front direction, and FIG. 5 is a front view of the shaper. 11...Casing, 12...Target, 13.
... Holder electrode, 14... Wafer, 19... High frequency power source, 21... Shaper, 22... High frequency power source, 23... Opening. Figure 1/ Figure 2 Figure 3/2

Claims (1)

【特許請求の範囲】 1、反応用のケーシング内に支持したターゲットと、ケ
ーシング内に配設しかつウエーノ・を支持したホルタ゛
電極の夫々に高周波電力を印加してバイアススパッタを
行、なうように構成し、かつ前記ターゲットの前面には
所要形状の開口部な有するシェイパを配設し、この開口
部の形状を変化することにより前記ウェーハに対する膜
形成速度の分布を変化調整し得るように構成したことを
特徴とするスパッタ装置。 2、シェイパをS i02板にて形成し、その中央部に
形成した縦溝と横溝とで開口部を構成してなる特許請求
の範囲第1項記載のスパッタ装置。
[Claims] 1. Bias sputtering is performed by applying high frequency power to each of a target supported in a reaction casing and a Holter electrode disposed in the casing and supporting a wafer. A shaper having an opening of a desired shape is disposed in front of the target, and by changing the shape of the opening, the distribution of film formation rate on the wafer can be changed and adjusted. A sputtering device characterized by: 2. The sputtering apparatus according to claim 1, wherein the shaper is formed of an Si02 plate, and the opening is formed by vertical grooves and horizontal grooves formed in the center of the shaper.
JP22627782A 1982-12-24 1982-12-24 Sputtering device Pending JPS59117220A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22627782A JPS59117220A (en) 1982-12-24 1982-12-24 Sputtering device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22627782A JPS59117220A (en) 1982-12-24 1982-12-24 Sputtering device

Publications (1)

Publication Number Publication Date
JPS59117220A true JPS59117220A (en) 1984-07-06

Family

ID=16842683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22627782A Pending JPS59117220A (en) 1982-12-24 1982-12-24 Sputtering device

Country Status (1)

Country Link
JP (1) JPS59117220A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61164219A (en) * 1985-01-14 1986-07-24 ゼロツクス コーポレーシヨン Apparatus for manufacturing thin-film transistor array
JPS6431967A (en) * 1987-07-27 1989-02-02 Tokio Nakada Manufacture of thin film
JPH03253568A (en) * 1990-03-05 1991-11-12 Ube Ind Ltd Carrousel type sputtering device and sputtering method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61164219A (en) * 1985-01-14 1986-07-24 ゼロツクス コーポレーシヨン Apparatus for manufacturing thin-film transistor array
JPS6431967A (en) * 1987-07-27 1989-02-02 Tokio Nakada Manufacture of thin film
JPH03253568A (en) * 1990-03-05 1991-11-12 Ube Ind Ltd Carrousel type sputtering device and sputtering method
JPH0768614B2 (en) * 1990-03-05 1995-07-26 宇部興産株式会社 Carousel type sputtering device and spattering method thereof

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