JPS59116868U - Printed board continuity test equipment - Google Patents

Printed board continuity test equipment

Info

Publication number
JPS59116868U
JPS59116868U JP18858183U JP18858183U JPS59116868U JP S59116868 U JPS59116868 U JP S59116868U JP 18858183 U JP18858183 U JP 18858183U JP 18858183 U JP18858183 U JP 18858183U JP S59116868 U JPS59116868 U JP S59116868U
Authority
JP
Japan
Prior art keywords
printed board
continuity test
test equipment
checker
measured
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18858183U
Other languages
Japanese (ja)
Inventor
手塚　正寛
西野　克美
敏郎 児玉
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP18858183U priority Critical patent/JPS59116868U/en
Publication of JPS59116868U publication Critical patent/JPS59116868U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は典型的なプリント板の導体パターンの配置の一
部を示す平面図、第２図は従来技術において用いられて
いる保護膜の一例を示す部分図。 １・・・プリント板、３・・・ランド部、５・・・スル
ーホール、６・・・パターン、１０・・・保護膜、１２
・・・孔。FIG. 1 is a plan view showing part of the arrangement of conductor patterns on a typical printed circuit board, and FIG. 2 is a partial view showing an example of a protective film used in the prior art. DESCRIPTION OF SYMBOLS 1... Printed board, 3... Land portion, 5... Through hole, 6... Pattern, 10... Protective film, 12
...hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定ピッチで形成された多数のスルーホールを有するプ
リント板のスルーホールの最小ピッチ間隔で一次元方向
に設けられた多数のチェッカーピンと、被測定用プリン
ト板上に重なるシート膜厚方向にのみ導電性を有する導
電異方性エラスティックシートと、該シート上に該チェ
ッカーピンを下降させかつ該チェッカーピンを被測定プ
リント板に対し該方向と直交する方向に相対的に走査す
る機構とを有し該チェッカーピンと被測定プリント板の
スルーホールとを該導電異方性エラスティックシートを
介して導通試験することを特徴とするプリント板の導通
試験装置。A printed board with many through holes formed at a predetermined pitch has a large number of checker pins arranged one-dimensionally at the minimum pitch between the through holes, and a sheet that overlaps the printed board to be measured and is electrically conductive only in the film thickness direction. and a mechanism for lowering the checker pin onto the sheet and scanning the checker pin relative to the printed board to be measured in a direction perpendicular to the direction. A continuity test device for a printed board, characterized in that a continuity test is performed between a checker pin and a through hole of a printed board to be measured via the conductive anisotropic elastic sheet.
JP18858183U 1983-12-08 1983-12-08 Printed board continuity test equipment Pending JPS59116868U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18858183U JPS59116868U (en) 1983-12-08 1983-12-08 Printed board continuity test equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18858183U JPS59116868U (en) 1983-12-08 1983-12-08 Printed board continuity test equipment

Publications (1)

Publication Number Publication Date
JPS59116868U true JPS59116868U (en) 1984-08-07

Family

ID=30406792

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18858183U Pending JPS59116868U (en) 1983-12-08 1983-12-08 Printed board continuity test equipment

Country Status (1)

Country Link
JP (1) JPS59116868U (en)

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