JPS5911675A - P-side ohmic electrode for compound semiconductor - Google Patents
P-side ohmic electrode for compound semiconductorInfo
- Publication number
- JPS5911675A JPS5911675A JP11977182A JP11977182A JPS5911675A JP S5911675 A JPS5911675 A JP S5911675A JP 11977182 A JP11977182 A JP 11977182A JP 11977182 A JP11977182 A JP 11977182A JP S5911675 A JPS5911675 A JP S5911675A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- thickness
- type
- buried
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 150000001875 compounds Chemical class 0.000 title claims description 6
- 239000013078 crystal Substances 0.000 claims abstract description 12
- 238000009792 diffusion process Methods 0.000 claims abstract description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims abstract description 6
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 3
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 3
- 229910052804 chromium Inorganic materials 0.000 claims abstract 2
- 235000012431 wafers Nutrition 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 1
- 239000012535 impurity Substances 0.000 claims 1
- 238000005468 ion implantation Methods 0.000 claims 1
- 239000010936 titanium Substances 0.000 claims 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims 1
- 239000010937 tungsten Substances 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 10
- 229910000679 solder Inorganic materials 0.000 abstract description 8
- 229910052698 phosphorus Inorganic materials 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 3
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000010438 heat treatment Methods 0.000 description 7
- 230000006866 deterioration Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- BYDQGSVXQDOSJJ-UHFFFAOYSA-N [Ge].[Au] Chemical compound [Ge].[Au] BYDQGSVXQDOSJJ-UHFFFAOYSA-N 0.000 description 2
- 238000005253 cladding Methods 0.000 description 2
- 238000003776 cleavage reaction Methods 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 230000007017 scission Effects 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052958 orpiment Inorganic materials 0.000 description 1
- 238000000682 scanning probe acoustic microscopy Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
Abstract
Description
【発明の詳細な説明】
本発明は■−V族化合物半導体のオーム性電極に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ohmic electrode of a ■-V group compound semiconductor.
半導体レーザは、その高信頼化のために動作時に主とし
て活性層内で発生するジュール熱を効果的に外部へ放散
させる必要がある。第1図に半導体レーザ素子のマウン
ト構造を示す。レーザチップ11はソルダ材12として
インジウム(In)、金−ゲルマニウム(Au−Qe)
合金、鉛−錫(Pb−8n)合金等を用い、高熱伝導度
のマウント材13として例えば銅(CLI)、モリブデ
ン(Mo)、シリコン(Si)、シリコンカーパイ)
(SiC)上にマウントされる。特にここで問題となる
のは、レーザの活性層14がマウント材側にボンディン
グされた構造である。なお15ばレーザチップの電極で
ある。In order to increase the reliability of semiconductor lasers, it is necessary to effectively dissipate Joule heat generated mainly within the active layer during operation to the outside. FIG. 1 shows the mounting structure of a semiconductor laser device. The laser chip 11 uses indium (In) and gold-germanium (Au-Qe) as the solder material 12.
For example, copper (CLI), molybdenum (Mo), silicon (Si), silicon carbide) is used as the mount material 13 with high thermal conductivity.
(SiC). Particularly problematic here is the structure in which the active layer 14 of the laser is bonded to the mount material side. Note that 15 is an electrode of the laser chip.
素子の劣化原因の一つにAuあるいはソルダ材の活性層
内への拡散があげられる。One of the causes of device deterioration is the diffusion of Au or solder material into the active layer.
半導体レーザは光共振器面にへき開を用いるため素子の
結晶厚みは100μm前後を必要とする。Since a semiconductor laser uses a cleavage in the optical cavity surface, the crystal thickness of the device needs to be around 100 μm.
これよシ薄い場合、活性層にかかる応力により素子が劣
化する。また厚いとへき開が困難となり、この上限が1
50μm程度である。このような薄いウェーハにTi、
Or、Mo、Wのような硬い金属を蒸着する場合厚みが
全体で400nmを越えると膜にクラックを生じること
がある。また半導体レーザチップのへき開の際にこれら
金属のパリが生じて、素子の元放出面の光陽をさえぎっ
たり、電気的に共振器面に露出している’p −n接合
をショート略せる不良が発生しやすい。If it is thinner than this, the element will deteriorate due to stress applied to the active layer. Also, if it is thick, cleavage becomes difficult, and this upper limit is 1
It is about 50 μm. Ti,
When a hard metal such as Or, Mo, or W is deposited, if the total thickness exceeds 400 nm, cracks may occur in the film. In addition, when a semiconductor laser chip is cleaved, these metal particles are generated, blocking the light from the original emission surface of the device, and causing defects that can short-circuit the 'p-n junction electrically exposed to the cavity surface. Likely to happen.
筐た第1層に用いたCr、’l’iは()aAs。Cr and 'l'i used for the first layer of the casing are ()aAs.
In()aAsP 等の化合物半導体に対する密着性の
良い金属であるとともに電極形成素子製造工程中に受け
る熱処理によって密着強度が低下するということもない
。また電気的特性即ち接触抵抗の熱的安定性も良い。こ
の膜の特性を確保するために、著しい欠陥となるピンホ
ールをなくすためには最低5Qnmの膜厚が必要である
。通常3QQnm程度迄を用いている。It is a metal that has good adhesion to compound semiconductors such as In()aAsP, and the adhesion strength is not reduced by heat treatment during the manufacturing process of the electrode forming element. It also has good electrical properties, ie, contact resistance and thermal stability. In order to ensure the properties of this film, a minimum film thickness of 5 Qnm is required to eliminate pinholes, which are significant defects. Normally, up to about 3QQnm is used.
葦だ第2層のMo、Wは第3層のAuあるいはソルダが
素子製造工程中受ける熱処理によってTiと反応したり
、Auが結晶中に拡散するのを防ぐために設けた層であ
シ、これも最低50nmを必要とする。また、一般に3
00 nm程度迄を用いている。Mo and W in the second layer are provided to prevent the third layer of Au or solder from reacting with Ti during the heat treatment during the device manufacturing process and to prevent Au from diffusing into the crystal. also requires a minimum of 50 nm. Also, generally 3
00 nm is used.
本発明の目的は、m−v族化合物半導体素子、特に半導
体レーザ、面発光型発光ダイオードの電極劣化を防ぐた
めに、第1層がCr又はTi1第1層がMo又はW11
層層がAuの多層構造を持ち耐熱性が高く、はく離を生
じないpオーミック電極を提供することにある。An object of the present invention is to prevent electrode deterioration of m-v group compound semiconductor devices, particularly semiconductor lasers, and surface-emitting light emitting diodes.
The object of the present invention is to provide a p-ohmic electrode that has a multilayer structure of Au layers, has high heat resistance, and does not cause peeling.
第2図はGaA sウェーハに蒸着したTi / M
O/ A ll多層膜を熱処理して、その前後の元素の
深さ方向の分布を測定したものである。各層の厚みは1
llicυ50 nm、 Mo@l 50 nm、 A
uG!31μmである。またAuはあらがじめ分析前に
エツチング除去しである。測定にはオージェ電子分光分
析法を用いた。第2図(a)は蒸着したままの元素分布
を、第2図(b)は400cで熱処理を受けた後の元素
分布を示している。これから明らかなように通常の化合
物半導体のプロセスに用いるS iO,又はPSG膜の
化学蒸着工程(360tll’〜400C)やAuGe
Ni 等を用いたN、t−ミック電極の合金化熱処理工
程(400tl’程度)に対してもAuが結晶中に入ら
ないことおよび結晶構成元素であるGaG!41.As
(至)が電極中へ拡散してぃかないことが明らかになっ
ている。またInPにCr/MO/Au多層膜(Cr5
0nm/M。Figure 2 shows Ti/M deposited on a GaAs wafer.
The O/All multilayer film was heat treated and the depth distribution of elements before and after the heat treatment was measured. The thickness of each layer is 1
llicυ50 nm, Mo@l 50 nm, A
uG! It is 31 μm. In addition, Au was removed by etching before analysis. Auger electron spectroscopy was used for the measurement. FIG. 2(a) shows the element distribution as deposited, and FIG. 2(b) shows the element distribution after heat treatment at 400c. As is clear from this, the chemical vapor deposition process (360tll'~400C) of SiO or PSG film used in ordinary compound semiconductor processes and the process of AuGe
Even in the alloying heat treatment process (approximately 400 tl') of N, t-mic electrode using Ni etc., Au does not enter the crystal and GaG, which is a crystal constituent element! 41. As
It has become clear that (to) does not diffuse into the electrode. In addition, InP has a Cr/MO/Au multilayer film (Cr5
0nm/M.
200 n m / A u I A m )を被着し
て、400t:’の熱処理をほどこした試料の元素の深
さ方向1布を測定した。比較としてInPにCr /
A u多層膜(Crl−00nm/ALIIμm)t=
被着して同じく熱処理をほどこしたものと比較した。T
i/MO/Au電極は、AuあるいはIn、Pが相互に
拡散してはいないが、Cr/Au電極はInがAu表面
に拡散しており、Auも結晶と反応している。これから
Mo層が有効に働いていることが明らかになった。200 nm/A u I A m ) was deposited and the sample was subjected to a heat treatment of 400 t:', and one distribution of elements in the depth direction was measured. For comparison, InP has Cr/
A u multilayer film (Crl-00nm/ALIIμm) t=
Comparisons were made with those that were deposited and subjected to the same heat treatment. T
In the i/MO/Au electrode, Au, In, and P are not mutually diffused, but in the Cr/Au electrode, In is diffused on the Au surface, and Au also reacts with the crystal. From this, it became clear that the Mo layer was working effectively.
ところで蒸着膜は一般に膜厚が薄い場合、塊状に金属粒
子が分布しているのみで、完全に連続な膜とはなってい
ない。この連続膜を高融点金属で得るには500m′f
、最低必要とする。一方この高融点金属は硬く、蒸着膜
内に蓄積される内部歪も太きいため、膜厚が厚くなるに
つれて、クラックが入りやすくなる。さらにウェーハが
薄い場合、被着後受ける熱応力等によって結晶からはく
離する場合がある。これを厚さ100μmのGBAs。By the way, when a deposited film is generally thin, metal particles are only distributed in lumps, and the film is not completely continuous. To obtain this continuous film with high melting point metal, 500m'f
, requires a minimum. On the other hand, this high melting point metal is hard and the internal strain accumulated in the deposited film is large, so as the film thickness increases, cracks are more likely to occur. Furthermore, if the wafer is thin, it may peel off from the crystal due to thermal stress or the like after being applied. This is GBAs with a thickness of 100 μm.
TnPウェーハについて実験したところ、400nm以
下ではこの不良はないことが確聞できた。When conducting experiments on TnP wafers, it was confirmed that this defect does not occur when the thickness is 400 nm or less.
以下、本発明の実施例を第3図に示したInGaAsP
/I nP半導体レーザによシ説明する。Hereinafter, an example of the present invention will be explained using InGaAsP shown in FIG.
/I An explanation will be given using an nP semiconductor laser.
n型InP基板31に形成されたp型InPからなる埋
め込み層32によって埋めこまれたInGaAsp活性
層33に電流を限定して流すために、埋め込み層32と
伝導型のことなるn型■nQaAsP 層34が表面
に設けてあり、またI n G a A s P 活
性層33の上には、p型InPからなるクラッド層35
とキャップ層と呼ばれるp型InGaAsP からな
る高伝導層36が設けられ、オーミック接触を得やすく
しである。第1の金属層38としてTiを50nm、そ
の上に第2の金属層39としてMo150nm、さらに
その上に第3の金属層40としてAuを1μm被着する
。In order to limit current flow to the InGaAsp active layer 33 buried by the buried layer 32 made of p-type InP formed on the n-type InP substrate 31, an n-type nQaAsP layer having a conductivity type different from that of the buried layer 32 is formed. 34 is provided on the surface, and a cladding layer 35 made of p-type InP is provided on the InGaAsP active layer 33.
A highly conductive layer 36 made of p-type InGaAsP called a cap layer is provided to facilitate obtaining ohmic contact. Ti is deposited to a thickness of 50 nm as a first metal layer 38, Mo is deposited to a thickness of 150 nm as a second metal layer 39 thereon, and Au is deposited to a thickness of 1 μm as a third metal layer 40 thereon.
この時第1層にCr、第2層にWを用いても良い。At this time, Cr may be used for the first layer and W may be used for the second layer.
一般的にはこの後対向電極41を、ALIGeNi
系のオーミック材料で形成シタ後、チップ化する。Generally, after this, the counter electrode 41 is made of ALIGeNi.
After forming with ohmic material, it is made into chips.
以上のように本発明の電極ヲもつ半導体レーザは、70
tZ:、5mWの高温高出力動作寿命試験でも安定動作
?示し、約1000時間経過後も動作電流の上昇はほと
んどなかった。とくにCr/Auのみの1を極の場合の
ような、ソルダ材と結晶構成元素との反応や、ソルダ材
のレーザ素子側への拡散による劣化はなかった。As described above, the semiconductor laser having the electrode of the present invention has a
tZ: Stable operation even in 5mW high temperature high power operation life test? There was almost no increase in the operating current even after about 1000 hours. In particular, there was no deterioration due to the reaction between the solder material and the crystal constituent elements or the diffusion of the solder material toward the laser element, unlike in the case of the 1-electrode of Cr/Au only.
本発明はGaAs−GaAtAs 糸ダブルへテレ半導
体レーザに適用しても良好な結果が得られた。Good results were obtained when the present invention was applied to a GaAs-GaAtAs thread double telephoto semiconductor laser.
本発明によれば、密肴性が良くクラックが生じない、耐
熱性が高く半導体レーザ結晶の電極側への[、!:、A
Uあるいはソルダ材の結晶内部への拡散を抑制できる電
極を提供できるので、半導体レーザや発光ダイオードの
電極劣化防止に効果がある。According to the present invention, the electrode side of the semiconductor laser crystal has good adhesion, no cracks, and high heat resistance. :, A
Since it is possible to provide an electrode that can suppress the diffusion of U or solder material into the crystal, it is effective in preventing electrode deterioration of semiconductor lasers and light emitting diodes.
第1図は半導体レーザのマウントキれた状態の斜視図、
第2図は本発明の多層膜の耐熱性のデータ、第3図は本
発明の電極を用いた一実施例であるInGaAsP
/InP半祷体レーザの斜視図である。
11・・・半導体レーザ素子側、12・・・ソルダ材、
13・・・サブマウント、14・・・半導体レーザ活性
層121−T i 、 22=−M o、24−Ga、
25−As2S3・・・n型InP基板、32・ p型
InP埋め込み層、33・・・InGaAsp 活性
層、34・・・n型I n (J a A s P
層、35・ p型丁npクラッド層、36−p型InG
aAspキャップ層、37− S iO2絶縁膜、38
・・・Ti(父はCr)からなる第1の金属1m、39
・・・Mo(又はW)からなる第2の金属層、40・・
・第3層All、41・・・nオーミック対重 1 図
4
罰 2 図
(久)(−f−9
距庖龜(PPrL)
E巨#π 9列、ノ′f:J3図
dθ
国分寺市東恋ケ窪1丁目280番
地株式会社日立製作所中央研究
所内
■発 明 者 今井邦典
国分寺市東恋ケ窪1丁目280番
地株式会社日立製作所中央研究
所内
(剤発 明 者 加藤弘
高崎市西横手町111番地株式会
社日立製作所高崎工場内
・、老発 明 者 小林正道
高崎市西横手町111番地株式会
社日立製作所高崎工場内Figure 1 is a perspective view of the semiconductor laser in an unmounted state.
Figure 2 shows data on the heat resistance of the multilayer film of the present invention, and Figure 3 shows an example of InGaAsP using the electrode of the present invention.
FIG. 2 is a perspective view of a /InP semicircular body laser. 11...Semiconductor laser element side, 12...Solder material,
13... Submount, 14... Semiconductor laser active layer 121-T i , 22=-Mo, 24-Ga,
25-As2S3...n-type InP substrate, 32-p-type InP buried layer, 33...InGaAsp active layer, 34...n-type InP (J a As P
layer, 35-p-type np cladding layer, 36-p-type InG
aAsp cap layer, 37- SiO2 insulation film, 38
...1m of first metal consisting of Ti (father is Cr), 39
...Second metal layer made of Mo (or W), 40...
・3rd layer All, 41...n ohmic counterweight 1 Figure 4 Punishment 2 Figure (ku) (-f-9 distance lock (PPrL)
E giant #π 9th row, no'f: J3 diagram dθ Inside the Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi Inventor Kuninori Imai Inside the Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji-shi Inventor: Hirokato Kato, 111 Nishiyokote-cho, Takasaki City, Hitachi, Ltd., Takasaki Factory, Elderly Inventor: Masamichi Kobayashi, 111 Nishiyokote-cho, Takasaki City, Hitachi, Ltd., Takasaki Factory
Claims (1)
ョンによって高濃度ドープされたウェーハに対して、膜
厚5Qnm以上のチタン(T i )又はクロム(Cr
)を第1層に、膜厚5Qnm以上のタングステン(W)
又はモリブデン(MO)會第2層に、八〇を第3層に用
い、かつ第1層と第2層の膜厚の和が4QQnmを越え
ず、150μm以下の結晶厚みを持つ素子に対して形成
されたことを特徴とする化合物半導体P側オーミック奄
極。For wafers heavily doped with acceptor impurities by diffusion or ion implantation, a titanium (T i ) or chromium (Cr
) as the first layer, tungsten (W) with a film thickness of 5 Qnm or more
Or, for an element in which molybdenum (MO) is used for the second layer and 80 is used for the third layer, and the sum of the film thicknesses of the first and second layers does not exceed 4QQnm, and the crystal thickness is 150μm or less. A compound semiconductor P-side ohmic pole is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11977182A JPS5911675A (en) | 1982-07-12 | 1982-07-12 | P-side ohmic electrode for compound semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11977182A JPS5911675A (en) | 1982-07-12 | 1982-07-12 | P-side ohmic electrode for compound semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5911675A true JPS5911675A (en) | 1984-01-21 |
Family
ID=14769794
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11977182A Pending JPS5911675A (en) | 1982-07-12 | 1982-07-12 | P-side ohmic electrode for compound semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5911675A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61202488A (en) * | 1985-03-06 | 1986-09-08 | Fujitsu Ltd | Manufacture of buried semiconductor laser |
US5153754A (en) * | 1989-06-30 | 1992-10-06 | General Electric Company | Multi-layer address lines for amorphous silicon liquid crystal display devices |
-
1982
- 1982-07-12 JP JP11977182A patent/JPS5911675A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61202488A (en) * | 1985-03-06 | 1986-09-08 | Fujitsu Ltd | Manufacture of buried semiconductor laser |
US5153754A (en) * | 1989-06-30 | 1992-10-06 | General Electric Company | Multi-layer address lines for amorphous silicon liquid crystal display devices |
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