JPS59112666A - Manufacture of light emitting element - Google Patents

Manufacture of light emitting element

Info

Publication number
JPS59112666A
JPS59112666A JP57222467A JP22246782A JPS59112666A JP S59112666 A JPS59112666 A JP S59112666A JP 57222467 A JP57222467 A JP 57222467A JP 22246782 A JP22246782 A JP 22246782A JP S59112666 A JPS59112666 A JP S59112666A
Authority
JP
Japan
Prior art keywords
light emitting
epitaxial layer
emitting element
forward voltage
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57222467A
Other languages
Japanese (ja)
Inventor
Hiroshi Odonari
大隣 博史
Sohei Abe
阿部 壮平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57222467A priority Critical patent/JPS59112666A/en
Publication of JPS59112666A publication Critical patent/JPS59112666A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To decrease the forward voltage and to improve the light emitting efficiency of a light emitting element by attaching an anode electrode after etching the surface of a reverse conductive type epitaxial layer on a semiconductor substrate, and attaching a cathode electrode to the back surface of the substrate. CONSTITUTION:The surface of a P type epitaxial layer 12 on an N type semiconductor substrate 11 is treated with an etchant to form ultrafine uneven surface. Then, a diffused layer 15 of high density is formed to compensate the decrease in the density of the layer 12 due to etching, thereby preventing the increase in the forward voltage drop of a light emitting element. Then, a thin metal film is covered, patterned to form an anode electrode 13, a cathode electrode 14 is provided on the back surface of the substrate, thereby obtaining a light emitting element group. It is diced along a broken line to divide into pellets. According to this structure, since etched before the electrodes are formed, no increase in the forward voltage based on the reduction in the area of the electrodes due to side etching exists, the margin rate of the area of the electrodes can be reduced to decrease the size of the element, light emitting efficiency is high and the forward voltage is low.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、高発光効率を有しかつ低重圧1し源で動作
が可能な発光素子の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a light emitting element that has high luminous efficiency and can be operated with a low pressure and one source.

〔発明の技術的背景とその間照点コ 一般に、例エバテレビのリモートコントロール装置等に
用いられ赤外発光信号によってチャンネル切換え号の制
御を行なうものにおいては、乾鴫池等の低′亀圧で動作
が可能でかつ高発゛光効率を有する発光素子が望まれて
いる。このような発光素子は、従来第1図(、)〜(c
)に示すような工程で形成される。すなわち、(a)図
に示すようにN形の半導体基板11上にP形のエピタキ
シャル層12を形成し、このエピタキシャル層12上に
アルミニウム等の金属薄膜を被着してパターニングを行
ないアノード電極13 、 l 3゜・・・を形成する
とともに、基板1ノの他方の面(裏面)に金属薄膜を被
着してカソード成極14を形成して(b)図に示すよう
な発光素子群を得る。次に、発光面に凹凸を形成して光
音乱反射させて発光効率を上げるため、燐酸系のエツチ
ング液でアノード電極13,13.・・・を形成したエ
ピタキシャル層12の露出面12′のエツチングを行な
った後、(b)図の破線に沿ってグイシングし、(C)
図に示すように各々のベレットに分割する。
[Technical Background of the Invention and Point of View] In general, devices that control channel switching signals using infrared light emitting signals, such as those used in remote control devices for EVA TV, operate at low tortoise pressures such as those in dry water ponds. There is a demand for a light-emitting element that is capable of emitting light and has high luminous efficiency. Conventionally, such light emitting elements are shown in Figures 1(,) to (c).
) is formed by the process shown in That is, as shown in the figure (a), a P-type epitaxial layer 12 is formed on an N-type semiconductor substrate 11, and a metal thin film such as aluminum is deposited on this epitaxial layer 12 and patterned to form an anode electrode 13. , l 3°... and depositing a metal thin film on the other surface (back surface) of the substrate 1 to form a cathode polarization 14 to form a light emitting element group as shown in the figure (b). obtain. Next, a phosphoric acid-based etching solution is applied to the anode electrodes 13, 13, . After etching the exposed surface 12' of the epitaxial layer 12 on which... is formed, etching is performed along the broken line in FIG.
Divide into each pellet as shown.

なお、N形基板1ノとP形のエピタキシャル層12との
不純物濃度を同程度に設足して発光効率を上昇させるた
め、必要に応じてN形基板11とP形エピタキシャル層
12との間にN形のエピタキシャル層を形成している。
Note that in order to increase the luminous efficiency by setting the impurity concentrations of the N-type substrate 1 and the P-type epitaxial layer 12 to the same level, a layer may be added between the N-type substrate 11 and the P-type epitaxial layer 12 as necessary. An N-type epitaxial layer is formed.

しかし、上記のような工程で形成された発光素子は、発
光面(P形エピタキシャル層12の諾出iz2’)のエ
ツチング工程において、第2図にA、Aとして示すよう
にアノード電極13の側方へもエツチング液が入シ込ん
でサイドエツチングされる。このだめ、アノード電極1
3とエピタキシャル層12(ψ1]えばGaAs) ト
ノg触面積が小さくなシ、素子の順電圧vFが高くなる
ので、高い電源電圧が必要となる。
However, in the light-emitting element formed in the above process, in the etching process of the light-emitting surface (the protrusion iz2' of the P-type epitaxial layer 12), the side of the anode electrode 13 is etched as shown as A and A in FIG. Etching liquid also enters the side, causing side etching. This dump, anode electrode 1
3 and the epitaxial layer 12 (ψ1], for example, GaAs).Since the contact area is small, the forward voltage vF of the element is high, so a high power supply voltage is required.

このような接触面積の低下による順電圧vFの上昇を防
止するためには、予めサイドエツチングを見込んで大き
なアノード電極を形成すれば良いが、発光面積が減少す
るため発光効率が低下し、同じ発光量を得ようとすると
一枚のウェハから得られるチップ数が減少する欠点があ
る。
In order to prevent an increase in the forward voltage vF due to such a reduction in contact area, it is possible to form a large anode electrode in advance with side etching in mind. If you try to increase the amount, there is a drawback that the number of chips that can be obtained from one wafer decreases.

すた、サイドエツチングを防止するだめにアノード電極
13およびこの電極13とエピタキシャル層12との接
点を壬ッチンノされない材質から成る保護膜で被覆して
からエツチングすることも考えられているが、保護膜の
被覆工程が必要となるのみならず、この保護膜の剥離が
困難である。
In order to prevent side etching, it has been considered to cover the anode electrode 13 and the contact point between this electrode 13 and the epitaxial layer 12 with a protective film made of a material that will not be etched before etching. Not only does this require a coating step, but it is also difficult to peel off this protective film.

〔発明の目的〕[Purpose of the invention]

この発明は上記のような事情に鑑みてなされたもので、
その目的とするところは、高発光効率でかつ頭取圧が低
いとともに素子の小形化により低コスト化も可能な発光
素子の製造方法を提供することである。
This invention was made in view of the above circumstances,
The objective is to provide a method for manufacturing a light emitting element that has high luminous efficiency and low head pressure, and can also reduce costs by downsizing the element.

〔発明の概要〕[Summary of the invention]

すなわち、この発明においては、半導体基板上に通導′
岨形のエピタキシャル層を形成し、このエピタキシャル
層の表面をエツチングした後このエツチング面上にアノ
ード成極を形成するとともに半導体基板の他方の而(裏
面)にもカソード電極を形成するものである。
That is, in this invention, a conductive layer is formed on a semiconductor substrate.
After forming a slope-shaped epitaxial layer and etching the surface of this epitaxial layer, an anode is formed on the etched surface, and a cathode electrode is also formed on the other side (back surface) of the semiconductor substrate.

〔発明の実2If!i例〕 以下、この発明の一実施例について図面を参照して説明
する。第3図(a)〜(d)はその製造工程を示すもの
で、まず、(a)図に示すようにN形の半導体基板1ノ
上にP形のエピタキシャル層12を形tiy、’ L 
、このエピタキシャル層12の表面に燐fM2系のエツ
チング液によってエツチングを施し、(b) lxlに
示すようにエビクキシャル層120表面に微細な凹凸を
形成する。次に、(C)図に示すようにエピタキシャル
層12上に亜鉛Zn等を拡散して高濃度層15:f:形
成する。これは、ウェハ状態でエツチングを施すとP形
エピタキシャル層12の51Mtが低下し、次の工程で
アノード酸・−を形成する時コンタクト抵抗が大きくな
って発光素子の順電圧■、が上昇するためである。そし
て、(d)図に示すようにエビタギシャル1112に形
成した高濃度層15上に金属薄膜を被着してパターニン
グを行フよいアノード酸i 13 、13 、・・・を
形成するとともに基板1ノの曲刃の面(裏面)に金属薄
膜を被着してカソード電極14を形成して発光素子鼾を
碍る。次Qこ、上記(d)図Q(おける破線に沿ってダ
イソングし、各々のペレットに分割する。
[The Fruit of Invention 2 If! Example i] Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIGS. 3(a) to 3(d) show the manufacturing process. First, as shown in FIG. 3(a), a P-type epitaxial layer 12 is formed on an N-type semiconductor substrate 1.
The surface of the epitaxial layer 12 is etched using a phosphorus-fM2-based etching solution to form fine irregularities on the surface of the epitaxial layer 120 as shown in (b) lxl. Next, as shown in the figure (C), zinc Zn or the like is diffused onto the epitaxial layer 12 to form a high concentration layer 15:f:. This is because when etching is performed in the wafer state, the 51Mt of the P-type epitaxial layer 12 decreases, and when an anodic acid layer 12 is formed in the next step, the contact resistance increases and the forward voltage of the light emitting element increases. It is. Then, as shown in the figure (d), a metal thin film is deposited and patterned on the high concentration layer 15 formed on the evitagital layer 1112 to form good anodic acids i 13 , 13 , . . . on the substrate 1. The cathode electrode 14 is formed by depositing a metal thin film on the surface (back surface) of the curved blade to improve the light emitting element snoring. Next, dice the pellets along the broken lines in Figure Q (d) above to separate them into individual pellets.

なお、前述したようにN形の半導体基板1)上にP形の
エピタキシャル層12を形成する前に、基板11上にN
形のエピタキシャル層を形成し、このN形エピタキシャ
ル層上にP形のエピタキシャル層12を積層形成しても
良い。
Note that, as described above, before forming the P-type epitaxial layer 12 on the N-type semiconductor substrate 1),
A type epitaxial layer may be formed, and a P type epitaxial layer 12 may be laminated on this N type epitaxial layer.

上述したような工程によれば、電極を形成する前ニ予め
エピタキシャル層12の表面にエツチングを行なうので
、サイドエツチングによる発光素子の順電圧■、の低下
はなく、電極の面積をサイドエツチングを見込んで大き
く設計する必沙もないので、一枚のウエノ・から得られ
る素子数を増加できコストの低減が図れる。また、製造
工程がa雑化するとともない。
According to the process described above, since the surface of the epitaxial layer 12 is etched in advance before forming the electrodes, the forward voltage (2) of the light emitting element does not decrease due to side etching, and the area of the electrodes is adjusted to accommodate the side etching. Since there is no need to design a large wafer, the number of elements obtained from one sheet of Ueno can be increased and costs can be reduced. Moreover, as the manufacturing process becomes more complex.

この発明によれば、従来の方法では、エツチングを施さ
ないものに比べて発光効率を1.5倍程度向上しようと
すると順電圧■、が高くなってしまうのに対し、1.8
〜2倍程度に向上でき、しかも素子の順電圧vFは従来
レベルと同等であった。
According to this invention, in the conventional method, when trying to improve the luminous efficiency by about 1.5 times compared to the one without etching, the forward voltage (1) becomes higher, whereas the forward voltage (1) increases by 1.8 times.
It was possible to improve the voltage by about 2 times, and the forward voltage vF of the element was at the same level as the conventional level.

〔発明の効果〕〔Effect of the invention〕

以上説明したようにこの発明によれば、高発光効率でか
つ順電圧が低いとともに素子の小形化による低コスト化
も可能な発光素子の製造方法が得られる。
As described above, according to the present invention, a method for manufacturing a light emitting element can be obtained that has high luminous efficiency and low forward voltage, and can also reduce costs by downsizing the element.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の発光素子の製造方法を説明するだめの図
、第2図はサイドエツチノグを説明するための図、第3
図はこの発明の一実施νりに係る発光素子の製造方法を
説明するだめの図である。 11・・・半導体基板、12・・・エピタキシャル層、
13・・・アノード電極、14・・・カソード電極。 出願人代理人  弁理士 鈴 江 武 彦牙1図 牙3図
Figure 1 is a diagram for explaining the conventional manufacturing method of a light emitting element, Figure 2 is a diagram for explaining a side etching nog, and Figure 3 is a diagram for explaining a side etch nog.
The figure is a diagram for explaining a method of manufacturing a light emitting device according to one embodiment of the present invention. 11... Semiconductor substrate, 12... Epitaxial layer,
13... Anode electrode, 14... Cathode electrode. Applicant's agent Patent attorney Takeshi Suzue Hikoga 1 picture 3 pictures

Claims (1)

【特許請求の範囲】[Claims] 半導体基板の表面上に逆導電形のエピタキシャル層を形
成する工程と、上記エピタキシャル層の表向にエツチン
グを施して凹凸を形成する工程と、上記エツチングを施
したエピタキシャル層および半導体基板の裏面それぞれ
に蒐1銘を形成する工程とを具備して成ることを詩歌と
する発光素子の製造方法。
A step of forming an epitaxial layer of opposite conductivity type on the surface of the semiconductor substrate, a step of etching the front surface of the epitaxial layer to form unevenness, and a step of forming an uneven layer on the etched epitaxial layer and the back surface of the semiconductor substrate, respectively. 1. A method for manufacturing a light-emitting element, which comprises the steps of forming a poem.
JP57222467A 1982-12-18 1982-12-18 Manufacture of light emitting element Pending JPS59112666A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57222467A JPS59112666A (en) 1982-12-18 1982-12-18 Manufacture of light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57222467A JPS59112666A (en) 1982-12-18 1982-12-18 Manufacture of light emitting element

Publications (1)

Publication Number Publication Date
JPS59112666A true JPS59112666A (en) 1984-06-29

Family

ID=16782869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57222467A Pending JPS59112666A (en) 1982-12-18 1982-12-18 Manufacture of light emitting element

Country Status (1)

Country Link
JP (1) JPS59112666A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014007179A (en) * 2012-06-21 2014-01-16 Panasonic Corp Method for manufacturing vertical structure light-emitting element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014007179A (en) * 2012-06-21 2014-01-16 Panasonic Corp Method for manufacturing vertical structure light-emitting element

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