RU2493634C1 - Method of making multistage photocell chips - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: method involves growing a photosensitive multilayer semiconductor structure on a germanium substrate; successively growing on the surface of the photosensitive multilayer structure a passivating layer and a contact layer, forming solid ohmic contacts on the rear and front surfaces of the photosensitive multilayer semiconductor structure. A contact grid is formed on the photocells by local chemical and ion-beam etching of the ohmic contact and the contact layer to open a portion of the underlying passivating layer and a multilayer antireflection coating is formed on the open portion of the passivating layer. Further, the multilayer structure is divided into chips and the lateral surface of the chips is passivated with a dielectric.

EFFECT: method reduces shading of the photosensitive surface of photocells and also simplifies the technology.

2 cl, 7 ex, 5 dwg

Description

The invention relates to solar energy, in particular to a method for manufacturing cascade multilayer photocell chips, and can be used in the electronics industry to convert light energy into electrical energy.

In the manufacture of cascade photocell chips, a significant challenge is the technology of creating a contact grid, which provides low resistance of ohmic contacts and a low degree of shadowing of the photosensitive surface of the semiconductor structure.

A known method of manufacturing chips of solar cells (see "Features of the technology for producing solar cells based on AlGaPAs / GaAs heterostructures using the GLC method", Blagin A, V., Blagina LV, Alfimova DL, Sysoev IA , Slutskaya OV, Proceedings of the Ninth International Scientific and Technical Conference "Actual Problems of Solid-State Electronics and Microelectronics", Divnomorskoye, Russia, 2004), based on AlGaPAs / GaAs heterostructures using gradient liquid-phase crystallization. As contact materials for the p-type layer, we used chromium-copper and nickel-copper alloys, the ohmic resistance of which does not exceed 0.23 Ohm / cm ² , for the n-type layer a combination of two metals - vanadium and aluminum, whose resistance is 0.105 Ohm / cm ² . The efficiency of the photoconverter based on the Al _0.33 Ga _0.67 P _0.05 As _0.95 / GaAs heterostructure, measured on a solar radiation simulator, was 21.5%.

The disadvantage of this method of manufacturing chips of solar cells is the high ohmic contact resistance, the complexity of manufacturing a semiconductor structure and low efficiency of the photoconverter.

A known method of manufacturing chips of cascade photocells (see patent RU 2244986, IPC H01L 31/18, published January 20, 2005), which consists in the fact that on the front side of a semiconductor wafer with the structure of n-Ge substrate, n-GaAs buffer layer, n- GaAs base layer, p-GaAs emitter layer, p ⁺ -GaAlAs wide-gap layer, p ⁺ -GaAs contact layer, a layer of silicon dioxide is deposited. A contact metallization layer is sprayed onto the rear of the plate and the back contact is increased by electrochemical deposition. A layer of silicon dioxide is etched in the windows above the contact areas. The contact metallization layers of chromium are sprayed sequentially and contacts are increased by electrochemical deposition of silver and a protective layer of nickel. The layer of silicon dioxide in the windows around the perimeter of the photoconverter is removed and the layers of gallium arsenide are etched to the germanium substrate. The silicon dioxide layer is removed, the p ⁺ -GaAs layer is etched off the contact areas and an antireflection coating is applied.

The disadvantage of this method of manufacturing chips of cascade photocells is the large loss of shading of the photosensitive surface of the photocells, which leads to a deterioration of the parameters of the photoconverter.

A known method of manufacturing chips of cascade photocells (see patent US 5330585, IPC H01L 31/068, published 07/19/1994), comprising the following stages: growing a photosensitive multilayer structure; creating a passivating layer or window from an environmentally sensitive material (AlGaAs) on the surface of a photosensitive multilayer structure; applying a contact layer of an environmentally insensitive material having electrical conductivity on the surface of the passivating layer;

removing part of the contact layer through the first mask to open part of the underlying passivating layer so that the remaining part of the contact layer remains on the surface of the passivating layer. Next, an antireflective coating is applied through the first mask from an environmentally insensitive, electrically non-conductive material on the open part of the passivating layer so that the remaining part of the contact layer is not covered by the antireflective coating, and so that the coating together with the remaining part of the contact layer completely covers the passivating layer. An ohmic contact is formed from a material having electrical conductivity on the surface of the remaining part of the contact layer, comprising the following steps. A second mask is created on the surface of the antireflection coating so that a gap remains between the mask and the remaining part of the contact layer. A layer of contact material is created on the surface of the mask, on the part of the antireflection coating and on the remaining part of the contact layer. Remove the mask and contact material lying on the mask.

A disadvantage of the known method of manufacturing chips of multilayer photocells is the presence of a leakage current of the pn junction along the side surface, the difficulty of combining when creating an ohmic contact strictly on a part of the remaining contact layer, which together leads to a deterioration of the parameters of the photoconverter.

The closest to the claimed technical solution for the totality of the essential features is the method of manufacturing cascade photocell chips adopted as a prototype (see patent RU 2292610, IPC H01L 31/18, published January 27, 2007). Cascade solar cells are made on the basis of a semiconductor wafer with an n-Ge substrate structure, an n-GaAs buffer layer, an n-GaAs base layer, a p-GaAs emitter layer, a p ⁺ -GaAlAs wide-gap layer, and a p ⁺ -GaAs contact layer. The method includes spraying a contact metallization layer on the back side of the wafer, building up a back contact by electrochemical deposition of silver, local spraying successively layers of contact metallization of chromium with a thickness of 200 ÷ 400 Å, palladium with a thickness of 200 ÷ 500 Å, silver with a thickness of 500 ÷ 1500 Å through a mask, contact building by electrochemical precipitation of silver through a second mask. Next, the layers of gallium arsenide are etched to the germanium substrate through a third photoresist mask with a pattern of windows along the perimeters of solar cells. Etch the p ⁺ -GaAs layer outside the contact regions and apply an antireflection coating.

The disadvantage of the known prototype method of manufacturing chips of cascade photocells is the loss of shading of the photosensitive surface of the photocells arising from the difficulty of accurately combining the process of electrochemical deposition of silver strictly on the sprayed layers of contact metallization, and a greater number of technological operations to create masks, which complicates the manufacturing technology cascading photocells and worsening of photocell parameters.

The objective of the proposed technical solution is to improve the parameters of cascade photocell chips due to the simplification of the technological cycle - carrying out several technological operations using a single photoresist mask, and by reducing the shading of the photosensitive surface of the photo cells by creating a modified contact grid.

The problem is achieved in that the method of manufacturing cascade photocell chips includes growing a photosensitive multilayer semiconductor structure on a germanium substrate, applying a passivating layer and a contact layer to the surface of the photosensitive multilayer structure, applying continuous ohmic contacts with a total thickness of 1.6-3.5 μm on the back and the front surface of the photosensitive multilayer semiconductor structure from a successively deposited layer of an alloy containing gold and rmanium, a layer of nickel and a layer of gold. The ohmic contact and contact layer are then removed through the photoresist mask from the front surface of the multilayer semiconductor structure to open part of the underlying passivating layer. New is the removal by chemical etching at a temperature of 19-23 ° C of a layer of gold in the etchant containing Na ₂ S ₂ O ₃ , CH ₄ N ₂ S, K ₃ [Fe (CN) ₆ ] and water in the following ratio of components, g / l:

Na ₂ S ₂ O ₃ 32-42 CH ₄ N ₂ S 32-42 K ₃ [Fe (CN) ₆ ] 32-42 water rest

ion-beam etching of a nickel layer, an alloy layer containing gold and germanium, and part of the contact layer at an accelerating voltage of 450-550 V, ion current density of 0.4-0.6 mA / cm ² , the angle of inclination of the ion beam 30-50 ° and rotation of the multilayer semiconductor structure with a speed of 1-3 rpm and chemical etching of the remaining part of the contact layer to a passivating layer at a temperature of 19-23 ° C in an etchant containing NH ₄ OH, H ₂ O ₂ and water in the following ratio of components, g / l:

NH ₄ OH 2-4 H ₂ O ₂ 6-8 water rest

A multilayer antireflection coating is applied from the front surface side, the photoresist is removed, the multilayer structure is divided into chips, and the passive surface of the chips is passivated by a dielectric.

The advantage of this method is the absence of the alignment process when conducting electrochemical thickening strictly on the basis of ohmic contact, which reduces the shading loss of the photosensitive region of the multilayer semiconductor structure. Local removal of the front ohmic contact is carried out by combining chemical and ion-beam etching, and allows to obtain narrow strips of ohmic contacts with a width of 2 μm or more, due to the effect of lateral etching under the photoresist mask during chemical etching.

The photosensitive multilayer GaInP / Ga (In) As / Ge semiconductor structure can be grown on a p-type germanium substrate.

The creation of a multilayer ohmic contact on the front surface of the structure is due to the fact that the alloy containing gold and germanium has good adhesion to the surface of the structure and low ohmic resistance of the order of 10 ^-6 Ohm / cm ² . The nickel layer is applied due to its refractoriness, which is necessary for the subsequent burning operation - nickel does not allow gold to completely diffuse into the semiconductor. A layer of gold is necessary to reduce the spreading resistance and to solder the photocells. The creation of ohmic contacts with a total thickness of 1.6-3.5 μm is due to the fact that with a thickness of less than 1.6 μm it is impossible to solder the solar cells, with a thickness of more than 3.5 μm, stressed layers arise, as a result of which peeling occurs. When creating an ohmic contact with a thickness of more than 3.5 μm, the technological process of chemical local etching of the upper layer of gold is complicated due to an increase in lateral etching.

The combination of the chemical and ion-beam etching methods is due to the possibility of obtaining narrow ohmic contact strips, complete etching of all layers, and strict selectivity when opening the passivating layer.

Using the method of chemical etching through a photoresist mask of the upper layer of gold at a temperature of 19-23 ° C in an etchant containing components in the following ratio, g / l: Na ₂ S ₂ O ₃ 32-42, CH ₄ N ₂ S 32-42, K ₃ [Fe (CN) ₆ ] 32-42, water - the rest, due to the fact that this method gives a high etching uniformity over the entire area of the semiconductor structure, provides a given value of lateral etching and allows obtaining ohmic contact strips with a width of 2 microns or more. At temperatures below 19 ° C and a concentration below the lower limits of the etchant components, etching is slower, which reduces the processability, etching uniformity over the entire area of the semiconductor structure is reduced. At temperatures above 23 ° C and concentrations above the above-mentioned components of the etchant, the etching rate increases, the reproducibility of the process deteriorates, and the resistance of the photoresist mask decreases.

The use of the ion-beam etching method is due to the fact that it allows uniform etching of layers with high chemical resistance: a nickel layer and a layer of annealed gold-germanium alloy. The etching of half the thickness of the contact layer is carried out in a control manner and makes it possible to avoid the non-etched sections of the gold-germanium burned glory. The accelerating voltage is 450-550 V, the ion current density is 0.4-0.6 mA / cm ² , the angle of inclination of the ion beam is 30-50 °, the rotation of the sample of a multilayer semiconductor structure with a speed of 1-3 rpm is due to the fact that the etching is uniformly over the entire surface of the semiconductor structure. A decrease in the accelerating voltage, ion current density, and sample rotation speed leads to a decrease in the etching rate and to a deterioration in the etching uniformity. With an increase in accelerating voltage, ion current density, and sample rotation speed, the reproducibility of the etching process deteriorates. Changing the angle of inclination of the ion beam leads to a deterioration in the quality of the etching surface.

Using the method of chemical etching through a photoresist mask of the contact layer selectively to a passivating layer at a temperature of 19-23 ° C in an etchant containing components in the following ratio, g / l: NH ₄ OH 2-4, N ₂ O ₂ 6-8, water - the rest is due to the fact that this method gives high reproducibility and accuracy of the etching process. When the temperature and concentration of the etchant is less than the lower limits indicated above, the etching rate greatly decreases, and the etching surface near the ohmic contact strips deteriorates. At a temperature and a concentration of the etchant components above the upper limits indicated above, the etching rate increases, the reproducibility of the process deteriorates, side etching under the ohmic contact strips increases, and the resistance of the photoresist mask decreases.

The claimed technical solution is illustrated by drawings, where:

figure 1 shows a diagram of a multilayer semiconductor structure with a passivating layer located on it, a contact layer and ohmic contacts;

figure 2 shows a scheme for creating a photoresist mask;

figure 3 shows a diagram of the local etching of the ohmic contact and the contact layer through a photoresist mask;

figure 4 shows the spraying pattern of the antireflective coating;

figure 5 is a diagram of the removal of the photoresist mask, conducting separation etching and passivation of the side surface of the chips by a dielectric.

Figure 1-5 shows: 1 - a photosensitive multilayer semiconductor structure, 2 - a passivating layer, 3 - a contact layer, 4 - an ohmic contact, 5 - the basis of ohmic contact, 6 - contact material of electrochemical deposition, 7 - photoresist mask, 8 - antireflection coating, 9 - dielectric.

The inventive method for producing chips of cascade photocells is carried out in several stages. A photosensitive multilayer semiconductor structure 1 is grown (see FIG. 1), a passivation layer 2 is created on the surface of the photosensitive multilayer semiconductor structure, a contact layer 3 having electrical conductivity on the window surface is created. Solid ohmic contacts 4 are created from materials having electrical conductivity on the surface of the contact layer and on the back surface of the photosensitive multilayer structure in two stages. At the first stage, the base 5 of the ohmic contact is deposited, 0.2-0.4 μm thick. Carry out the burning of the base 5 of the ohmic contact at a temperature of 360-370 ° C for 10-60 s. At the second stage, electrochemical deposition of the contact material 6, for example gold, with a total thickness of 1.6-3.5 microns, is carried out. Next, create a mask of photoresist 7 (see Fig. 2) and carry out local removal (see Fig. 3) of ohmic contact 4 and contact layer 3 to open part of the underlying passivating layer 2 by combining chemical and ion-beam etching methods. Local removal of the upper layer of gold of the ohmic contact 4 is carried out by chemical etching at a temperature of 19-23 ° C in the etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 32-42 CH ₄ N ₂ S 32-42 K ₃ [Fe (CN) ₆ ] 32-42 water rest

Then, local layers of nickel, a gold-germanium alloy and half the thickness of the contact layer 3 are removed by ion-beam etching with the following process parameters: accelerating voltage is 450-550 V, ion current density 0.4-0.6 mA / cm ² , the angle of inclination of the ion beam 30-50 °, the rotation of the multilayer semiconductor structure at a speed of 1 rpm A local removal of the remaining thickness of the contact layer 3 is carried out by chemical etching selectively to a passivating layer at a temperature of 19-23 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH 2-4 H ₂ O ₂ 6-8 water rest

Next, a multilayer antireflection coating 8 (see FIG. 4) is sprayed on the above open part of the passivating layer 2 and on the photoresist mask 7. The photoresist mask 7 (see FIG. 5) is removed along with the antireflection coating 8. The separation etching is performed on the multilayer structures on chips and passivation of the side surface of chips by dielectric 9.

Example 1

Chips of cascade photocells in several stages were obtained. A photosensitive multilayer Ga (In) As / Ge semiconductor structure was grown on a p-type germanium substrate. An AlInP passivation layer was created on the surface of the photosensitive multilayer semiconductor structure. The GaAs contact layer is grown. In two stages, ohmic contacts are formed from materials having electrical conductivity on the surface of the contact layer and on the back surface of the photosensitive multilayer semiconductor structure. On the front surface, a series of layers of an alloy containing 90% by weight of gold and 10% by weight of germanium, 0.2 μm of nickel and gold, was deposited. On the back surface of the solar cell, layers of an alloy containing silver of 95 wt.% And manganese of 5 wt.%, Nickel and gold, 0.4 μm thick, were sprayed. The sprayed contact materials were incinerated at a temperature of 360 ° C for 20 s. A thickening of the ohmic contacts was carried out by electrochemical deposition of a gold layer 3.3 microns thick. A photoresist mask was created on the front surface of the structure and local removal of the upper gold layer of the ohmic contact was carried out by chemical etching at a temperature of 19 ° C in an etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 32 CH ₄ N ₂ S 32 K ₃ [Fe (CN) ₆ ] 32 water rest

Local removal of nickel layers, a gold-germanium alloy, and half the thickness of the contact layer was carried out by ion beam etching with the following process parameters: accelerating voltage of 450 V, ion current density of 0.4 mA / cm ² , the angle of inclination of the ion beam 30 °, rotation a multilayer semiconductor structure at a speed of 2 rpm The remaining thickness of the contact layer was removed locally by chemical etching selectively to a passivating layer at a temperature of 19 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH 2 H ₂ O ₂ 6 water rest

Separated etching of the multilayer structure on chips was carried out and passivation of the side surface of the chips by dielectric was carried out,

Example 2

Chips of cascade photocells were manufactured by the method described in example 1, with the following differences: the thickness of the ohmic contact deposited on the front surface of the structure was 0.3 μm, the ohmic contacts were burned at a temperature of 360 ° C for 60 s, the thickness of the ohmic contact after electrochemical gold layer deposition was 1.6 μm. Local removal of the upper layer of gold of the ohmic contact was carried out by chemical etching at a temperature of 23 ° C in an etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 34 CH ₄ N ₂ S 34 K ₃ [Fe (CN) ₆ ] 34 water rest

Local removal of nickel layers, a gold-germanium alloy, and half the thickness of the contact layer by ion beam etching was carried out with the following process parameters: accelerating voltage of 500 V, ion current density of 0.5 mA / cm ² , the angle of inclination of the ion beam 50 °, rotation a multilayer semiconductor structure at a speed of 3 rpm Local removal of the remaining thickness of the contact layer was carried out by chemical etching selectively to a passivating layer at a temperature of 23 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH 3 H ₂ O ₂ 7 water rest

Example 3

Chips of cascade photocells were made by the method described in example 1, with the following differences: the thickness of the ohmic contact deposited on the front surface of the structure was 0.4 μm, the ohmic contacts were burned at a temperature of 370 ° C for 60 s, the thickness of the ohmic contact after electrochemical gold layer deposition was 2.5 μm. Local removal of the upper layer of gold of the ohmic contact was carried out by chemical etching at a temperature of 22 ° C in an etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 42 CH ₄ N ₂ S 42 K ₃ [Fe (CN) ₆ ] 42 water rest

Local removal of nickel layers, a gold-germanium alloy, and half the thickness of the contact layer was carried out by ion beam etching with the following process parameters: accelerating voltage is 550 V, ion current density 0.6 mA / cm ² , the angle of inclination of the ion beam 40 °, rotation multilayer semiconductor structure at a speed of 1 rpm Local removal of the remaining thickness of the contact layer was carried out by chemical etching selectively to a passivating layer at a temperature of 22 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH four H ₂ O ₂ 8 water rest

Example 4

Chips of cascade photocells were manufactured by the method described in example 1, with the following distinctive features: the thickness of the ohmic contact deposited on the front surface of the structure was 0.25 μm, the ohmic contacts were burned at a temperature of 370 ° С for 10 s, the thickness of the ohmic contact after The electrochemical deposition of a gold layer was 1.9 μm. Local removal of the upper layer of gold of the ohmic contact was carried out by chemical etching at a temperature of 20 ° C in an etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 37 CH ₄ N ₂ S 37 K ₃ [Fe (CN) ₆ ] 37 water rest

Local removal of nickel layers, a gold-germanium alloy, and half the thickness of the contact layer was carried out by ion beam etching with the following process parameters: accelerating voltage of 520 V, ion current density of 0.55 mA / cm ² , the angle of inclination of the ion beam 35 °, rotation a multilayer semiconductor structure at a speed of 2 rpm Local removal of the remaining thickness of the contact layer was carried out by chemical etching selectively to a passivating layer at a temperature of 20 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH 3,5 H ₂ O ₂ 7.5 water rest

Example 5

Chips of cascade photocells were manufactured by the method described in example 1, with the following differences: the thickness of the ohmic contact deposited on the front surface of the structure was 0.32 μm, the ohmic contacts were burned at a temperature of 360 ° C for 40 s, the thickness of the ohmic contact after electrochemical gold layer deposition was 3.0 μm. Local removal of the upper layer of gold of the ohmic contact was carried out by chemical etching at a temperature of 21 ° C in an etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 39 CH ₄ N ₂ S 39 K ₃ [Fe (CN) ₆ ] 39 water rest

Local removal of nickel layers, a gold-germanium alloy, and half the thickness of the contact layer was carried out by ion beam etching with the following process parameters: accelerating voltage of 490 V, ion current density of 0.47 mA / cm ² , the angle of inclination of the ion beam 45 °, rotation a multilayer semiconductor structure at a speed of 2 rpm Local removal of the remaining thickness of the contact layer was carried out by chemical etching selectively to a passivating layer at a temperature of 21 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH 2,5 H ₂ O ₂ 6.5 water rest

Example 6

Chips of cascade photocells were made by the method described in example 1, with the following distinctive features: the thickness of the ohmic contact deposited on the front surface of the structure was 0.27 μm, the ohmic contacts were burned at a temperature of 370 ° С for 30 s, the thickness of the ohmic contact after The electrochemical deposition of a gold layer was 3.1 μm. Local removal of the upper layer of gold of the ohmic contact was carried out by chemical etching at a temperature of 21 ° C in the etchant containing the components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 40 CH ₄ N ₂ S 40 K ₃ [Fe (CN) ₆ ] 40 water rest

Local removal of nickel layers, a gold-germanium alloy, and half the thickness of the contact layer was carried out by ion beam etching with the following process parameters: accelerating voltage of 530 V, ion current density of 0.57 mA / cm ² , the angle of inclination of the ion beam 38 °, rotation a multilayer semiconductor structure at a speed of 3 rpm Local removal of the remaining thickness of the contact layer was carried out by chemical etching selectively to a passivating layer at a temperature of 21 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH 2,3 H ₂ O ₂ 6.7 water rest

Example 7

Chips of cascade photocells were made by the method described in example 1 with the following differences: the thickness of the ohmic contact deposited on the front surface of the structure was 0.22 μm, the ohmic contacts were burned at a temperature of 365 ° C for 60 s, the thickness of the ohmic contact after electrochemical gold layer deposition was 2.6 μm. Local removal of the upper layer of gold of the ohmic contact was carried out by chemical etching at a temperature of 23 ° C in an etchant containing components in the following ratio, g / l:

Na ₂ S ₂ O ₃ 35 CH ₄ N ₂ S 35 K ₃ [Fe (CN) ₆ ] 35 water rest

Local removal of nickel layers, a gold-germanium alloy and half the thickness of the contact layer by ion beam etching was carried out with the following process parameters: accelerating voltage of 500 V, ion current density of 0.5 mA / cm ² , the angle of inclination of the ion beam 30 °, rotation a multilayer semiconductor structure at a speed of 2 rpm Local removal of the remaining thickness of the contact layer was carried out by chemical etching selectively to a passivating layer at a temperature of 23 ° C in an etchant containing components in the following ratio, g / l:

NH ₄ OH four H ₂ O ₂ 8 water rest

The result of the manufacturing process of cascade photocell chips was the improvement of the photoconverter parameters by creating a modified contact grid with an ohmic contact strip width of 2 μm and by reducing the degree of shadowing of the photosensitive surface of the multilayer semiconductor structure to 5%, which leads to obtaining the maximum conversion efficiency of solar energy into electrical energy .

Claims (2)

A method of manufacturing cascade photocell chips, including growing a photosensitive multilayer semiconductor structure on a germanium substrate, applying a passivating layer and a contact layer to the surface of the photosensitive multilayer structure, applying ohmic contacts with a total thickness of 1.6-3.5 microns on the back and front surfaces of the photosensitive multilayer semiconductor structures from successively deposited alloy layer containing gold and germanium, a nickel layer and a gold layer, removing of photoresist through a mask with the front surface of the semiconductor multilayer structure and the ohmic contact layer for contact opening portion of the underlying passivation layer by chemical etching at a temperature of 19-23 ° C a layer of gold etchant containing Na ₂ S ₂ O _3, CH ₄ N ₂ S, K ₃ [Fe (CN) ₆ ] and water in the following ratio of components, g / l:
Na ₂ S ₂ O ₃ 32-42 CH ₄ N ₂ S 32-42 K ₃ [Fe (CN) ₆ ] 32-42 water rest,
ion-beam etching of a nickel layer, an alloy layer containing gold and germanium, and part of the contact layer at an accelerating voltage of 450-550 V, ion current density of 0.4-0.6 mA / cm ² , the angle of inclination of the ion beam 30-50 ° and rotation of the multilayer semiconductor structure with a speed of 1-3 rpm and chemical etching of the remaining part of the contact layer to a passivating layer at a temperature of 19-23 ° C in an etchant containing NH ₄ OH, H ₂ O ₂ and water in the following ratio of components, g / l:
NH ₄ OH 2-4 H ₂ O ₂ 6-8 water rest,
applying a multilayer antireflection coating on the front surface side, removing the photoresist, separating the multilayer structure into chips and passivating the chip side surface with a dielectric. 2. The method according to claim 1, characterized in that the photosensitive multilayer semiconductor structure in the form of GaInP / Ga (In) As / Ge is grown on a p-type germanium substrate.

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