JPS59111314U - Lumped electromagnetic delay line - Google Patents
Lumped electromagnetic delay lineInfo
- Publication number
- JPS59111314U JPS59111314U JP385083U JP385083U JPS59111314U JP S59111314 U JPS59111314 U JP S59111314U JP 385083 U JP385083 U JP 385083U JP 385083 U JP385083 U JP 385083U JP S59111314 U JPS59111314 U JP S59111314U
- Authority
- JP
- Japan
- Prior art keywords
- bobbin
- delay line
- electromagnetic delay
- lumped constant
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Coils Or Transformers For Communication (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図および第2図は本考案の集中定数型電磁遅延線の
一実施例を示す斜視図およq横断面図、第3−および第
4図は第1図に示すコンデンサを示す正面図および側面
図、第5図は第1図に示す集中定数型電磁遅延線の概略
等価回路図、第6図は本考案の他の実施例を示す横断面
図である。
1・・・ボビン、2.3・・・主面、4.18・・・コ
ンデンサ収納部、5.23・・・コンデンサ、6. 7
゜21・・・誘電体板、8・・・アース電極、9,10
゜22・・・電極、12. 14. 20’・・・導体
条、13゜15・・・接着層、17・・・基板。1 and 2 are a perspective view and a q-cross sectional view showing an embodiment of the lumped constant electromagnetic delay line of the present invention, and FIGS. 3 and 4 are front views showing the capacitor shown in FIG. 1. 5 is a schematic equivalent circuit diagram of the lumped constant electromagnetic delay line shown in FIG. 1, and FIG. 6 is a cross-sectional view showing another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Bobbin, 2.3...Main surface, 4.18...Capacitor storage part, 5.23...Capacitor, 6. 7
゜21...Dielectric plate, 8...Earth electrode, 9,10
゜22...electrode, 12. 14. 20'...Conductor strip, 13°15...Adhesive layer, 17...Substrate.
Claims (5)
てインダクタンス素子を構成し、このインダクタンス素
子の載置される基板もしくは前記ボビンに前記コイルの
巻軸方向に延びるコンデンサ収納部を形成し、−このコ
ンデンサ収納部にコンデンサを収納するとともにこの収
納され″たコンデンサの電極と前記コイルを接続してな
ることを特徴とする集中定数型電磁遅延線。(1) forming an inductance element by forming a single-layer solenoid-like coil on a flat bobbin, and forming a capacitor storage portion extending in the direction of the winding axis of the coil on the substrate on which the inductance element is mounted or on the bobbin; - A lumped constant electromagnetic delay line, characterized in that a capacitor is housed in the capacitor housing, and the electrodes of the housed capacitor are connected to the coil.
形成してなることを特徴とする実用新案登録請求の
範囲第1項記載の集中定数型電磁遅延線。(2) A capacitor has electrodes facing a flat dielectric plate.
A lumped constant electromagnetic delay line according to claim 1 of the utility model registration claim, characterized in that the lumped constant electromagnetic delay line is formed by:
れた複数の並行な導体条と、前記−主面に対向する他方
の主面に前記ボビンの両端から突出して複数並行に接着
された導体条であって、前記ボビンから突出する両端部
を折曲して前記−主面上の各導体条の両端部に接続され
た導体条とからなることを特徴とする実用新案登録請求
の範囲第、1項もしくは第2項記載の集中定数型電磁遅
延線。(3) The inductance element includes a plurality of parallel conductor strips provided on one surface of the bobbin, and a plurality of parallel conductor strips protruding from both ends of the bobbin and bonded to the other main surface opposite to the main surface. Claim No. 1, characterized in that the conductor strip is connected to both ends of each conductor strip on the main surface by bending both ends protruding from the bobbin. The lumped constant electromagnetic delay line according to item 1 or 2.
接着されてなることを特徴とする実用新案登録請求の範
囲第3項記載の集中定数型電磁遅延線。(4) The lumped constant electromagnetic delay line according to claim 3, wherein the conductor strip provided on the entire surface of the bobbin is bonded to the bobbin.
成されるとともに前記ボビンの他方の主面゛から折曲さ
れた導体条の両端部と前記基板上で接続されてなること
を特徴とする実用新案登録請求の範囲第3項記載の集中
定数型電磁遅延線。(5) The conductor strip provided on the whole surface of the bobbin is formed on the substrate and connected to both ends of the conductor strip bent from the other main surface of the bobbin on the substrate. A lumped constant electromagnetic delay line according to claim 3 of the patented utility model.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP385083U JPS59111314U (en) | 1983-01-14 | 1983-01-14 | Lumped electromagnetic delay line |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP385083U JPS59111314U (en) | 1983-01-14 | 1983-01-14 | Lumped electromagnetic delay line |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59111314U true JPS59111314U (en) | 1984-07-27 |
Family
ID=30135463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP385083U Pending JPS59111314U (en) | 1983-01-14 | 1983-01-14 | Lumped electromagnetic delay line |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59111314U (en) |
-
1983
- 1983-01-14 JP JP385083U patent/JPS59111314U/en active Pending
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