JPS59105121A - Electronic apparatus - Google Patents
Electronic apparatusInfo
- Publication number
- JPS59105121A JPS59105121A JP57215897A JP21589782A JPS59105121A JP S59105121 A JPS59105121 A JP S59105121A JP 57215897 A JP57215897 A JP 57215897A JP 21589782 A JP21589782 A JP 21589782A JP S59105121 A JPS59105121 A JP S59105121A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- inclination
- converted
- power
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Direct Current Feeding And Distribution (AREA)
- Power Sources (AREA)
Abstract
Description
【発明の詳細な説明】 技術分野 本発明はCPUにより制御される電子機器に関する。[Detailed description of the invention] Technical field The present invention relates to electronic equipment controlled by a CPU.
従来技術
従来、CPUを有する電子機器において電源の異常状態
の発生に対する処理については、電源電圧検出回路を用
い、CPUK働きかけて、前記処理を行なっていた。こ
の場合、異常判定のための基準電圧を超えた瞬間に処理
信号が出力されるので、CPUの処理の時間的余裕がな
く又、時間的な余裕を作る為に、前記基準電圧を変化さ
せるとノイズ等により誤動作が起きる恐れがあり、例え
ば、産業ロボット等、知能ロボット等とにおいては、重
大な事故につながる危険がある。BACKGROUND ART Conventionally, in an electronic device having a CPU, processing for the occurrence of an abnormal state of a power supply has been carried out by using a power supply voltage detection circuit and acting on the CPUK. In this case, the processed signal is output the instant the reference voltage for abnormality determination is exceeded, so there is no time for the CPU to process it, and in order to create time, it is necessary to change the reference voltage. Malfunctions may occur due to noise and the like, and for example, in industrial robots, intelligent robots, etc., there is a risk of leading to a serious accident.
従来の電子機器における電源電圧の異常状態を検出する
様子を第1図に示す。つまシ第1図は、従来の検出方法
による電源電圧の降下と電源断検出信号SOの関係を示
した図である。検出回路は)従来からよ(知られている
ので、ここでは、説明を省略する。VSHは、閾値で、
TOで電源断になった時に電源電圧Vは24Vから徐々
に下J)TIで閾値V8Hに達した時、初めて電源断検
出信号S〜数1Q() m5ecかかるのが普通である
。このT1までは、冑、源断検出信号SOが、出力され
ないので、プロセス制御手段はプログラムを進めてしま
うが止
紙してはいけない紙を給紙したシすぐ也めなければいけ
ない現像を行ったり複写機にとって都合の悪い事がおき
てしまうケースがある。FIG. 1 shows how an abnormal state of power supply voltage is detected in a conventional electronic device. FIG. 1 is a diagram showing the relationship between a drop in power supply voltage and a power-off detection signal SO according to a conventional detection method. Since the detection circuit (detection circuit) is conventionally known, its explanation will be omitted here.VSH is a threshold value;
When the power is turned off at TO, the power supply voltage V gradually drops from 24V to the threshold V8H at TI, and it is normal that the power-off detection signal S~1Q() m5ec is required for the first time. Until this T1, the power cutoff detection signal SO is not output, so the process control means advances the program, but when the paper that should not be stopped is fed, the development that must be done is performed immediately. There are cases where something bad happens to the copier.
目的
本発明は以上の点に鑑み、電源電圧の異常状態に対する
処理を間違いなく、確実に、速やかに行なう為に電源電
圧の状態を精度良(、又ノイズ等で誤動作が起こらない
様に検出する構成の電子機器を提供することにある。Purpose In view of the above points, the present invention detects the state of the power supply voltage with high accuracy (and prevents malfunctions due to noise etc. Our goal is to provide electronic equipment with the following configurations.
実施例
本発明の実施例の構成を第2図に示す。電源1は負荷用
の例えば24Vの電源で負荷乙に接読されており、駆動
回路4により駆動される。6は電子機器例えば複写機の
プロセス制御卸手段(CPU)で、駆動回路4はCPU
6からの信号に従って駆動される。CPU6の電源は、
例えは5■の電源2である。負荷用の電源1は、更に抵
抗R1,R2により分圧されCPU6のA/D入カフに
接続されている。一方、A/D変換の基準電圧VREF
は抵抗R3,抵抗R4により作られ、基準電圧入力8に
入力される。負荷用の電源1が、何らかの事情で、電圧
異常が発生した場合、例えば電源断となる場合の本発明
のA/D変換を用いた電源電圧を第6図に示す。TOに
おいて電源が断になった時から電圧は徐々に下って(る
が第2図のCPU6はこの電圧のA/D変換データーを
いつも参照しているから、TO以降いつでも電源の状態
がわかる。従ってTルまで待たな(でも電源断の状態が
判別できるわけである。又、通常CPUの処理時間は、
1つの命令を実行するのに要する時間はμSというオー
ダーなので先に述べた電源の時定数等はCPUに比較す
れば十分すぎる程長い。従って1゛0以降非常に多(の
回数A/D変換されたデーターを参照できるわけである
。従って rllrLまで待たなくても、電圧の傾斜だ
けでも、電源断と判断してもよい。電源電圧の傾きによ
って電源断と判断する割込みの1つであるA/D変換処
理ルーテンのフローチャートを第4図に示す。CP ’
U 6で、人/D人カフからのデータは、A/D変換さ
れる(ステップ(1))。次に、A/D変換の基準電圧
VREF’(本実施例では24■)と、A/D変換デー
タとの比較を行なう(ステップ(2) 、 (3) )
。ステップ(2)で、データ値とVREFが等しければ
、複写機本体のプロセス制御をするメインプログラムに
戻る。このメインプログラムは、従来からよく知られて
いるので、ここでは説明を省略する。本実施例は、電源
;電圧の降下の場合の実施例であるので、データ値が、
VREFよシ大きげれば、複写機本体のプロセスif?
IJ御をするメインプログラムに戻る7、(ステップ(
6))。データ値が、VRgF’よシ小さい場合は、タ
イマをスタートさせ、タイムアツプするごとに、A/D
変換された値をDiとして(ステップ(4) 、 (5
) ) 、その時の傾きを計算し、その時の電源断時に
おける時定数等により決まっている傾きKiと比較する
(ステップ(6))。もしDi−Di−1−に1ならば
、電源断時の傾きではないので、複、4機本体のプロセ
ス制御をするメインプログラムに戻る。もし、Di−D
i−1−Kiならば、第6図に示すVSHの値となる時
間Tnまで(ステップ(力)、傾きを順次計算する。そ
して、計算した傾きをKi(i−i〜n)とが等しけれ
手°]
ば、電源断と判断し、割込みの1つである電源断ルーチ
ンに進む(ステップ(7))。Embodiment FIG. 2 shows the configuration of an embodiment of the present invention. A power supply 1 is a 24V power supply for a load, for example, and is connected to a load B, and is driven by a drive circuit 4. 6 is a process control unit (CPU) of an electronic device such as a copying machine, and the drive circuit 4 is a CPU.
It is driven according to the signal from 6. The power supply of CPU6 is
An example is power supply 2 of 5■. The load power supply 1 is further voltage-divided by resistors R1 and R2 and connected to the A/D input cuff of the CPU 6. On the other hand, the reference voltage VREF for A/D conversion
is created by resistor R3 and resistor R4, and is input to reference voltage input 8. FIG. 6 shows the power supply voltage using the A/D conversion of the present invention when a voltage abnormality occurs in the load power supply 1 for some reason, for example, when the power is cut off. After the power is turned off at TO, the voltage gradually decreases (although the CPU 6 in FIG. 2 always refers to the A/D conversion data of this voltage, so the state of the power supply can be known at any time after TO. Therefore, do not wait until the power is turned off (but it is possible to determine the power-off status.Also, the processing time of the CPU is usually
Since the time required to execute one instruction is on the order of μS, the time constant of the power supply mentioned above is sufficiently long compared to that of a CPU. Therefore, it is possible to refer to the data that has been A/D converted a very large number of times after 1゛0.Therefore, it is possible to determine that the power has been cut off just by the slope of the voltage, without having to wait until rllrL.Power supply voltage Figure 4 shows a flowchart of the A/D conversion processing routine, which is one of the interrupts that determines a power outage based on the slope of CP'.
At U6, the data from the person/D person cuff is A/D converted (step (1)). Next, the reference voltage VREF' for A/D conversion (24 in this embodiment) is compared with the A/D conversion data (steps (2) and (3)).
. In step (2), if the data value and VREF are equal, the process returns to the main program that controls the process of the copying machine main body. Since this main program is well known, its explanation will be omitted here. This example is an example in the case of power supply; voltage drop, so the data value is
If you make it bigger than VREF, what is the process of the copier itself?
Return to the main program for IJ control 7. (Step (
6)). If the data value is smaller than VRgF', start the timer and use the A/D
The converted value is set as Di (step (4), (5
)), calculate the slope at that time, and compare it with the slope Ki determined by the time constant etc. at the time of power-off at that time (step (6)). If Di-Di-1- is 1, the slope is not the same as when the power was turned off, and the process returns to the main program that controls the processes of the main bodies of multiple machines. If Di-D
If i-1-Ki, calculate the step (force) and slope sequentially until the time Tn at which the value of VSH shown in Fig. 6 is reached.Then, if the calculated slope is equal to Ki (i-i~n), then If so, it is determined that the power is turned off, and the process proceeds to a power-off routine, which is one of the interrupts (step (7)).
第5図に、電源断ルーチンのフローチャートを示す。前
記第4図のA/D変換処理ルーチンにおいて、第2図の
負荷用の電源1の電圧が第6図の、V S )1に達す
るまでに電源断であ゛ると判断されたので、この電源断
ルーチンでは、電源1の電圧が、VSHに達するまでに
必要なデータを退避させるのである。まず、倍率、設定
枚数、コピー濃度。FIG. 5 shows a flowchart of the power-off routine. In the A/D conversion processing routine shown in FIG. 4, it was determined that the power supply would be cut off before the voltage of the load power supply 1 shown in FIG. 2 reached V S )1 shown in FIG. In this power-off routine, necessary data is saved until the voltage of the power supply 1 reaches VSH. First, the magnification, number of copies, and copy density.
カセット、ソーティング等の動作モードを退避させるの
である(ステップ(1))。次に、コピー実行中、ジャ
ム状態、給紙枚数、排紙枚数等のステータス信号の退避
を行なう(ステップ(2))。次に、し
アギュムータ内のデータや種々のレジスタのデーりを退
避させる(ステップ(6))。そしてメイングログラム
に戻る。Operation modes such as cassette and sorting are saved (step (1)). Next, during copy execution, status signals such as jam status, number of sheets fed, number of sheets ejected, etc. are saved (step (2)). Next, the data in the agitator and the data in various registers are saved (step (6)). Then return to the main program.
第2図の負荷用の電源1の電圧が、再び、復帰し、第6
図のように閾値V8HからさらにVREFの値まで達す
る場合を第4図、第5図、第6図を参照し説明する。前
述と同様にA/D変換にょシ、変換されたデータ値が閾
値VSHよシ大きくなるとタイマをスタートさせ、タイ
ムアツプするごとに、A/D変換された値をDi(i−
n−1)として、その時の傾きを計算し、電圧復帰の時
定数で決っている傾きKi(i−ル〜l)と比較し、D
i−Kiであれば、電源復帰を判断し、電源復帰ルーチ
ンに県
進む。そして、待避していた種々のデータを復帰させた
後、メインプログラムに戻シ、通常のプロセス制御を行
々5゜
効果
以上、詳述したように、本発明によれば、電源電圧の異
常状態を精度良(、確実に検知でき、又、最近はA/D
変換器を内蔵した安価な1チツグCPUが普及している
ので、非常に小型で、精度の良い電子機器を提供するこ
とができる。The voltage of the power supply 1 for the load in Fig. 2 is restored again, and the voltage of the power supply 1 for the load in Fig.
The case where the threshold value V8H further reaches the value of VREF as shown in the figure will be explained with reference to FIGS. 4, 5, and 6. Similarly to the above, when the A/D conversion is performed and the converted data value becomes larger than the threshold value VSH, the timer is started, and each time the time elapses, the A/D converted value is converted to Di(i-
n-1), calculate the slope at that time, compare it with the slope Ki (i-r ~ l) determined by the time constant of voltage recovery, and calculate D
If it is i-Ki, it is determined whether the power should be restored and the process proceeds to the power restoration routine. After restoring the various data that had been saved, the program is returned to the main program and normal process control is performed. can be detected accurately (and reliably detected, and recently A/D
Since inexpensive single-chip CPUs with built-in converters have become widespread, it is possible to provide electronic devices that are extremely small and highly accurate.
第1図は、従来の検出方法による電源電圧の降町
下と電源検出信号SOの関係を示す図である。
ム
第2図は、本発明の1実施例の構成を示す図である。
第6図は、本発明によるA/D変換を用いた電源電圧降
下の検知の様子を示す図である。
第4図は、本発明の1実施例による、んΦ変換処理ルー
チンのフローチャートである。
第5図は、電源断ルーチンのフローチャートである。
第6図は、電源電圧の復帰の様子を示した図である。
1は゛負荷用の電源 2は鋳し用の電源4は能動回路
6は負荷 6はCI)L)出願人 キャノン株式会社FIG. 1 is a diagram showing the relationship between the drop in power supply voltage and the power supply detection signal SO according to a conventional detection method. FIG. 2 is a diagram showing the configuration of one embodiment of the present invention. FIG. 6 is a diagram showing how a power supply voltage drop is detected using A/D conversion according to the present invention. FIG. 4 is a flowchart of a Φ conversion processing routine according to one embodiment of the present invention. FIG. 5 is a flowchart of the power-off routine. FIG. 6 is a diagram showing how the power supply voltage is restored. 1 is the power supply for the load 2 is the power supply for casting 4 is the active circuit
6 is load 6 is CI) L) Applicant Canon Co., Ltd.
Claims (1)
用いて、その変換出力によシ、電源状態を検知し、前記
電子機器の誤動作を防止するよう構成したことを特徴と
する電子機器。1. An electronic device having a CPU, characterized in that the electronic device is configured to use an A/1) conversion means to detect a power state based on the conversion output thereof, and to prevent malfunctions of the electronic device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57215897A JPS59105121A (en) | 1982-12-08 | 1982-12-08 | Electronic apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57215897A JPS59105121A (en) | 1982-12-08 | 1982-12-08 | Electronic apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59105121A true JPS59105121A (en) | 1984-06-18 |
Family
ID=16680061
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57215897A Pending JPS59105121A (en) | 1982-12-08 | 1982-12-08 | Electronic apparatus |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59105121A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS643673A (en) * | 1987-06-26 | 1989-01-09 | Canon Kk | Picture recorder |
-
1982
- 1982-12-08 JP JP57215897A patent/JPS59105121A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS643673A (en) * | 1987-06-26 | 1989-01-09 | Canon Kk | Picture recorder |
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