JPS59101863A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the deterioration of electric characteristics due to the micro defect of a semiconductor substrate by a method wherein the impurity concentration of the semiconductor substrate to form an epitaxial layer is thickened much more than the oxygen concentration of the semiconductor substrate. CONSTITUTION:A memory cell is equipped with the epitaxial layer 2 formed on the semiconductor substrate 1, a field oxide film 3, a diffused layer (digit line) 4, a poly Si gate electrode 5 serving as a transfer gate to write or read an electric signal, a poly Si electrode 6 serving as a capacitor part to accumulate the amount of charges of the electric signal, and an interlayer insulator 7. First, the P type epitaxial layer 2 is formed on the semiconductor substrate 1 made of P type Si, and next the dynamic type MOS memory using a poly Si composed of a double layer is prepared by using RIE technique or ion implantation technique, etc., according to the manufacturing process for a normal N-channel Si gate type MOSIC. This memory cell is a generally used transistor type dynamic MOS memory cell.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and more particularly to impurity concentration of an epitaxial layer and formation of an epitaxial layer of a semiconductor device in which a metal oxide semiconductor (MOS) type semiconductor element is formed on an epitaxial layer. This relates to the impurity concentration of the semiconductor substrate.

In recent years, there has been a demand for higher density and higher integration of semiconductor devices, and in order to achieve this, it has become necessary to form fine patterns. As these patterns become finer, minute crystal defects in semiconductor substrates, which have not been regarded as a problem in the past, have come to have a significant impact on the characteristics of semiconductor devices.

Particularly in dynamic MOS memories, as the degree of integration increases, finer patterns are required, and the pattern design standard is also becoming ultra-fine, around 1μ.

Along with this, the amount of charge used as a signal in a dynamic MOS memory also becomes minute. Therefore, the small amount of charge used as a signal in this dynamic MOS memory is easily erased by minute crystal defects in the semiconductor substrate, which causes a malfunction of the dynamic MOS memory, resulting in a decrease in manufacturing yield and This appears as a deterioration of the hold characteristics. p1 Microscopic crystal defects in semiconductor substrates, which conventionally did not affect the electrical characteristics such as memory lead characteristics, are now changing due to the miniaturization of the signal amount due to ultra-fine patterns, which has caused an impact on the electrical characteristics of semiconductor devices. has an important influence on

Conventional techniques for reducing or suppressing the occurrence of crystal defects in semiconductor substrates include a ring getter method, a method for applying strain to the back surface of the semiconductor substrate, and an intrinsic getter treatment method. It was possible to reduce the hold failure rate of some conventional dynamic MOS memories to a few chips or less, but in dynamic MOS memory using ultra-fine patterns, the hold failure rate is around 30 to 50%, which accounts for most of the failures. This significantly reduces manufacturing yield. In semiconductor devices using ultra-fine patterns, ring getter methods and methods that apply strain to the back side of the semiconductor substrate have no effect on suppressing the generation of microcrystal defects and improving electrical characteristics. Also, in the intrinsic getter processing method,
The getter effect was influenced by the heat treatment process after the indling getter treatment, resulting in large variations and poor reproducibility.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device in which the above-mentioned problems are solved and deterioration of electrical characteristics due to micro defects in a semiconductor substrate is improved.

The present invention provides a semiconductor device in which a MOS type semiconductor element is formed on an epitaxial layer, wherein the impurity concentration of the semiconductor substrate for forming the epitaxial layer tube is higher than the oxygen concentration of the semiconductor substrate. It's in the device.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a cross-sectional view showing a process in the middle of manufacturing a memory cell according to an embodiment of the present invention. In the figure, this memory cell is
An epitaxial layer 2 formed on a semiconductor substrate 1, a field oxide film 3, a diffusion layer (digit line) 4,
It includes a polysilicon gate electrode 5 that serves as a transfer gate for writing and reading electric signals, a polysilicon electrode 6 that serves as a capacitor for storing the electric signal charge, and a glabella insulator 7. . First, on a semiconductor substrate made of P-type silicon, about 10μ of P-type
An epitaxial layer 2 with a concentration of 10'' (Co/CC) is formed, and then RIE (reactive ion etching) technology, ion implantation technology, etc. are applied according to the normal N-channel silicon gate type MOS IC manufacturing process. We used this to create a dynamic MO8 memory using two layers of polycrystalline silicon.This memory cell is a commonly used one-transistor type dynamic MO8 memory cell.
S memory cell.

FIG. 2 is a characteristic diagram of the boron concentration of the silicon substrate versus the hold failure rate for explaining the effects of the embodiment of the present invention. As is clear from trend line 9 in the same figure, by increasing the boron concentration of the silicon semiconductor substrate to a higher oxygen concentration (arrow 8 in the figure), the hold failures are drastically reduced. I understand that. Each circle in FIG. 2 indicates the characteristics of one sample.

This phenomenon was confirmed by observing the occurrence and condition of internal defects by using a normal etching method on a cross section of a semiconductor substrate using the interstices of the silicon substrate, and it was found that no micro defects were observed in the epitaxial layer 2. Micro-defects were uniformly generated on semiconductor substrates where the boron concentration was higher than the oxygen concentration, while micro-defects were hardly observed on semiconductor substrates where the boron concentration was lower than the oxygen concentration. Figure 3(a).

This situation is shown in Figure 3 (bl).

In these figures, l indicates a silicon substrate and 2 indicates an epitaxial layer. Figure 3(a) shows the occurrence of internal defects in a silicon substrate where the boron concentration is lower than the oxygen concentration, and Figure 3(b) shows the occurrence of internal defects in a silicon substrate where the boron concentration is higher than the oxygen concentration. Indicates the condition. In FIG. 3(b), it can be seen that more defects occur than in the case of FIG. 3(a). The reason why microdefects occur differently depending on changes in the boron concentration in the semiconductor substrate is that when the boron concentration in the silicon substrate becomes higher than the oxygen concentration, boron impurities act to multiply oxygen precipitation. This is thought to facilitate the generation of micro defects due to oxygen precipitation during heat treatment during the semiconductor device manufacturing process.

As mentioned above, it is common knowledge that when these micro defects occur in the active region of the semiconductor layer near the surface of the epitaxial layer, they adversely affect the electrical characteristics of the semiconductor element. In some cases, the getter action that traps harmful impurities has a significant effect on improving the characteristics of semiconductor devices and increasing the yield.

Therefore, if a semiconductor device is manufactured using a silicon substrate in which the boron af of the epitaxial TJ2 is thinner than the oxygen concentration, and the silicon substrate on which the epitaxial layer 2 is to be formed has a higher boron concentration than the oxygen concentration, the epitaxial layer In No. 2, no microdefects are observed at all, and microdefects occur only in the semiconductor substrate. These minute defects on the substrate have a getter effect and capture harmful impurities such as heavy metals that are mixed in during the manufacturing process of semiconductor devices and deteriorate the electrical characteristics, resulting in dynamic 7f! ! Hold failures in MO8 memory can be dramatically reduced.

As described above, according to the present invention, an epitaxial layer with an impurity concentration that is lower than the oxygen concentration is formed in the epitaxial layer in the surface portion that is important for a semiconductor device, thereby preventing the occurrence of micro defects that cause deterioration of characteristics. The semiconductor substrate on which the epitaxial layer should be formed can be made to have an impurity concentration that is lower than the oxygen concentration. The effect is that the characteristics are improved and the manufacturing yield is also improved.

In the above embodiment, the case where the impurity in the silicon substrate is boron is described, but the impurity is not limited to fin, and impurities such as phosphorus, arsenic, gallium, antimony, tin2, etc. that do not have an adverse effect on the semiconductor substrate are used. A similar effect can be obtained for . Further, in this embodiment, the effects have been described for a dynamic MOS memory, but the present invention can be applied to various semiconductor devices that handle a minute amount of electricity.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view for explaining a MOS type semiconductor device according to an embodiment of the present invention, and FIG. 2 is a graph showing silicon substrate concentration versus hold failure rate for explaining the effects of a semiconductor device according to an embodiment of the present invention. Characteristic diagram, Figure 3 (a) is a cross-sectional view of the folded surface of the silicon substrate showing the occurrence of micro defects when the boron concentration of the silicon substrate is lower than the oxygen concentration, and Figure 3 (b) is the cross-sectional view of the folded surface of the silicon substrate. This is a cross-sectional view showing gold when the boron concentration is higher than the oxygen concentration. In the figure, 1... semiconductor substrate made of silicon, 2...
...Epitaxial layer, 3...°...Field oxide film, 4... ...Diffusion layer, ...Polysilicon gate electrode,
6...Borinlicon electrode for forming capacitive part, 7...
. . . Interlayer insulator, 8 . . . Arrow indicating oxygen concentration, 9 . . . Direction line. Figure 1 ( \ ( Figure 3 (a-) Figure 3 (b)

Claims (3)

[Claims] (1) A semiconductor device in which a MOS type semiconductor element is formed on an epitaxial layer, wherein the impurity concentration of the semiconductor substrate for forming the epitaxial layer is higher than the oxygen concentration of the semiconductor substrate. Device. (2) The semiconductor device according to claim (1), wherein the impurity concentration of the epitaxial layer is lower than the oxygen concentration of the epitaxial layer. (3) The impurity concentration of the semiconductor substrate for forming the epitaxial layer is 2×10 com or more, and the impurity concentration of the epitaxial layer is 1×10 com or less. Semiconductor device 1 described in (1)
σ.