JPS59100644A - Measuring system of burst code error rate - Google Patents
Measuring system of burst code error rateInfo
- Publication number
- JPS59100644A JPS59100644A JP21016482A JP21016482A JPS59100644A JP S59100644 A JPS59100644 A JP S59100644A JP 21016482 A JP21016482 A JP 21016482A JP 21016482 A JP21016482 A JP 21016482A JP S59100644 A JPS59100644 A JP S59100644A
- Authority
- JP
- Japan
- Prior art keywords
- error rate
- code error
- burst
- synchronism
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
Abstract
Description
【発明の詳細な説明】
（ａ）１発明の技術分野
本発明はバースト符号誤り率測定方法に係り、特に同期
機能を有する通信装置（例えば時分割多元接続衛星通信
装置）等に於いて、同期外れの影響を防止したバースト
符号誤り率測定方法に関するものである。Detailed Description of the Invention (a) 1 Technical Field of the Invention The present invention relates to a burst bit error rate measurement method, and particularly to a method for measuring a burst bit error rate, particularly in a communication device having a synchronization function (for example, a time division multiple access satellite communication device). The present invention relates to a burst code error rate measurement method that prevents the influence of deviations.
（ｂ）、従来技術と問題点
従来のバースト符号誤り率測定装置に於いては、被測定
装置となる通信装置の同期状態に関係なく受信した信号
系列の符号誤り率測定を行っている為、通信装置側が同
期外れの状態となっても、其の侭符号誤り率測定を続行
している。(b), Prior Art and Problems In the conventional burst code error rate measuring device, the code error rate of the received signal sequence is measured regardless of the synchronization state of the communication device that is the device under test. Even if the communication device side becomes out of synchronization, it continues to measure its backward code error rate.
従って通信回線の瞬断等の原因により通信装置側が同期
外れの状態となっても符号誤り率測定を行うことになり
、正しい符号誤り率測定を行うことにならないと云う欠
点がある。Therefore, even if the communication device side becomes out of synchronization due to a momentary interruption of the communication line or the like, the code error rate measurement will be performed, and there is a drawback that the code error rate measurement will not be performed correctly.
（Ｃ）０発明の目的
本発明の目的は、バースト符号誤り率測定装置に於ける
従来技術の有する上記の欠点を除去し、被測定通信装置
が同期の取れている時に於いてのみ、符号誤り率測定を
行う方式を提供することである。(C)0 Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art in burst code error rate measuring devices, and to detect code errors only when the communication device under test is synchronized. The purpose of the present invention is to provide a method for performing rate measurement.
（ｄ）０発明の構成
上記の目的は本発明によれば、バースト符号誤り率測定
装置に於いて、被測定装置が同期外れの状態になったこ
とを検出又は前記被測定装置より同期外れの状態になっ
たことの通知を受けることにより、前記被測定装置が同
期外れの状態にある期間内の符号誤り率測定を自動的に
中止することを特徴とするバースト符号誤り率測定方式
を提供することにより達成される。(d)0 Structure of the Invention According to the present invention, the above object is to detect when a device under test is out of synchronization in a burst bit error rate measuring device, or when the device under test is out of synchronization. Provided is a burst code error rate measurement method, characterized in that the measurement of the code error rate during a period in which the device under test is in the out-of-synchronization state is automatically stopped by receiving a notification that the device under test has become in the out-of-synchronization state. This is achieved by
（ｅ）９発明の実施例
本発明は従来のバースト符号誤り率測定装置に附加機能
を追加し、被測定対象である通信装置の同期状態判定機
能を附加するか又は、被測定対象である通信装置より同
期外れの状態になったことの通知を受け、此の通知に従
い符号誤り率測定を行うことにより、被測定通信装置が
同期の取れている時に於いてのみ符号誤り率測定を実行
する様にするものである。(e) 9 Embodiments of the Invention The present invention adds additional functions to the conventional burst code error rate measuring device, and adds a function for determining the synchronization state of a communication device to be measured, or a communication device to be measured. By receiving a notification from the device that it has become out of synchronization and performing code error rate measurement according to this notification, the code error rate measurement can be performed only when the communication device under test is in synchronization. It is meant to be.
以下付図に従って本発明の詳細な説明する。The present invention will be described in detail below with reference to the accompanying drawings.
付図は本発明の一実施例を示すブロック図で、図中１は
同期状態判定回路、２は符号誤り率測定回路、ＳＷは切
り換えスイッチ、ａは被測定通信装置よりの受信信号系
列、クロック信号、ゲート信号が印加する端子、ｂは同
期状態信号が印加する端子である。The attached figure is a block diagram showing an embodiment of the present invention, in which 1 is a synchronization state determination circuit, 2 is a bit error rate measurement circuit, SW is a changeover switch, and a is a received signal sequence from the communication device under test, a clock signal. , b is a terminal to which a gate signal is applied, and b is a terminal to which a synchronization state signal is applied.
同期状態判定回路１はバースト毎に被測定通信袋ｒの同
期状態を判定し、其の結果を同期判定信号として切り換
えスイッチＳＷ経出で符号誤り率測定回路２へ送出する
。The synchronization state determination circuit 1 determines the synchronization state of the communication bag r to be measured for each burst, and sends the result as a synchronization determination signal to the code error rate measurement circuit 2 via the changeover switch SW.
符号誤り率測定回路２に於いては同期状態判定回路１よ
りの同期判定信号に基づき、バースト毎に端子ａより入
力される受信信号系列の符号誤り率測定を実行する。即
ち同期状態判定回路１が同期判定信号を出して同期状態
と判定したバーストのみ測定対象とする。Based on the synchronization determination signal from the synchronization state determination circuit 1, the code error rate measuring circuit 2 measures the code error rate of the received signal sequence input from the terminal a for each burst. That is, only bursts for which the synchronization state determination circuit 1 outputs a synchronization determination signal and are determined to be in a synchronization state are subject to measurement.
従って被測定通信装置が同期外れとなった時のバースト
に対しては符号誤り率測定を実行しないので、符号誤り
率測定回路２は常に被測定通信装置の同期状態に於ける
符号誤り率のみを測定することになる。Therefore, the bit error rate measurement circuit 2 does not measure the bit error rate for the burst when the communication device under test is out of synchronization, so the bit error rate measurement circuit 2 always measures only the bit error rate when the communication device under test is in the synchronized state. will be measured.
面上記の説明より明らかな様に被測定通信装置からの同
期状態信号は必ずしも必要ではない。As is clear from the above explanation, a synchronization state signal from the communication device under test is not necessarily required.
（ｆ）９発明の効果
以上詳細に説明した様に本発明によれば、通信回線の瞬
断等の原因による通信装置の同期外れの影響を自動的に
除去し、正しい符号誤り率を測定出来ると云う大きい効
果がある。(f) 9 Effects of the Invention As explained in detail above, according to the present invention, it is possible to automatically remove the influence of out-of-synchronization of communication equipment due to causes such as instantaneous interruption of communication lines, and to measure the correct code error rate. There is a big effect.
付図は本発明の一実施例を示すブロック図で、図中１は
同期状態判定回路、２は符号誤り率測定回路、ＳＷは切
り換えスイッチ、ａは被測定通信装置よりの受信信号系
列、クロック信号、ゲート信号が印加する端子、ｂは同
期状態信号が印加する端子である。The attached figure is a block diagram showing an embodiment of the present invention, in which 1 is a synchronization state determination circuit, 2 is a bit error rate measurement circuit, SW is a changeover switch, and a is a received signal sequence from the communication device under test, a clock signal. , b is a terminal to which a gate signal is applied, and b is a terminal to which a synchronization state signal is applied.
Claims (1)
期外れの状態になったことを検出又は前記被測定装置よ
り同期外れの状態になったことの通知を受けることによ
り、前記被測定装置が同期外れの状態にある期間内の符
号誤り率測定を自動的に中止することを特徴とするバー
スト符号誤り率測定方式。In a burst bit error rate measuring device, the device under test detects that the device under test has become out of synchronization, or receives a notification from the device under test that the device under test has become out of synchronization. A burst code error rate measurement method characterized in that code error rate measurement is automatically stopped during a period in which synchronization is lost.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21016482A JPS59100644A (en) | 1982-11-30 | 1982-11-30 | Measuring system of burst code error rate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21016482A JPS59100644A (en) | 1982-11-30 | 1982-11-30 | Measuring system of burst code error rate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59100644A true JPS59100644A (en) | 1984-06-09 |
Family
ID=16584822
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21016482A Pending JPS59100644A (en) | 1982-11-30 | 1982-11-30 | Measuring system of burst code error rate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59100644A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6162255A (en) * | 1984-09-04 | 1986-03-31 | Nec Corp | Method of measuring bit error rate of tdma circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51123656A (en) * | 1975-04-21 | 1976-10-28 | Nec Corp | An error signal ratio measuring device |
-
1982
- 1982-11-30 JP JP21016482A patent/JPS59100644A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51123656A (en) * | 1975-04-21 | 1976-10-28 | Nec Corp | An error signal ratio measuring device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6162255A (en) * | 1984-09-04 | 1986-03-31 | Nec Corp | Method of measuring bit error rate of tdma circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5727018A (en) | Process for obtaining a signal indicating a synchronization error between a pseudo-random signal sequence from a transmitter and a reference pseudo-random signal sequence from a receiver | |
| JP3357397B2 (en) | Slip detection during bit error rate measurement | |
| JPH0378022B2 (en) | ||
| JPS63240241A (en) | Intermediate repeater | |
| US4688217A (en) | Method of implementing burst acquisition control in TDMA system | |
| JPS59100644A (en) | Measuring system of burst code error rate | |
| US5430746A (en) | Method of and circuitry for detecting synchronism failure of two word sequences | |
| JP2751673B2 (en) | Bit error rate measurement equipment for digital communication systems | |
| JPH04101615A (en) | Digital protection relay | |
| KR20000046903A (en) | Device and method for transmitting and receiving multi-terminal electric power line using global positioning system | |
| SU478312A1 (en) | Apparatus for simulating radio relay synchronization process | |
| JP2638463B2 (en) | Line test method | |
| JPS63302637A (en) | Measuring instrument for error rate | |
| SU454704A1 (en) | Device for determining the frequency of stuffing of secondary digital communication systems with ICM-g | |
| JPH0310532A (en) | Line quality diagnostic device | |
| JP2693330B2 (en) | Power system protection system | |
| JP2573560B2 (en) | Frame synchronization method | |
| JPH05260639A (en) | Automatic monitoring circuit of digital protection relay device | |
| JPS6011862B2 (en) | signal detection circuit | |
| JPS6077544A (en) | Code error measuring device | |
| JPS60100842A (en) | Automatic correction circuit of burst signal time | |
| JPS6232649B2 (en) | ||
| JPS60146561A (en) | Channel continuity testing system | |
| JPH0630083A (en) | Transmission characteristic measuring instrument | |
| JPS5837740B2 (en) | Error rate measurement method for data transmission systems |