JPS59100545A - Die bonding device for ic chip - Google Patents

Die bonding device for ic chip

Info

Publication number
JPS59100545A
JPS59100545A JP21159182A JP21159182A JPS59100545A JP S59100545 A JPS59100545 A JP S59100545A JP 21159182 A JP21159182 A JP 21159182A JP 21159182 A JP21159182 A JP 21159182A JP S59100545 A JPS59100545 A JP S59100545A
Authority
JP
Japan
Prior art keywords
substrate
stamping
actuator
chip
stamping heads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21159182A
Other languages
Japanese (ja)
Inventor
Toshiyuki Yamaguchi
敏行 山口
Shigenari Takami
茂成 高見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP21159182A priority Critical patent/JPS59100545A/en
Publication of JPS59100545A publication Critical patent/JPS59100545A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

PURPOSE:To improve productivity, by attaching a plurality of stamping heads, which apply a bonding agent for die bonding to IC chips, to one actuator. CONSTITUTION:A plurality of stamping heads 1 are supported by one actuator 7 through springs 2. The actuator 7 moves the stamping heads to and from between a container 3, in which a bonding agent is contained, and a substrate 4, and applies the bonding agent to a plurality of attaching parts 6 on the substrate 4. IC chips are attached to the plurality of attaching parts 6, the bonding agent is heated and hardened, and the bonding is finished. The stamping heads 1 are supported by the actuator 7 so that the stamping heads can be rearranged in correspondence with the attaching parts 6, which are changed by the change in kind of the substrate 4.

Description

【発明の詳細な説明】 ＋１１　　技術分野 本発明はエポキシ樹脂等接着剤のスタンピング方式によ
るＩＣチップの基板へのダイボンドの生産性を向上させ
る技術に関する。DETAILED DESCRIPTION OF THE INVENTION +11 Technical Field The present invention relates to a technology for improving the productivity of die bonding IC chips to substrates by stamping adhesives such as epoxy resins.

（２）背景技術 従来エポキシ樹脂を用いたダイボンディングの場合、樹
脂塗布方式はディスペンサーによるもの、スタンピング
によるもの、スクリーン印刷によるもの等がある。スク
リーン印刷方式の場合、１回の印刷で必要な箇所に樹脂
を塗布することができるが、材料のむだが多く、また凹
凸のある基板には適用が難かしい。ディスペンスの方式
、スタンピングの方式ではこのような問題点はないが、
多くのＩＣを有する場合、各ＩＣチップの接合部分へＩ
Ｃの数の回数だけエポキシ樹脂の塗布が必要となり生産
性に欠ける。ディスペンスの方式とスタンピングの方式
との差は、前者は比較的量の多い場合の定量塗布に向き
後者は少量の場合の定量塗布に適している。(2) Background Art Conventionally, in the case of die bonding using an epoxy resin, resin application methods include those using a dispenser, those using stamping, and those using screen printing. In the case of screen printing, resin can be applied to the necessary areas in one printing, but there is a lot of wasted material, and it is difficult to apply to substrates with uneven surfaces. Dispensing and stamping methods do not have this problem, but
If you have many ICs, the I
It is necessary to apply the epoxy resin as many times as C, resulting in a lack of productivity. The difference between the dispensing method and the stamping method is that the former is suitable for fixed-quantity application when a relatively large amount is applied, and the latter is suitable for fixed-quantity application when a small amount is applied.

第１図乃至第３図は従来のスタンピング方式゛を表わし
ている。1 to 3 illustrate a conventional stamping method.

（１）はスタンピングヘッドで、スプリング（２）を介
してアクチュエータ（図示せず）に支持され、接名剤を
入れた容器（３）と電気回路基板やリードフレーム等の
基板（４）間を往復し、容器（３）中でスタンピングヘ
ッド（１）につけた接着剤を基板（４）のＩＣチップ（
５１の取付部（６）にスタンプするものである。而して
従来のこの種の装置においてはこのスタンピングヘッド
（１１は１個のみ使用していたので、基板（４）に複数
個のＩＣチップ（５）を取付けるときには複数回の往復
動と対応する取付部（６）への位置変更をさせるための
ＮＣ制御装置が必要であった。ＩＣチップ（５）はこの
あと接着剤を塗布した取付部（６）へ上載し、加熱硬化
せしめて接合される。１つの基板１こ１つのＩＣを実装
する場合はこの従来のもので十分生産性もあがるが、１
つの基板に複数個のＩＣチップがある場合、上記の動作
を繰り返し行なわなければならず、時間のロスを含むの
である。(1) is a stamping head that is supported by an actuator (not shown) via a spring (2), and is used to connect a container (3) containing a contact agent and a substrate (4) such as an electric circuit board or a lead frame. The adhesive applied to the stamping head (1) is applied to the IC chip (4) of the substrate (4) in the container (3).
The stamp is to be stamped on the attachment part (6) of 51. In conventional devices of this type, only one stamping head (11) is used, so when attaching a plurality of IC chips (5) to a substrate (4), the stamping head must move back and forth several times. An NC control device was required to change the position to the mounting part (6).The IC chip (5) was then placed on the mounting part (6) coated with adhesive, heated and hardened, and bonded. When mounting one IC on one board, this conventional method is sufficient to increase productivity, but
If there are multiple IC chips on one board, the above operations must be repeated, which involves time loss.

（３）発明の目的 本発明は複数個のＩＣを有するハイブリッドＩＣの製造
工程において、ＩＣチップと基板を接合するダイボンデ
ィング工程にエポキシ樹脂、導電性接着剤、ペースト半
田等の接着剤を用いる場合の生産性の向上を目的とする
。(3) Purpose of the Invention The present invention relates to the manufacturing process of a hybrid IC having a plurality of ICs, in which an adhesive such as an epoxy resin, a conductive adhesive, or a paste solder is used in the die bonding process to bond an IC chip and a substrate. The aim is to improve productivity.

（４）　　発明の構成 本発明は第４図乃至第６図に示す実施例の如くスタンピ
ンヘッド（１）をＩＣチップの数だけ用意し、スタンピ
ングの動作を１回ですませようとするものである。(4) Structure of the Invention The present invention aims to prepare as many stamping heads (1) as there are IC chips as in the embodiments shown in FIGS. 4 to 6, and perform the stamping operation only once. .

本実施例では、３個のスタンピングヘッド（１）を各々
スプリング（２）を介して１個のアクチュエータ（７）
に支持させている。スタンピングヘッド（１）の配置は
、各々スタンピングヘッド（１）が基板（４）の各取付
部（６）に対応配置されている。そしてこのアクチュエ
ータ（７）はスタンピングヘッド（１）を接着剤を入れ
た容器（３１と基板（４）間を往復し、容器（３）の中
でスタンピングヘッドｆｉｌにつけた接着剤を基板（４
）の３個の各取付部（６）に同時にスタンプするのであ
る。In this embodiment, three stamping heads (1) are each connected to one actuator (7) via a spring (2).
It is supported by The stamping heads (1) are arranged so that each stamping head (1) corresponds to each mounting portion (6) of the substrate (4). This actuator (7) moves the stamping head (1) back and forth between the container (31 containing adhesive) and the substrate (4), and transfers the adhesive applied to the stamping head fil to the substrate (4) in the container (3).
) are stamped at the same time on each of the three attachment parts (6).

接着剤の塗布された取付部（６）へＩＣチップ（５）を
上載し、加熱硬化せしめて接合は完了する。尚、スタン
ピングヘッド（１）は基板（４）の種類の変更Ｓこより
、その取付部（６）に対応するようアクチュエータ（７
）に配置変更できるようになっている。The IC chip (5) is placed on the attachment part (6) coated with adhesive, and the adhesive is cured by heating to complete the bonding. In addition, due to the change in the type of substrate (4), the stamping head (1) has an actuator (7) that corresponds to its mounting part (6).
) can be repositioned.

（５）発明の効果 斜上の如くこの発明によれば、エポキシ樹脂等接着剤の
基板への塗布がＩＣチップの数にかかわらず１度ででき
るので生産性の向上（ロスタイムの低減）があがる。ま
た、これまでの説明はダイボンディング材料をエポキシ
樹脂に限っているが、導電接着剤、ペーストはんだ等の
接合剤に適用できるのは言うまでもないことである。(5) Effects of the Invention According to the present invention, the application of adhesive such as epoxy resin to the substrate can be done in one step regardless of the number of IC chips, which improves productivity (reduces loss time). . Further, although the die bonding material described so far has been limited to epoxy resin, it goes without saying that the present invention can be applied to bonding agents such as conductive adhesives and paste solders.

【図面の簡単な説明】[Brief explanation of drawings]

第１図乃至第３図は従来例を示す斜視図、第４図乃至第
６図はこの発明の一実施例を示す斜視図である。 特許出願人 松下電工株式会社 代理人弁理士　　竹　元　敏　丸 （ほか２名） 第１図 第３図 第４図 ３ 第５日1 to 3 are perspective views showing a conventional example, and FIGS. 4 to 6 are perspective views showing an embodiment of the present invention. Patent applicant Matsushita Electric Works Co., Ltd. Representative Patent Attorney Toshimaru Takemoto (and 2 others) Figure 1 Figure 3 Figure 4 Figure 3 5th day

Claims (1)

【特許請求の範囲】[Claims] （１）複数のスタンピングヘッドを１個のアクチュエー
タに支持させ、基板上の複数個のＩＣチップの取付部に
同時に接着剤の塗布をおこなうことを特徴とするＩＣチ
ップのダイボンド装置。(1) An IC chip die-bonding device characterized in that a plurality of stamping heads are supported by one actuator and adhesive is applied simultaneously to the mounting portions of a plurality of IC chips on a substrate.
JP21159182A 1982-11-30 1982-11-30 Die bonding device for ic chip Pending JPS59100545A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21159182A JPS59100545A (en) 1982-11-30 1982-11-30 Die bonding device for ic chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21159182A JPS59100545A (en) 1982-11-30 1982-11-30 Die bonding device for ic chip

Publications (1)

Publication Number Publication Date
JPS59100545A true JPS59100545A (en) 1984-06-09

Family

ID=16608296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21159182A Pending JPS59100545A (en) 1982-11-30 1982-11-30 Die bonding device for ic chip

Country Status (1)

Country Link
JP (1) JPS59100545A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6413723U (en) * 1987-07-15 1989-01-24
FR2672428A1 (en) * 1991-02-04 1992-08-07 Schiltz Andre METHOD AND DEVICE FOR INSERTING CHIPS INTO HOUSINGS OF A SUBSTRATE BY SIZING HEAD.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6413723U (en) * 1987-07-15 1989-01-24
FR2672428A1 (en) * 1991-02-04 1992-08-07 Schiltz Andre METHOD AND DEVICE FOR INSERTING CHIPS INTO HOUSINGS OF A SUBSTRATE BY SIZING HEAD.

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