JPS5895426A - Semiconductor switch - Google Patents

Abstract

PURPOSE:To make the turn-on/off detection characteristics of a main current accurate to reduce the element occupied area, by providing the second anode terminal for detection of the turn-on/off state of the main current in a main current switch circuit. CONSTITUTION:When an on-state current is supplied from a gate G, PNPN switches Q11 and Q2 are turned on, and a load current determined by a power source V1 and a resistance R2 is flowed. Simultaneously, an on-state detection current is flowed from an anode A2 to a cathode K. An off-state driving current is flowed from an off-state control input terminal B to turn on a transistor TRQ3, and PNPN switches Q11 and Q2 are turned off, and the load current is turned off. Simultaneously, the on-state detection current flowed from the anode A2 to the cathode is turned off. The presence or the absence of the current from the second anode A2 indicates the turn-on state or the turn-off state of the main current at an accurate time, and the element occupied area is reduced because a four-terminal PNPN switch 2 can be constituted as one body.

Description

[Detailed Description of the Invention] The present invention relates to a semiconductor switch including a PNPN switch, and particularly to a semiconductor switch that can easily detect the on/off state of the main current from the outside and is easy to integrate into semiconductors. It is.

Generally, a PNPN switch as a semiconductor switch is
Compared to transistor switches, they have advantages such as high bidirectional breakdown voltage, low on-resistance, and low on-voltage even when a large current is applied. but,
At the same time, since it has a self-holding function, it has the disadvantage that when used as an on/off switch, the off control is relatively distant.

. In order to turn off the PNPN switch without changing the load current, there is a method of transiently shorting the gate-cathode connection to temporarily increase the holding current and making it impossible to hold the load current.
There is a method of turning off the gate by applying a reverse current to the gate, which method can be used depending on the negative current cutting ability and external circuit conditions.

Now, since the on/off switch constructed using these methods has a self-holding function, there are cases where the detection of the on/off state of the switch is required. PNPN
The switch enters the off state with a delay of the turn-off time caused by the charge accumulation time from the time of the off-drive, or
Depending on the application of the switch, this delay time may cause problems with external control. For example, when a current selection switch is configured with two on/off switches using PNPN switches, first one switch is driven off in a pulse manner, and then the other switch is driven on in a pulse manner to load the When attempting to switch the current, there are cases where the switch that receives the off-drive does not completely turn off, and the other switch turns on, causing two switches to remain on at the same time. This is a phenomenon caused by the self-holding function of the PNPN switch, which continues the on-holding operation even without gate control as long as it is in a state where current can be passed between the main electrodes or externally KTo, and the fact that the turn-off time is generally longer than the turn-on time. In order to prevent such malfunctions, it is necessary to have a method of detecting at what point the load current of the switch is turned off.

FIG. 1 shows the circuit configuration of an on/off switch equipped with an off detection function. In FIG. 1, the ON and OFF control of the PNPN switch 10 isometrically constituted by the PNP transistor Q1 and the NPN transistor Q2 is as follows.
This is achieved by adding drive current to gate G and off control input terminal BK, respectively, and as a result, load resistance R2 of the external circuit
The load current determined by the power supply ■1 can be turned on and off.

Here, the resistor R1 is to prevent malfunction due to the dv/dt effect of the PNPN x y 1, and the PNPN switch 1
It is determined by the gate firing sensitivity Fi and the resistance RIK. In addition, the transistor Q6 is connected to the gate G of the PNPN switch 1.
and the cathode to increase the minimum holding current value of the PNPN switch 1 and shift it to the OFF state.

Transistor Q4 is for detecting the ON/OFF state of the PNPN switch 10, and transistor Q2,
Since Q4 has a configuration in which its base and output are commonly connected, a so-called current mirror configuration, both transistors Q2 and Q4 exhibit the same operating state.

FIG. 2 schematically shows the above operating waveforms, where G is the on-drive current, IB is the off-drive current, M is the anode current, and IC is the collector current of the transistor Q4. As is clear from Fig. 2, PNPN switch 1
The on/off information of the anode current Em can be detected from the presence or absence of the collector current IC of the transistor Q4, that is, the voltage drop across the resistor R5 in FIG.

However, the circuit configuration shown in FIG. 1 has the following drawbacks. The first drawback is that off detection is not temporally accurate. Normally, the PNPN switch 1, the transistor, and Q4 are each separate devices, and therefore have different sizes and shapes, and because the external load conditions cannot always be the same, the turn-off times differ.

Furthermore, the turn-off time of %PNPN switch 1 is the same as that of component transistor Q1. Since it tends to be the sum of the turn-off time of transistor Q2, accurate off-detection cannot be performed with transistor Q4. That is, when the first ffi is turned off, transistors Q2 and Q4 are simultaneously short-circuited between the two transistors by transistor Q3, so they immediately turn off, but transistor Q1 (PNP) turns off from that point on. . As a result, W, t4 and t5 in Figure 2
As shown in the figure, the off detection is performed before the PNPN switch 1 is completely turned off, and the purpose is not fully achieved. The second drawback is that the number of elements increases because the transistor Q4 is added for off detection. This increases the area occupied by the device when considering semiconductor integrated circuits, which is undesirable from an economical point of view.

As described above, the semiconductor switch according to the prior art has the drawbacks of insufficient off-detection characteristics and a large device occupation area.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor switch that has accurate main current on/off detection characteristics, has a small device occupation area, and is suitable for integration.

For this purpose, the present invention provides a main current switch circuit with a second anode terminal for detecting the on/off state of the main current, so that it can accurately detect the on/off state of the main current. The present invention will be described in detail below using one drawing.

FIG. 5 is a circuit configuration diagram showing the first embodiment of the semiconductor switch according to the present invention. J, Qll, Q12, and Q2 are two PNP transistors and one NPN transistor that constitute the four-terminal PNPN switch 2. Q5 is an NPN) transistor for turn-off, R1 is a resistor to prevent malfunction due to dv/dt effect, Vl and R2 are the load power supply and resistor, respectively, V2 and R3 are the power supply and resistor for on/off detection, respectively. be. Also, AI is the first anode terminal, A2
indicates a cathode terminal for the second anode terminal 1, G indicates a gate terminal, and B indicates an off control input terminal. In the circuit configuration shown in Figure 6, ON control is performed.

is achieved by supplying an on-drive current from the gate G, and when the switch W consisting of Qll and Q2 is in the on state, the load current determined by the external circuit power supply 1 and the resistor R2 is supplied from the anode A1. flows to the cathode. At the same time, the PNPN switch composed of Q12 and Q2 is also turned on, and an on-detection current determined by the external circuit power supply 2 and resistor R5 flows from the anode A2 to the cathode. Next, off control is performed by injecting an off drive current from the off control input terminal B, turning on the transistor Q3 and connecting the gate G and cathode of the PNPN switch 2, that is, the transistor Q2 The holding current value of the PNPN switch is increased by short-circuiting between the emitters of the PNPN switch, and the load current flowing from the anode A1 to the cathode KK is turned off. At the same time, anode A2
The on-detection current flowing from the to the card K is also turned off.

Now, in the circuit configuration shown in Figure 3, the main current is turned on and off.
Off detection is performed using a PNP transistor Q11 through which the main current flows and a PNP transistor Q11 connected in common to the pace fist collector.
This is done with or without the 12 Eitztor currents. In the turn-off operation of the PNPN switch, first, the base and two transistors are short-circuited by the NPN) transistor Q 2 and the PNP transistor Q 5 to turn off the switch, and then the PNP) transistor Q 1 . Q12 turns off at the same time, so that anodes A1. The time during which the inflow current from A2 is turned off is approximately the same. Similarly, regarding the turn-on operation of the PNPN switch, the NPN) transistor Q
2 turns on, PNP) transistors Q11, Q1
2 turn on at the same time. As a result, the second anode A
The presence or absence of the inflow current from 2 indicates the on/off state of the main current at an appropriate time 9, and a semiconductor switch with accurate on/off detection characteristics can be obtained.

Furthermore, the four-terminal PNPN switch 2 shown in FIG. 3 can be a device of integral construction. FIG. 4 shows the cross-sectional structure of this four-fold PNPN switch 2, in which 10 is an N-type semiconductor substrate, 11, 12, and 15 are P expansion diffusion layers, and 14 is an N expansion diffusion layer. 15 is an oxide film, 16as
16bs16c and 16d'' indicate metal wiring layers, respectively.

The first anode terminal A1 of the four-terminal PNPN switch 2 is taken out from the metal wiring layer 16m through the P-type dispersion layer 11,
Similarly, the second anode terminal A2, gate terminal 0% cathode terminal KI/i, P swelling diffusion layer 13, P swelling diffusion layer 1, respectively.
2. Metal wiring layer 16bs 16C via N-type scattering layer 14
% Take out from 16d. Since the four-terminal PNPN switch 2 can be formed into an integral structure as shown in FIG. 4, the circuit shown in FIG.

The device can occupy a small area. Furthermore, according to the prototype experiments conducted by the present inventors, the times shown in FIG.

It has been found that the operation of the circuit is rather that the transistor Q12 is turned off after the transistor Q11 is turned off, allowing time for the main current to be detected to be turned off. That is, the fifth
When the drawing circuit is integrated into a semiconductor, it is possible to achieve an economical design that is easy to integrate, and to obtain a semiconductor switch that can accurately detect on/off of the main current.

Figure 5 is a circuit diagram showing the 10th embodiment of the semiconductor switch according to the present invention, and p shows the circuit configuration shown in Figure 3. Transistors Q5 and Q6 for current shunting are added to the circuit configuration shown in Figure 3 to form a semiconductor switch. This example shows an example in which the current cutting ability of the device is further improved.

In FIG. 5, the same symbols are used for the same parts as in FIG. 3, but the power supply V1% V2 and the resistors R2 and Rs of the external circuit shown in FIG. 3 are omitted. In this circuit configuration as well, on-control is achieved by supplying an on-drive current from the gate G. First, the four-terminal PNPN switch 2 is turned on, then the transistors Q5 and Q6 are turned on, and the first anode is turned on. Load current flows from A1 to the cathode. At the same time, since the transistor Q12 is also turned on, a heon detection current flows from the second anode A2 to the cathode. Next, OFF control is also performed by injecting an OFF drive current from the OFF control input terminal B. First, transistor Q3 is turned on, 4-terminal PNPN switch 2 is turned off, and then transistors Q5 and Q6 for current diversion are turned off. When it is turned off, the load current flowing from the anode A1 to the cathode is cut off. At the same time, the on-detection current flowing from the second anode A2 to the cathode K is also turned off.

In the embodiment shown in FIG. 5, since the load current is divided into the PNPN' switch 2 and the transistors Q5 and Q6, a semiconductor switch having a greater current cutting ability than the embodiment shown in FIG. 5 can be obtained. Also, Figures 3 and 4
As explained in the figure, the four-terminal PNPN switch 2 can be formed into an integral structure, so that the device occupies a small area. However, regarding the off detection time, the transistor Q5%
The turn-off time due to Q6 tends to cause an error.

The embodiment shown in FIG. 6 improves this point.

FIG. 6 shows a circuit configuration of a fifth embodiment of the semiconductor switch according to the present invention.
Let N switch 2 be a normal PNPN switch 1, and
A transistor Q52 for on/off detection is added. In this embodiment, the emitter of the transistor Q1 constituting the PNPN switch 1 and the transistor Q51
Connect the emitter of A to the first anode terminal A for the main electrode.
1, and the transistor Q52 whose collector and pace are commonly connected to the transistor Q51 is used as the second anode terminal A2 for on/off detection.

The other parts are the same as those in FIG. 1, and the operation is the same as that described in FIG. 5. However, since the on/off detection of the main current is carried out based on the presence or absence of current flowing into the emitter of the transistor Q51 and the transistor Q52 whose collectors are connected in common with the transistor Q51 which turns off at the end during off control, The on/off status of the main current can be detected. In addition, the PNP) transistors Q51 and Q52 are
As with the four-terminal PNPN switch described in the figure, it is possible to use a one-line structure, and the area occupied by the element can be kept small. Furthermore, tIL flow cut.

It is characterized by a large cutting capacity.

As described in detail above, the present invention detects whether the main current is on or off from the second anode terminal of the main current switch circuit, thereby ensuring accurate detection characteristics. Since the area occupied by the detection element can be reduced, high integration is possible, and a semiconductor switch with excellent characteristics and economical efficiency can be provided.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram of a conventional semiconductor switch, FIG. 2 is an operating waveform diagram of the circuit configuration of FIG. 1, and FIG. 3 is a first implementation of the semiconductor switch according to the present invention. A circuit configuration diagram showing an example, FIG. 4, is shown in FIG. 3. Structural sectional views of a four-terminal PNPN switch, FIG. 5, and FIG. 6 are views of a semiconductor switch according to the present invention. FIG. 6 is a circuit configuration diagram showing second and third embodiments. 1-・PNPN switch 2・-4 terminal PNPN switch Ql, Q2, Qll, Ql2-PNPN switch configuration transistor Q3, Q5, Q6, Q51, Q52-) Transistor A1
-・First 7-node terminal A2 - Second anode terminal K -, Cathode terminal G - Gate terminal B ++ Off control input terminal Sweet j Figure 2 Figure f3 Figure
74 Figure 121 Age 5 Figure Zui Otsu y”

Claims (1)

[Claims] t A main current switch circuit including a first anode terminal for a main electrode, a cathode terminal, a gate terminal for control, and a second anode terminal for detection, and a gate of the nuclear main current switch circuit. - It consists of a turn-off switch circuit connected between the cathode terminals, and is configured to detect the on/off state of the inflow current of the first 7-node terminal by the inflow current of the second 7-node terminal. A semiconductor switch characterized by: 2. The semiconductor switch according to claim 1, wherein the main current switch circuit is a PNPN switch having at least two 7-node terminals. It is composed of a P'NPN switch having an anode terminal and a transistor for current diversion of logic 1 and @2.
One main electrode of the switch is connected to the terminal of the first transistor, and the other main electrode of the PNPN switch is connected to the base Kvj of the second transistor,
the above#! 2. The semiconductor switch according to claim 1, wherein the base and collector of the first transistor are connected to the collector and emitter of the second transistor, respectively. 4. The main current switch circuit has a PNPN switch and a t
It is composed of a transistor for 1/2 current diversion and an @S transistor for detecting the on/off state of the main current, and one main pole of the PNPN switch is connected to the emitter of the first transistor. , the other O-pole of the PNPN switch is connected to the base of the second transistor, and the bases and collectors of the first and third transistors are commonly connected to each other, respectively.
2. The semiconductor switch according to claim 1, wherein the collector and emitter of two transistors are connected to each other.