JPS5894019U - transformerless power supply circuit - Google Patents

transformerless power supply circuit

Info

Publication number
JPS5894019U
JPS5894019U JP18741181U JP18741181U JPS5894019U JP S5894019 U JPS5894019 U JP S5894019U JP 18741181 U JP18741181 U JP 18741181U JP 18741181 U JP18741181 U JP 18741181U JP S5894019 U JPS5894019 U JP S5894019U
Authority
JP
Japan
Prior art keywords
voltage
rectifier
power supply
transistor
supply circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18741181U
Other languages
Japanese (ja)
Inventor
修 田中
仁 深川
義春 鈴木
美行 薦田
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP18741181U priority Critical patent/JPS5894019U/en
Publication of JPS5894019U publication Critical patent/JPS5894019U/en
Pending legal-status Critical Current

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  • Rectifiers (AREA)
  • Power Sources (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の回路図、第2図は本考案の一実施例の
回路図、第3図a、  bは同上の動作波形図である。 Tr2. Tr3はトランジスタ、■8は交流電源、D
B2はダイオードブリッジ、R4,R6は分圧抵抗、Z
D2はツェナダイオード、C2はコンデンサである。
FIG. 1 is a circuit diagram of a conventional example, FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIGS. 3a and 3b are operational waveform diagrams of the same. Tr2. Tr3 is a transistor, ■8 is an AC power supply, D
B2 is a diode bridge, R4 and R6 are voltage dividing resistors, Z
D2 is a Zener diode, and C2 is a capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 前段のトランジスタのエミッタを後段のトランジスタの
コレクタに接続することにより複数個のトランジスタを
直列に接続し、交流電源電圧を全波整流する整流器と、
整流器の出力を平滑する平滑コンデンサとの間に上記ト
ランジスタの直列回路を介装し、整流器の出力電圧を直
列接続されたトランジスタの個数で割った電圧ごとにほ
ぼ均等に分圧した複数個の分圧電圧を生じる分圧抵抗を
設け、平滑コンデンサにエミッタを接続されたトランジ
スタのベースにツェナダイオードにより発生した基準電
圧を印加し、他のトランジスタのベースに上記分圧抵抗
により発生した分圧電圧を印加して整流器に近いトラン
ジスタはど高いベース電圧が供給されるようにして成る
トランスレス電源回路。
a rectifier that connects a plurality of transistors in series by connecting the emitter of a first-stage transistor to the collector of a second-stage transistor, and performs full-wave rectification of an AC power supply voltage;
A series circuit of the above transistors is interposed between a smoothing capacitor that smoothes the output of the rectifier, and the output voltage of the rectifier is divided almost equally by the number of transistors connected in series. A voltage dividing resistor that generates a voltage is provided, a reference voltage generated by a Zener diode is applied to the base of a transistor whose emitter is connected to a smoothing capacitor, and a divided voltage generated by the voltage dividing resistor is applied to the base of another transistor. A transformerless power supply circuit in which the transistor near the rectifier is supplied with a high base voltage.
JP18741181U 1981-12-15 1981-12-15 transformerless power supply circuit Pending JPS5894019U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18741181U JPS5894019U (en) 1981-12-15 1981-12-15 transformerless power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18741181U JPS5894019U (en) 1981-12-15 1981-12-15 transformerless power supply circuit

Publications (1)

Publication Number Publication Date
JPS5894019U true JPS5894019U (en) 1983-06-25

Family

ID=30102753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18741181U Pending JPS5894019U (en) 1981-12-15 1981-12-15 transformerless power supply circuit

Country Status (1)

Country Link
JP (1) JPS5894019U (en)

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