JPS5890744A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5890744A
JPS5890744A JP19109681A JP19109681A JPS5890744A JP S5890744 A JPS5890744 A JP S5890744A JP 19109681 A JP19109681 A JP 19109681A JP 19109681 A JP19109681 A JP 19109681A JP S5890744 A JPS5890744 A JP S5890744A
Authority
JP
Japan
Prior art keywords
semiconductor device
layers
functional
functional layer
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19109681A
Other languages
Japanese (ja)
Inventor
Hiromi Ito
伊藤 博已
Masahito Ohashi
雅人 大橋
Kenji Takayama
健司 高山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19109681A priority Critical patent/JPS5890744A/en
Publication of JPS5890744A publication Critical patent/JPS5890744A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06589Thermal management, e.g. cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To improve heat radiation and provide semiconductor elements as many as possible on a functional layer by providing metal layers between layers of the stacking structure of Si substrate and functional layers. CONSTITUTION:The Si substrates 1a-1d are provided with many semiconductor elements and layers 2a-2c having the function of semiconductor device are respectively stacked alternately with metal plates 3a-3c. Therefore, when the functional layers 2a-2c are operating, generated heat is radiated effectively through the metal layers 3a-3c, preventing deterioration of function and breakdown of device.

Description

【発明の詳細な説明】 この発明は軸層構造の半導体装置に係り、特にその熱放
出に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device having an axial layer structure, and particularly to heat dissipation thereof.

オ1図は従来の積層構造の半導体装置を示す断面図であ
り、図において(la)〜(1d)はシリコン基板、(
2a)〜(Ha )はこれらシリコン基標(la)〜(
ld)の間にそれぞれ形成された機hビ層で、それ自体
で半導体装置としての一つの機能を有する層である。
Figure 1 is a cross-sectional view showing a conventional stacked structure semiconductor device.
2a)~(Ha) are these silicon base standards (la)~(
(1) and (1) and (1) and (2), respectively, and are layers each having a function as a semiconductor device by itself.

この休にシリコン基板(la) −(1d)と機能層(
2a)〜(8c)が積層された半導体装置において、例
えばシリコン基板(11)上に形成された機能層(Sl
a)は、その中の半導体素子が動作する時に熱を発生す
るものであり、この熱は半導体装置の外部にはほとんど
放出されず、半導体装置内に熱が閉じこめられるこ七に
なり、装dそのものの温度が上杵するものである。
In this holiday, silicon substrate (la) - (1d) and functional layer (
In a semiconductor device in which 2a) to (8c) are stacked, for example, a functional layer (Sl
A) is that heat is generated when the semiconductor elements inside the semiconductor device operate, and this heat is hardly released to the outside of the semiconductor device, and the heat is trapped inside the semiconductor device, causing damage to the device. The temperature of the material itself is the key.

つまり、従来の積層構造の半導体装置は非常に熱の放出
効果が悪く半導体装置の機能そのものを劣化させたりあ
るいけ破損する恐れがありまた熱の発生を抑制する意味
から%機能層(8a)〜(2c)に作られる半導体素子
の数もおのずと少数になり、せっかくの積層構造の半導
体装置としてのメリットを半減するものであった。
In other words, the conventional laminated structure semiconductor device has a very poor heat dissipation effect and may deteriorate the function of the semiconductor device itself or even be damaged. The number of semiconductor elements manufactured in (2c) was naturally reduced, which halved the merit of the laminated structure as a semiconductor device.

この発明は上記のような従来のものの欠点を除去するた
めになされたもので、シリコン基板と機能層との積層構
造における各層間に金属層を設けることによって、より
効率のよい熱放出を行なうとともに、機能層により多く
の半導体素子を作れるようにすることを特徴とする特許
である。
This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and by providing a metal layer between each layer in the laminated structure of a silicon substrate and a functional layer, more efficient heat dissipation is achieved. , is a patent that is characterized by making it possible to create more semiconductor elements using functional layers.

以下この発明の一実施例を第2図に基づいて説明すると
、図において(la l〜(lb ) t−1シリコン
基板、(2a)〜(go)は多数の半導体素子が作られ
、それ自体で半導体装置としての一つのg能\を有する
機能層、(8a)’〜(sb)は熱伝導の良い金属から
なる金属層で、シリコン基板(1a)と機能層(jla
l、シリコン基板(11))と+h能層C2b)、およ
びシリコン基板(lclと機能層(2C)とのそれぞれ
の間F+けられ、機能・4 (2al〜(2C)からの
発生熱を半導体装置外部に放出するものである。
An embodiment of the present invention will be explained below based on FIG. The functional layers (8a)' to (sb) are metal layers made of a metal with good thermal conductivity, and the silicon substrate (1a) and the functional layer (jla
1, between the silicon substrate (11)) and the functional layer C2b), and between the silicon substrate (lcl and the functional layer (2C)), the heat generated from the functional layer (2al to (2C)) is transferred to the semiconductor. It is released outside the device.

この様にi11+’fflされた噴層型の半導体装置に
あっては、機能層($lal〜(gc)が動作時、つま
りそれらの中に作られた半導体素子が動作して、発生し
た熱は機能層(ga“)〜Igc)それぞれの下部に配
設されたそれぞれの金属層(jla)〜(3C)を介し
て外部に放出されるものであり、これによって半導体装
置自身に熱がこもるのが軽減されるものである。
In such a jet-type semiconductor device with i11+'ffl, the functional layer ($lal ~ (gc)) is heated during operation, that is, when the semiconductor elements formed therein are operated, the heat generated is is released to the outside through the respective metal layers (JLA) to (3C) disposed under each of the functional layers (GA") to IGC, and this causes heat to be trapped in the semiconductor device itself. This is something that can be alleviated.

したがって、半導体装置の機能が発生熱により損なわれ
ることが抑制され、かつ、機能層C2a)′□〜(8c
)それぞれに作られる半導体素子の数も増加できるもの
である。
Therefore, the function of the semiconductor device is suppressed from being impaired by the generated heat, and the functional layers C2a)′□ to (8c
) The number of semiconductor elements that can be manufactured for each can also be increased.

なお上記実施例では、金属層(8a)’〜(8c)のそ
れぞれの側端を装置の端で°途切れシリコン基板11a
1〜(ldlおよび機能層(2al 〜(gc lO側
端を同一面にしているがこれら側端よシも外部に突出さ
せても良く、このようにした場合にはさらに熱放出を高
めることができるものである。また金属層(3a)〜(
8C)は、異種の金属を数種類合わせた様なものでもよ
く、さらに金属層(8a)〜゛°(8♂)はそれぞれ機
能層(2a1〜(8a)の下部に設けたが、上部でも良
く、上・下部両者KBけてもよいものである。
In the above embodiment, the side edges of each of the metal layers (8a)' to (8c) are cut off at the edge of the device and the silicon substrate 11a
1~(ldl and functional layer (2al~(gcl) The O side edges are on the same surface, but these side edges may also be made to protrude to the outside. In this case, heat release can be further enhanced. Also, metal layers (3a) to (
8C) may be a combination of several types of different metals, and furthermore, the metal layers (8a) to ゛° (8♂) are provided at the bottom of the functional layers (2a1 to (8a)), but they may also be provided above. , both the upper and lower parts may be offset by KB.

また上記実施例では機能層を8層設けたものについて説
明したが、8層でも8層以上にしたものであっても良い
凡のである。・ この発明は以上に述べたように、シリコン基板と機能層
とが積層された半導体装置において、シリコン基板と機
能層との間に金属層を設けたので機能層に作られる半導
体素子が動作時に発生する熱を効率よく外部へ放出でき
、熱による半導体装置の機能の劣化や破損を防ぐことが
でき、また機能層によシ多くの半導体素子を作れるとい
う/j11来を有するものである。
Further, in the above embodiments, a case in which eight functional layers were provided was described, but it is also possible to have eight or more functional layers. - As described above, in a semiconductor device in which a silicon substrate and a functional layer are laminated, this invention provides a metal layer between the silicon substrate and the functional layer, so that the semiconductor element formed in the functional layer can be easily removed during operation. It has the following advantages: it can efficiently release the generated heat to the outside, it can prevent functional deterioration and damage of the semiconductor device due to heat, and it can make many semiconductor elements in the functional layer.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の積層型の半導体装置を示す断面図、第2
図はこの発明の一天施例による4ft層型の半導体装置
を示す新面図である。 −において(la)〜(Ill)はシリコン基板、(2
a1〜(2C)け′+II能層、(8a 3〜NIC)
は金属層である。 なお、各図中、同一符号は同一、又は相当部分を示す。 代理人  葛 野  信 −
Figure 1 is a cross-sectional view showing a conventional stacked semiconductor device;
The figure is a new view showing a 4ft layer type semiconductor device according to an embodiment of the present invention. -, (la) to (Ill) are silicon substrates, (2
a1~(2C)ke'+II functional layer, (8a 3~NIC)
is a metal layer. In each figure, the same reference numerals indicate the same or equivalent parts. Agent Shin Kuzuno −

Claims (1)

【特許請求の範囲】[Claims] シリコン基板と、多数の半導体素子が作られ、それ自体
で半導体装置としての一つの機能を有する機能軸とが複
数積層された積層′型の半導体装置において、積層構造
における各層間に金属等の熱放出層を設けたことを特徴
とする半導体装置。
In a laminated type semiconductor device, in which a silicon substrate and a plurality of functional axes are laminated, in which a large number of semiconductor elements are fabricated, and a functional axis that itself has one function as a semiconductor device is layered, heat of metal, etc. is placed between each layer in the laminated structure. A semiconductor device characterized by being provided with an emission layer.
JP19109681A 1981-11-25 1981-11-25 Semiconductor device Pending JPS5890744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19109681A JPS5890744A (en) 1981-11-25 1981-11-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19109681A JPS5890744A (en) 1981-11-25 1981-11-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5890744A true JPS5890744A (en) 1983-05-30

Family

ID=16268783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19109681A Pending JPS5890744A (en) 1981-11-25 1981-11-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5890744A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61288455A (en) * 1985-06-17 1986-12-18 Fujitsu Ltd Manufacture of multilayer semiconductor device
EP1906436A3 (en) * 2006-09-29 2008-04-09 TDK Corporation Semiconductor-embedded substrate and manufacturing method thereof
JP2009005021A (en) * 2007-06-20 2009-01-08 Panasonic Corp Radio communication terminal device, and automatic frequency controlling method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126956A (en) * 1980-03-11 1981-10-05 Fujitsu Ltd Semiconductor device
JPS5839055A (en) * 1981-08-31 1983-03-07 Matsushita Electric Ind Co Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126956A (en) * 1980-03-11 1981-10-05 Fujitsu Ltd Semiconductor device
JPS5839055A (en) * 1981-08-31 1983-03-07 Matsushita Electric Ind Co Ltd Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61288455A (en) * 1985-06-17 1986-12-18 Fujitsu Ltd Manufacture of multilayer semiconductor device
US5051865A (en) * 1985-06-17 1991-09-24 Fujitsu Limited Multi-layer semiconductor device
JPH0528503B2 (en) * 1985-06-17 1993-04-26 Fujitsu Ltd
EP1906436A3 (en) * 2006-09-29 2008-04-09 TDK Corporation Semiconductor-embedded substrate and manufacturing method thereof
JP2009005021A (en) * 2007-06-20 2009-01-08 Panasonic Corp Radio communication terminal device, and automatic frequency controlling method

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