JP2004327813A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP2004327813A
JP2004327813A JP2003122043A JP2003122043A JP2004327813A JP 2004327813 A JP2004327813 A JP 2004327813A JP 2003122043 A JP2003122043 A JP 2003122043A JP 2003122043 A JP2003122043 A JP 2003122043A JP 2004327813 A JP2004327813 A JP 2004327813A
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Japan
Prior art keywords
semiconductor chip
semiconductor device
conductor
wiring
substrate
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JP2003122043A
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Japanese (ja)
Inventor
Koichi Akagawa
宏一 赤川
Toshiaki Nagase
俊昭 長瀬
Hiroyuki Onishi
宏幸 大西
Jun Ishikawa
純 石川
Motomare Shimokawa
元希 下河
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Toyota Industries Corp
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Toyota Industries Corp
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Priority to JP2003122043A priority Critical patent/JP2004327813A/en
Publication of JP2004327813A publication Critical patent/JP2004327813A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

<P>PROBLEM TO BE SOLVED: To provide a small and inexpensive semiconductor device in which contact between a heat spreader and wiring is prevented without lowering the capacity of the heat spreader. <P>SOLUTION: A metal insulating substrate 13 is bent such that a semiconductor chip 46 and a conductor 45 being connected with wiring 48 have the same height and then an electrode on the surface of the semiconductor chip 46 is connected with the conductor 45 on the metal insulating substrate 13 such that the wiring 48 does not slack. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置に関し、特には、配線と放熱板との接触を防止することが可能な半導体装置の構造に関する。
【０００２】
【従来の技術】
図４（ａ）は、既存の半導体装置の構成を示す断面図である。
図４（ａ）に示すように、半導体装置４０は、ベース板４１と絶縁層４２とからなる金属絶縁基板４３と、金属絶縁基板４３の絶縁層４２上に設けられ、所定の電流が流れる導体４４、４５と、その所定の電流に基づいて駆動する半導体素子などが形成され所定の機能を構成する半導体チップ４６と、導体４４と半導体チップ４６との間に設けられる放熱板４７と、半導体チップ４６の表面の電極と金属絶縁基板４３上の導体４５との間を電気的に接続する配線４８とを備えて構成される。
【０００３】
このように、半導体チップ４６に発生する熱を短時間に吸収するために金属製の放熱板４７を半導体チップ４６の下に配置することが行なわれている。そして、放熱板４７は、熱の吸収率を上げるために、ある程度の厚みが必要とされる。そのため、半導体チップ４６の表面の電極と金属絶縁基板４３上の導体４５との間を配線４８により電気的に接続する場合、その放熱板４７の上部の角部（図４（ａ）の丸Ａに示す箇所）などに、配線４８が接触する可能性がある。
【０００４】
一般に、放熱板４７は、熱の吸収率を上げるために金属で形成されており、この放熱板４７に配線４８が接触した場合、放熱板４７と配線４８とが電気的にショートし、半導体チップ４６の誤動作などを引き起こしてしまうおそれがあり、半導体装置４０の故障の原因となる可能性がある。
【０００５】
そこで、放熱板４７と配線４８との接触を低減するために、放熱板４７を配線４８が接触しないような形、例えば、図４（ｂ）に示す半導体装置４９のように、放熱板４７を角錐状に加工することが行われている（例えば、特許文献１及び特許文献２参照）。このように、放熱板４７を配線４８が接触しないような形に加工することにより、放熱板４７と配線４８とが電気的にショートする可能性を低くすることができ、半導体チップ４６の誤動作などの発生を低減させることが可能となる。
【０００６】
また、放熱板４７と配線４８との接触を防止するために、放熱板４７上の半導体チップの周りに絶縁体を設け、その絶縁体の上面を経由して半導体チップ４６表面の電極と金属絶縁基板４３上の導体４５とを配線４８で接続することが行なわれている（例えば、特許文献３参照）。このように、放熱板４７上の半導体チップ４６の周りに絶縁体を設け、その絶縁体の上面を経由して半導体チップ４６表面の電極と金属絶縁基板４３上の導体４５とを配線４８で接続することにより、放熱板４７と配線４８とが電気的にショートすることを防止することができ、半導体チップ４６の誤作動などを防止することが可能となる。
【０００７】
【特許文献１】
特開平１−１７３７４５号 （第２頁、第１〜２図）
【０００８】
【特許文献２】
特開平１−３０７２５２号 （第２頁、第１図）
【０００９】
【特許文献３】
特開平９−１７２１１１号 （第４〜５頁、第１図）
【００１０】
【発明が解決しようとする課題】
しかしながら、図４（ｂ）（又は、特許文献１及び特許文献２）に示されるように、放熱板４７を角錐状に加工すると、放熱板４７の体積が図４（ａ）の放熱板４７よりも減るため、熱を吸収する能力が下がり、放熱性が低下するおそれがあるという問題がある。また、放熱板４７を角錐状に加工するため、図４（ａ）の放熱板４７を形成する場合よりもコストがかかるという問題がある。
【００１１】
また、特許文献３に示されるように、放熱板（ヒートスプレッダ６）と配線とが接触しないように、放熱板上の半導体チップ（トランジスタ８）の周りに絶縁体（絶縁板２４）を設けているため、放熱板の表面積が減り、その放熱板の熱吸収率が低下するという問題がある。また、放熱板上の半導体チップの周りに絶縁体を設けているため、半導体装置が大型化するという問題がある。
【００１２】
また、特許文献３に示されるように、放熱板と配線とが接触しないように、絶縁体の上面に設けられるワイヤ中継板２６及び２７を経由して半導体チップ表面の電極と基板上の導体（配線パターン２２及び２３）とを配線（ボンディングワイヤ２８〜３１）で接続しているため、図４（ａ）に示す半導体装置４０を形成するよりもコストがかかるという問題がある。
【００１３】
そこで、本発明は、上記問題点を考慮し、放熱部の能力を低下させることなく放熱部と配線との接触を防止すると共に、小型で、且つ、安価な半導体装置を提供することを目的とする。
【００１４】
【課題を解決するための手段】
上記の課題を解決するために本発明では、以下のような構成を採用した。
すなわち、本発明の半導体装置は、基板と、前記基板上に設けられ、所定の電流が流れる導体部と、前記導体部と配線を介して電気的に接続され、前記所定の電流に基づいて所定の機能を構成する半導体チップ部と、前記基板上と前記半導体チップ部との間に設けられ、前記半導体チップ部から発生する熱を吸収し放熱する放熱部とを備え、前記基板は、前記導体部が設けられるところが前記半導体チップ部が設けられているところより高くなるように形成されていることを特徴とする。
【００１５】
また、上記半導体装置の基板は、前記導体部が設けられているところが前記半導体チップ部が設けられているところに対して段上に形成されるように構成してもよい。
また、本発明の半導体装置は、基板と、前記基板上に設けられ、所定の電流が流れる導体部と、前記導体部と配線を介して電気的に接続され、前記所定の電流に基づいて所定の機能を構成する半導体チップ部と、前記基板上と前記半導体チップ部との間に設けられ、前記半導体チップ部から発生する熱を吸収し放熱する放熱部と、前記放熱部と前記導体部との間の前記基板上に設けられる絶縁部とを備えることを特徴とする。
【００１６】
これより、放熱部を加工することなく、放熱部と配線とが接触することを防止することができるので、放熱部の能力を下げることなく、小型で、且つ、安価な半導体装置を構成することが可能となる。
【００１７】
【発明の実施の形態】
以下、本発明の実施の形態を図面を用いて説明する。
＜第１の実施形態＞
図１は、本発明の第１の実施形態の半導体装置の構成を示す断面図である。なお、図４と同一の構成については、同一の符号を付けている。
【００１８】
図１に示すように、半導体装置１０は、ベース板１１と絶縁層１２とからなる金属絶縁基板１３（基板）と、金属絶縁基板１３の絶縁層１２上に設けられ、所定の電流が流れる導体４４、４５（導体部）と、その所定の電流に基づいて駆動する半導体素子などが形成され所定の機能を構成する半導体チップ４６（半導体チップ部）と、導体４４と半導体チップ４６との間に設けられる放熱板４７（放熱部）と、半導体チップ４６の表面の電極と金属絶縁基板１３上の導体４５との間を電気的に接続する配線４８（配線）とを備えて構成される。
【００１９】
上記半導体装置１０は、まず、金属絶縁基板１３をプレス加工などにより一部折り曲げ、金属絶縁基板１３に段差を設ける。次に、半導体チップ４６などが配置される金属絶縁基板１３より一段高くなったところに導体４５を配置し、その導体４５と半導体チップ４６とを同じ高さにする。そして、半導体チップ４６の表面の電極と金属絶縁基板１３の一段高くなったところの導体４５とにたるみが出ないように配線４８を接続する。
【００２０】
第１の実施形態の半導体装置１０の特徴とする点は、金属絶縁基板１３を折り曲げて、半導体チップ４６と、配線４８が接続される導体４５との高さを同一にし、配線４８にたるみが出ないように半導体チップ４６の表面の電極と金属絶縁基板１３上の導体４５とを電気的に接続している点である。
【００２１】
このように、金属絶縁基板１３を折り曲げて、半導体チップ４６と、配線４８が接続される導体４５との高さを同一にし、配線４８にたるみが出ないように半導体チップ４６の表面の電極と金属絶縁基板１３上の導体４５とを電気的に接続することによって、放熱板４７の上部の角部と配線４８とが接触することを防止することが可能となる。
【００２２】
また、上記半導体装置１０は、金属絶縁基板１３をプレス加工などにより折り曲げ、放熱板４７と配線４８との接触を防止しているので、図４（ｂ）に示すように、例えば、削り加工により放熱板４７を角錐状に形成する場合よりも加工にかかるコストを抑えることができる。
【００２３】
また、上記半導体装置１０は、図４（ｂ）に示すように、放熱板４７を角錐状に形成する必要がなくなるので、放熱板４７の放熱力を低下させない。
また、上記半導体装置１０は、特許文献３に示すように、放熱板４７（ヒートスプレッダ６）の上面に絶縁体を設ける必要がないので、放熱板４７の熱の吸収力を低下させない。
【００２４】
また、上記半導体装置１０は、特許文献３に示すように、放熱板４７（ヒートスプレッダ６）の上面に絶縁体を設ける必要がないので、特許文献３に示す半導体装置よりも小型化することができる。
＜第２の実施形態＞
図２は、本発明の第２の実施形態の半導体装置の構成を示す断面図である。なお、図４と同一の構成については、同一の符号を付けている。
【００２５】
図２に示すように、半導体装置２０は、ベース板４１と絶縁層４２とからなる金属絶縁基板４３と、金属絶縁基板４３の絶縁層４２上に設けられ、所定の電流が流れる導体４４、４５と、その所定の電流に基づいて駆動する半導体素子などが形成され所定の機能を構成する半導体チップ４６と、導体４４と半導体チップ４６との間に設けられる放熱板４７と、半導体チップ４６の表面の電極と金属絶縁基板１３上の導体４５との間を電気的に接続する配線４８と、金属絶縁基板１３上に配置される樹脂壁２１（絶縁部）とを備えて構成される。なお、樹脂壁２１は、半導体装置２０のまわりに形成されるケースと同じ材質の樹脂部材（絶縁体部材）で形成され、そのケースを形成する工程と同じ工程で形成する場合は、樹脂壁２１を形成する際のコストと時間を低減させることができる。
【００２６】
第２の実施形態の半導体装置２０の特徴とする点は、放熱板４７の上面と同じ高さか、或いは放熱板４７の上面よりも高い樹脂壁２１を放熱板４７と導体４５との間の金属絶縁基板４３上に配置する点である。なお、放熱板４７及び樹脂壁２１は、放熱板４７に配線４８が接触しなければ、接していても離れていてもよい。また、樹脂壁２１は、金属絶縁基板４３上に接着してもよい。
【００２７】
このように、放熱板４７と導体４５との間の金属絶縁基板４３上に樹脂壁２１を配置することによって、放熱板４７の上部の角部と配線４８とが接触することを防止することが可能となる。
また、上記半導体装置２０は、半導体装置２０のまわりに形成されるケースと同じ材質の絶縁部材で形成することにより、図４（ｂ）に示すように、例えば、削り加工により放熱板４７を角錐状に形成する場合よりも加工にかかるコストを抑えることができる。
【００２８】
また、上記半導体装置２０は、図４（ｂ）に示すように、放熱板４７を角錐状に形成する必要がなくなるので、放熱板４７の放熱力を低下させない。
また、上記半導体装置２０は、特許文献３に示すように、放熱板４７（ヒートスプレッダ６）の上面に絶縁体を設ける必要がないので、放熱板４７の熱の吸収力を低下させない。
【００２９】
また、上記半導体装置２０は、特許文献３に示すように、放熱板４７（ヒートスプレッダ６）の上面に絶縁体を設ける必要がないので、特許文献３に示す半導体装置よりも小型化することができる。
＜その他の実施形態＞
本発明は、上記実施の形態に限定されるものではなく、各請求項に記載した範囲において、種々の構成を採用可能である。例えば、以下のような構成変更も可能である。
【００３０】
（１）上記第１の実施形態における半導体装置１０では、半導体チップ４６と、配線４８が接続される導体４５とが同一平面上となるように、その導体４５が配置されるところを半導体チップ４６が配置されるところよりも高くしているが、放熱板４７と配線４８とが接触しなければ、その導体４５が配置されるところの金属絶縁基板１３の高さは、半導体チップ４６よりも多少高くても低くてもよい。
【００３１】
（２）上記第２の実施形態における半導体装置２０では、樹脂壁２１を放熱板４７の上面と同じ高さか、或いは放熱板４７の上面よりも高くなるように形成しているが、放熱板４７と配線４８とが接触しなければ、その樹脂壁２１の高さは、放熱板４７の上面よりも多少低くてもよい。
【００３２】
（３）上記第１の実施形態における半導体装置１０では、金属絶縁基板１３上に放熱板４７や導体４５などを配置する構成であるが、図３（ａ）に示す半導体装置３０のように、金属絶縁基板１３のかわりに、導体３１とセラミック製絶縁板３２とからなるセラミック絶縁基板３３を使用し、そのセラミック絶縁基板３３に放熱板４７や導体４５などを配置する構成としてもよい。このとき、セラミック絶縁基板３３は、複数のセラミック絶縁基板３３を接着することなどによって構成し所定の高さの段差を形成してもよい。
【００３３】
（４）上記第２の実施形態における半導体装置２０では、金属絶縁基板１３上に放熱板４７や樹脂壁２１などを配置する構成であるが、図３（ｂ）に示す半導体装置３４のように、金属絶縁基板４３のかわりに、導体３５とセラミック製絶縁板３６とからなるセラミック絶縁基板３７上に放熱板４７や導体４５などを配置する構成としてもよい。
【００３４】
（５）また、上記樹脂壁２１は、絶縁性部材で構成されていれば、その材質や形は限定されない。
【００３５】
【発明の効果】
以上、本発明によれば、安価で、且つ、放熱部の能力を下げることなく放熱部と配線との接触を防止すると共に、小型で、且つ、安価な半導体装置を構成することが可能となる。
【図面の簡単な説明】
【図１】本発明の実施形態の半導体装置の構成を示す断面図である。
【図２】本発明の他の実施形態の半導体装置の構成を示す断面図である。
【図３】本発明の他の実施形態の半導体装置の構成を示す断面図である。
【図４】従来の半導体装置の構成を示す断面図である。
【符号の説明】
１０ 半導体装置
１１ ベース板
１２ 絶縁層
１３ 金属絶縁基板
２０ 半導体装置
２１ 樹脂壁
３０ 半導体装置
３１ 導体
３２ セラミック製絶縁板
３３ セラミック絶縁基板
３４ 半導体装置
３５ 導体
３６ セラミック製絶縁板
３７ セラミック絶縁基板
４０ 半導体装置
４１ ベース板
４２ 絶縁層
４３ 金属絶縁基板
４４、４５ 導体
４６ 半導体チップ
４７ 放熱板
４８ 配線
４９ 半導体装置[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a structure of a semiconductor device capable of preventing contact between wiring and a heat sink.
[0002]
[Prior art]
FIG. 4A is a cross-sectional view showing a configuration of an existing semiconductor device.
As shown in FIG. 4A, the semiconductor device 40 includes a metal insulating substrate 43 composed of a base plate 41 and an insulating layer 42, and a conductor that is provided on the insulating layer 42 of the metal insulating substrate 43 and through which a predetermined current flows. 44, 45, a semiconductor chip 46 that has a predetermined function formed by a semiconductor element that is driven based on the predetermined current, a heat dissipation plate 47 that is provided between the conductor 44 and the semiconductor chip 46, and a semiconductor chip The wiring 46 which electrically connects between the electrode of the surface of 46, and the conductor 45 on the metal insulation board | substrate 43 is comprised.
[0003]
As described above, in order to absorb heat generated in the semiconductor chip 46 in a short time, the metal heat radiating plate 47 is disposed under the semiconductor chip 46. And the heat sink 47 needs a certain thickness in order to raise the heat absorption rate. Therefore, when the electrode on the surface of the semiconductor chip 46 and the conductor 45 on the metal insulating substrate 43 are electrically connected by the wiring 48, the upper corner portion of the heat radiating plate 47 (circle A in FIG. 4A). There is a possibility that the wiring 48 comes into contact with the portion shown in FIG.
[0004]
Generally, the heat radiating plate 47 is made of metal in order to increase the heat absorption rate. When the wiring 48 comes into contact with the heat radiating plate 47, the heat radiating plate 47 and the wiring 48 are electrically short-circuited, and the semiconductor chip. 46 may cause a malfunction of the semiconductor device 40, which may cause a failure of the semiconductor device 40.
[0005]
Therefore, in order to reduce the contact between the heat sink 47 and the wiring 48, the heat sink 47 is formed in such a shape that the wiring 48 does not contact, for example, as in the semiconductor device 49 shown in FIG. Processing into a pyramid shape is performed (see, for example, Patent Document 1 and Patent Document 2). Thus, by processing the heat sink 47 so that the wiring 48 is not in contact, the possibility that the heat sink 47 and the wiring 48 are electrically short-circuited can be reduced, and the semiconductor chip 46 can malfunction. It is possible to reduce the occurrence of.
[0006]
In addition, in order to prevent contact between the heat sink 47 and the wiring 48, an insulator is provided around the semiconductor chip on the heat sink 47, and the electrode on the surface of the semiconductor chip 46 and the metal insulation via the upper surface of the insulator. The conductor 45 on the substrate 43 is connected by a wiring 48 (see, for example, Patent Document 3). Thus, an insulator is provided around the semiconductor chip 46 on the heat sink 47, and the electrode on the surface of the semiconductor chip 46 and the conductor 45 on the metal insulating substrate 43 are connected by the wiring 48 via the upper surface of the insulator. By doing so, it is possible to prevent the heat dissipation plate 47 and the wiring 48 from being electrically short-circuited, and to prevent malfunction of the semiconductor chip 46 and the like.
[0007]
[Patent Document 1]
JP-A-1-173745 (Page 2, FIGS. 1-2)
[0008]
[Patent Document 2]
JP-A-1-307252 (Page 2, Fig. 1)
[0009]
[Patent Document 3]
JP-A-9-172111 (pages 4-5, FIG. 1)
[0010]
[Problems to be solved by the invention]
However, as shown in FIG. 4B (or Patent Document 1 and Patent Document 2), when the heat sink 47 is processed into a pyramid shape, the volume of the heat sink 47 is larger than that of the heat sink 47 of FIG. Therefore, there is a problem in that the ability to absorb heat is reduced and heat dissipation may be reduced. Further, since the heat radiating plate 47 is processed into a pyramid shape, there is a problem that the cost is higher than the case of forming the heat radiating plate 47 of FIG.
[0011]
Further, as disclosed in Patent Document 3, an insulator (insulating plate 24) is provided around the semiconductor chip (transistor 8) on the heat sink so that the heat sink (heat spreader 6) and the wiring do not contact each other. Therefore, there is a problem that the surface area of the heat sink is reduced and the heat absorption rate of the heat sink is reduced. Further, since the insulator is provided around the semiconductor chip on the heat sink, there is a problem that the semiconductor device is increased in size.
[0012]
Moreover, as shown in Patent Document 3, the electrodes on the surface of the semiconductor chip and the conductors on the substrate (via the wire relay plates 26 and 27 provided on the upper surface of the insulator are provided so that the heat sink and the wiring do not contact each other. Since the wiring patterns 22 and 23) are connected by wiring (bonding wires 28 to 31), there is a problem that the cost is higher than that of forming the semiconductor device 40 shown in FIG.
[0013]
In view of the above problems, the present invention has an object to provide a semiconductor device that is small and inexpensive while preventing contact between the heat dissipation portion and the wiring without reducing the capability of the heat dissipation portion. To do.
[0014]
[Means for Solving the Problems]
In order to solve the above problems, the present invention adopts the following configuration.
In other words, the semiconductor device of the present invention is provided on a substrate, a conductor portion that is provided on the substrate and through which a predetermined current flows, and is electrically connected to the conductor portion via a wiring, and is predetermined based on the predetermined current. A semiconductor chip part that constitutes the function of the semiconductor chip, and a heat dissipating part that is provided between the semiconductor chip part and the semiconductor chip part to absorb and dissipate heat generated from the semiconductor chip part. The portion provided is formed so as to be higher than the portion where the semiconductor chip portion is provided.
[0015]
Further, the substrate of the semiconductor device may be configured such that the portion where the conductor portion is provided is formed on a step with respect to the portion where the semiconductor chip portion is provided.
Further, the semiconductor device of the present invention is provided on the substrate, the conductor portion provided on the substrate, through which a predetermined current flows, and electrically connected to the conductor portion via the wiring, and is predetermined based on the predetermined current. A semiconductor chip part that constitutes the function, a heat dissipating part that is provided on the substrate and between the semiconductor chip part and absorbs and dissipates heat generated from the semiconductor chip part, and the heat dissipating part and the conductor part And an insulating portion provided on the substrate.
[0016]
As a result, it is possible to prevent the heat radiating portion and the wiring from coming into contact without processing the heat radiating portion, so that a small and inexpensive semiconductor device can be configured without reducing the capability of the heat radiating portion. Is possible.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First Embodiment>
FIG. 1 is a cross-sectional view showing the configuration of the semiconductor device according to the first embodiment of the present invention. In addition, the same code | symbol is attached | subjected about the structure same as FIG.
[0018]
As shown in FIG. 1, a semiconductor device 10 includes a metal insulating substrate 13 (substrate) including a base plate 11 and an insulating layer 12, and a conductor that is provided on the insulating layer 12 of the metal insulating substrate 13 and through which a predetermined current flows. 44, 45 (conductor portion), a semiconductor chip or the like that is driven based on the predetermined current, and a semiconductor chip 46 (semiconductor chip portion) having a predetermined function, and between the conductor 44 and the semiconductor chip 46 A heat radiating plate 47 (heat radiating portion) is provided, and wiring 48 (wiring) that electrically connects the electrode on the surface of the semiconductor chip 46 and the conductor 45 on the metal insulating substrate 13 is configured.
[0019]
In the semiconductor device 10, first, the metal insulating substrate 13 is partially bent by pressing or the like, and a step is provided on the metal insulating substrate 13. Next, the conductor 45 is disposed at a level higher than the metal insulating substrate 13 on which the semiconductor chip 46 and the like are disposed, and the conductor 45 and the semiconductor chip 46 are set to the same height. Then, the wiring 48 is connected so that no slack is produced between the electrode on the surface of the semiconductor chip 46 and the conductor 45 at a level higher than the metal insulating substrate 13.
[0020]
The feature of the semiconductor device 10 of the first embodiment is that the metal insulating substrate 13 is bent so that the heights of the semiconductor chip 46 and the conductor 45 to which the wiring 48 is connected are the same. This is because the electrode on the surface of the semiconductor chip 46 and the conductor 45 on the metal insulating substrate 13 are electrically connected so as not to come out.
[0021]
In this way, the metal insulating substrate 13 is bent so that the height of the semiconductor chip 46 and the conductor 45 to which the wiring 48 is connected are the same, and the electrodes on the surface of the semiconductor chip 46 are prevented from sagging in the wiring 48. By electrically connecting the conductor 45 on the metal insulating substrate 13, it is possible to prevent the upper corner portion of the heat radiating plate 47 and the wiring 48 from contacting each other.
[0022]
Further, since the semiconductor device 10 bends the metal insulating substrate 13 by press working or the like to prevent the heat sink 47 and the wiring 48 from contacting each other, as shown in FIG. The processing cost can be reduced as compared with the case where the heat radiating plate 47 is formed in a pyramid shape.
[0023]
Further, as shown in FIG. 4B, the semiconductor device 10 does not need to form the heat radiating plate 47 in a pyramid shape, so that the heat radiating power of the heat radiating plate 47 is not reduced.
In addition, as shown in Patent Document 3, the semiconductor device 10 does not need to provide an insulator on the upper surface of the heat radiating plate 47 (heat spreader 6), and thus does not reduce the heat absorption capability of the heat radiating plate 47.
[0024]
Further, as shown in Patent Document 3, the semiconductor device 10 does not need to be provided with an insulator on the upper surface of the heat radiating plate 47 (heat spreader 6), and thus can be made smaller than the semiconductor device shown in Patent Document 3. .
<Second Embodiment>
FIG. 2 is a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment of the present invention. In addition, the same code | symbol is attached | subjected about the structure same as FIG.
[0025]
As shown in FIG. 2, the semiconductor device 20 includes a metal insulating substrate 43 including a base plate 41 and an insulating layer 42, and conductors 44 and 45 provided on the insulating layer 42 of the metal insulating substrate 43 and through which a predetermined current flows. A semiconductor chip 46 formed on the basis of the predetermined current to form a predetermined function, a heat sink 47 provided between the conductor 44 and the semiconductor chip 46, and the surface of the semiconductor chip 46. Wiring 48 that electrically connects between the electrode and the conductor 45 on the metal insulating substrate 13, and a resin wall 21 (insulating portion) disposed on the metal insulating substrate 13. The resin wall 21 is formed of a resin member (insulator member) made of the same material as the case formed around the semiconductor device 20. When the resin wall 21 is formed in the same process as the process of forming the case, the resin wall 21 is formed. Cost and time for forming the film can be reduced.
[0026]
The feature of the semiconductor device 20 of the second embodiment is that the metal wall between the heat sink 47 and the conductor 45 is made of a resin wall 21 that is the same height as the upper surface of the heat sink 47 or higher than the upper surface of the heat sink 47. It is a point arranged on the insulating substrate 43. Note that the heat sink 47 and the resin wall 21 may be in contact or separated as long as the wiring 48 does not contact the heat sink 47. Further, the resin wall 21 may be bonded onto the metal insulating substrate 43.
[0027]
As described above, by arranging the resin wall 21 on the metal insulating substrate 43 between the heat sink 47 and the conductor 45, it is possible to prevent the upper corner portion of the heat sink 47 and the wiring 48 from contacting each other. It becomes possible.
Further, the semiconductor device 20 is formed of an insulating member made of the same material as the case formed around the semiconductor device 20, so that, for example, as shown in FIG. The processing cost can be reduced as compared with the case of forming the shape.
[0028]
Further, as shown in FIG. 4B, the semiconductor device 20 does not need to form the heat radiating plate 47 in the shape of a pyramid, so that the heat radiating power of the heat radiating plate 47 is not reduced.
Further, as shown in Patent Document 3, the semiconductor device 20 does not need to provide an insulator on the upper surface of the heat radiating plate 47 (heat spreader 6), and therefore does not reduce the heat absorption capability of the heat radiating plate 47.
[0029]
Further, as shown in Patent Document 3, the semiconductor device 20 does not need to be provided with an insulator on the upper surface of the heat radiating plate 47 (heat spreader 6), and therefore can be made smaller than the semiconductor device shown in Patent Document 3. .
<Other embodiments>
The present invention is not limited to the above-described embodiments, and various configurations can be employed within the scope described in each claim. For example, the following configuration changes are possible.
[0030]
(1) In the semiconductor device 10 according to the first embodiment, the semiconductor chip 46 and the conductor 45 to which the wiring 48 is connected are disposed on the same plane so that the semiconductor chip 46 and the conductor 45 are arranged on the same plane. However, if the heat sink 47 and the wiring 48 are not in contact with each other, the height of the metal insulating substrate 13 where the conductor 45 is disposed is slightly higher than that of the semiconductor chip 46. It can be high or low.
[0031]
(2) In the semiconductor device 20 in the second embodiment, the resin wall 21 is formed to be the same height as the upper surface of the heat sink 47 or higher than the upper surface of the heat sink 47. If the wiring 48 is not in contact with the wiring 48, the height of the resin wall 21 may be slightly lower than the upper surface of the heat sink 47.
[0032]
(3) The semiconductor device 10 according to the first embodiment has a configuration in which the heat radiating plate 47 and the conductor 45 are arranged on the metal insulating substrate 13, but like the semiconductor device 30 shown in FIG. Instead of the metal insulating substrate 13, a ceramic insulating substrate 33 including a conductor 31 and a ceramic insulating plate 32 may be used, and a heat radiating plate 47, a conductor 45, and the like may be disposed on the ceramic insulating substrate 33. At this time, the ceramic insulating substrate 33 may be formed by bonding a plurality of ceramic insulating substrates 33 or the like to form a step having a predetermined height.
[0033]
(4) The semiconductor device 20 in the second embodiment has a configuration in which the heat sink 47, the resin wall 21 and the like are arranged on the metal insulating substrate 13, but like the semiconductor device 34 shown in FIG. Instead of the metal insulating substrate 43, a heat radiating plate 47, a conductor 45, etc. may be arranged on a ceramic insulating substrate 37 composed of the conductor 35 and the ceramic insulating plate 36.
[0034]
(5) Moreover, if the said resin wall 21 is comprised with the insulating member, the material and shape will not be limited.
[0035]
【The invention's effect】
As described above, according to the present invention, it is possible to form a semiconductor device that is inexpensive and that prevents contact between the heat radiation part and the wiring without lowering the capacity of the heat radiation part, and that is small and inexpensive. .
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view showing a configuration of a semiconductor device according to another embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a configuration of a semiconductor device according to another embodiment of the present invention.
FIG. 4 is a cross-sectional view showing a configuration of a conventional semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Semiconductor device 11 Base plate 12 Insulating layer 13 Metal insulating substrate 20 Semiconductor device 21 Resin wall 30 Semiconductor device 31 Conductor 32 Ceramic insulating plate 33 Ceramic insulating substrate 34 Semiconductor device 35 Conductor 36 Ceramic insulating plate 37 Ceramic insulating substrate 40 Semiconductor device 41 Base plate 42 Insulating layer 43 Metal insulating substrate 44, 45 Conductor 46 Semiconductor chip 47 Heat sink 48 Wiring 49 Semiconductor device

Claims (3)

基板と、
前記基板上に設けられ、所定の電流が流れる導体部と、
前記導体部と配線を介して電気的に接続され、前記所定の電流に基づいて所定の機能を構成する半導体チップ部と、
前記基板上と前記半導体チップ部との間に設けられ、前記半導体チップ部から発生する熱を吸収し放熱する放熱部と、
を備え、
前記基板は、前記導体部が設けられるところが前記半導体チップ部が設けられているところより高くなるように形成されていることを特徴とする半導体装置。A substrate,
A conductor portion provided on the substrate and through which a predetermined current flows;
A semiconductor chip part that is electrically connected to the conductor part via a wiring and constitutes a predetermined function based on the predetermined current;
A heat dissipating part that is provided between the substrate and the semiconductor chip part and absorbs and dissipates heat generated from the semiconductor chip part;
With
2. The semiconductor device according to claim 1, wherein the substrate is formed such that the portion where the conductor portion is provided is higher than the portion where the semiconductor chip portion is provided. 請求項１に記載の半導体装置であって、
前記基板は、前記導体部が設けられているところが前記半導体チップ部が設けられているところに対して段上に形成されていることを特徴とする半導体装置。The semiconductor device according to claim 1,
2. The semiconductor device according to claim 1, wherein the substrate is formed on a stage where the conductor portion is provided with respect to where the semiconductor chip portion is provided. 基板と、
前記基板上に設けられ、所定の電流が流れる導体部と、
前記導体部と配線を介して電気的に接続され、前記所定の電流に基づいて所定の機能を構成する半導体チップ部と、
前記基板上と前記半導体チップ部との間に設けられ、前記半導体チップ部から発生する熱を吸収し放熱する放熱部と、
前記放熱部と前記導体部との間の前記基板上に設けられる絶縁部と、
を備えることを特徴とする半導体装置。A substrate,
A conductor portion provided on the substrate and through which a predetermined current flows;
A semiconductor chip part that is electrically connected to the conductor part via a wiring and constitutes a predetermined function based on the predetermined current;
A heat dissipating part that is provided between the substrate and the semiconductor chip part and absorbs and dissipates heat generated from the semiconductor chip part;
An insulating portion provided on the substrate between the heat radiating portion and the conductor portion;
A semiconductor device comprising:
JP2003122043A 2003-04-25 2003-04-25 Semiconductor device Pending JP2004327813A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003122043A JP2004327813A (en) 2003-04-25 2003-04-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2004327813A true JP2004327813A (en) 2004-11-18

Family

ID=33500409

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2004327813A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158544A (en) * 2007-12-25 2009-07-16 Fuji Electric Systems Co Ltd Method of cooling mounted component
JP2012186273A (en) * 2011-03-04 2012-09-27 Denso Corp Semiconductor device, metal block and manufacturing method of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158544A (en) * 2007-12-25 2009-07-16 Fuji Electric Systems Co Ltd Method of cooling mounted component
JP2012186273A (en) * 2011-03-04 2012-09-27 Denso Corp Semiconductor device, metal block and manufacturing method of the same

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