JPS5888415U - amplifier circuit - Google Patents
amplifier circuitInfo
- Publication number
- JPS5888415U JPS5888415U JP18479981U JP18479981U JPS5888415U JP S5888415 U JPS5888415 U JP S5888415U JP 18479981 U JP18479981 U JP 18479981U JP 18479981 U JP18479981 U JP 18479981U JP S5888415 U JPS5888415 U JP S5888415U
- Authority
- JP
- Japan
- Prior art keywords
- amplifier circuit
- output load
- transistor
- output
- muting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来回路を示す図、第２図は第１図の動作波形
図で、ａはＩＣ出力端の出力電圧レベル、ｂは出力負荷
の入力波形、第３図は本考案回路を 。
示す図である。
４・・・スピーカ（出力負荷）、５・・・制御回路、Ｔ
ｒｌ・・・第１トランジスタ。FIG. 1 is a diagram showing the conventional circuit, FIG. 2 is an operating waveform diagram of FIG. 1, where a is the output voltage level at the IC output terminal, b is the input waveform of the output load, and FIG. 3 is the circuit of the present invention. FIG. 4... Speaker (output load), 5... Control circuit, T
rl...first transistor.
Claims (1)
回路の出力端に接続された出力負荷と、該出力負荷と接
地間に接続されたトランジスタと、該トランジスタを制
御する制御回路とを備え、゛ ミューティングをか
けていない際には前記制御回路にて前記トランジスタを
導通せしめ、以って前記増幅回路の出力を前記出力負荷
に供給するようになし、 ミューティングをかけた際には前記制御回路にて前記ト
ランジスタを非導通にし、以って前記出力負荷に入力が
供給されるのを阻止するようにしたことを特徴とする増
幅回路。[Claims for Utility Model Registration] In an amplifier circuit having a muting function, an output load connected to the output terminal of the amplifier circuit, a transistor connected between the output load and ground, and controlling the transistor. and a control circuit to conduct muting, wherein the control circuit makes the transistor conductive when muting is not applied, thereby supplying the output of the amplifier circuit to the output load, 2. An amplifier circuit according to claim 1, wherein when the output load is applied, the control circuit makes the transistor non-conductive, thereby preventing input from being supplied to the output load.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18479981U JPS5888415U (en) | 1981-12-10 | 1981-12-10 | amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18479981U JPS5888415U (en) | 1981-12-10 | 1981-12-10 | amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5888415U true JPS5888415U (en) | 1983-06-15 |
Family
ID=29985274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18479981U Pending JPS5888415U (en) | 1981-12-10 | 1981-12-10 | amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5888415U (en) |
-
1981
- 1981-12-10 JP JP18479981U patent/JPS5888415U/en active Pending
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