JPS5884513A - Gain controlling amplifier - Google Patents

Gain controlling amplifier

Info

Publication number
JPS5884513A
JPS5884513A JP18211081A JP18211081A JPS5884513A JP S5884513 A JPS5884513 A JP S5884513A JP 18211081 A JP18211081 A JP 18211081A JP 18211081 A JP18211081 A JP 18211081A JP S5884513 A JPS5884513 A JP S5884513A
Authority
JP
Japan
Prior art keywords
distortion
gain
variable
circuit
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18211081A
Other languages
Japanese (ja)
Other versions
JPH0244166B2 (en
Inventor
Toshihiko Kono
河野 俊彦
Kenji Yokoyama
健司 横山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Gakki Co Ltd
Original Assignee
Nippon Gakki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Gakki Co Ltd filed Critical Nippon Gakki Co Ltd
Priority to JP18211081A priority Critical patent/JPS5884513A/en
Publication of JPS5884513A publication Critical patent/JPS5884513A/en
Publication of JPH0244166B2 publication Critical patent/JPH0244166B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0035Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
    • H03G1/0052Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using diodes

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain a gain controlling amplifier with very little distortion, by inserting a distortion cancelling circuit consisting of a semiconductor rectifier in a path of an amplifier signal having a variable current source changing a common emitter current of transistors (TRs) depending on a control voltage. CONSTITUTION:In a distortion cancelling circuit 2, a DC blocking capacitor (C) 18a and a diode (D) 14a are inserted in series between a signal input terminal 15 and a resistor (R) 16 and in parallel with them, a DC blocking C18b and D14b are inserted in series. A connecting point between the C18a and the D14a is connected to a positive power supply 9 via an R19a and a variable R20a. Further, a connecting point between the C18b and the D14b is connected to a negative power supply terminal 6 via an R19b and a variable registor 20b. In a variable gain amplifier 1, the emitter of TRs 3, 4 is connected in common via Ds 21, 22 and to the terminal 6 via a TR23 and an R24. A part consisting of the TR23 and R24 and a part consisting of a TR25 and an R26 constitute a current mirror circuit. Thus, the distortion in the circuit 1 can be cancelled at the circuit 2.

Description

【発明の詳細な説明】 この発明は、制御電圧等の利得制御信号に応じて利得が
直線的に変化きせる利得制御増幅器に関Tる。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gain control amplifier whose gain can vary linearly in response to a gain control signal such as a control voltage.

この種の利得制御増幅器は、その目的か利得【変化させ
ることにある関係上、通−一遍III威がとられている
。このためこの種の利得制御層11il器は一般に極め
て歪が大きいという欠点な有しており(例えば全高調波
歪はQ/襲程度である)、シたがって高忠実度が要求さ
れるオーディオ分野等においては−を子ボリューム等と
して使用Tることは不適当であった〇 この発明は上述した事情に鑑みてなされたもので、その
目的とするところは無帰還構成でありながら極めて歪が
小す<、シたかつてオーディオ機器用の電子プリューム
としても使用し得る利得制御増幅器W:提供Tることに
ある。この目的を達成させるためにこの発明による利得
制御増幅器は、差動tagされたトランジスタと、これ
らのトランジスタの共通工考ツタ電流【制御電圧に応じ
て変化させる可変電流源と【有してなる可変利得増幅部
の入力信号経路に、互いに電流方向な遂にしかつ並列接
続きれた少なくともl対の半導体整流素子からなる歪打
消し回路を介挿し、可変利得増幅部の歪【歪打消し回路
が発生Tる歪によって相殺Tるようにしたものである。
This type of gain control amplifier is generally used as a gain control amplifier because its purpose is to change the gain. For this reason, this type of gain control layer 11Il device generally has the disadvantage of extremely high distortion (for example, the total harmonic distortion is on the order of Q/A), and is therefore used in the audio field where high fidelity is required. etc., it was inappropriate to use - as a child volume, etc. This invention was made in view of the above circumstances, and its purpose is to create a non-feedback configuration with extremely low distortion. The present invention provides a gain control amplifier W which can also be used as an electronic plume for audio equipment. In order to achieve this object, the gain control amplifier according to the present invention comprises differentially tagged transistors, a variable current source that varies in accordance with a control voltage, and a common construction of these transistors. A distortion canceling circuit consisting of at least l pairs of semiconductor rectifiers connected in parallel and in the current direction is inserted in the input signal path of the gain amplifying section to eliminate distortion in the variable gain amplifying section. This is so that the distortion T is canceled out by the distortion T.

以下、との斃明の実施例IWJ面【参照して詳細に説明
Tる。IIIIWJは、この侮明による利得制御増幅器
の基本構成ks入力信号が正である場合について示した
回路図である。この図において、符号lは可変利得増幅
部な示し、また符号2は歪打消し回路【示している。可
変利得増幅ILLにおいて、8.4は差動柳aされたト
ランジスタであり、共にNPN )ランジスタからなる
◎これらのトランジスタ8.4の両エミッタは共通!I
続されると共に、可愛電流源5を介して負電源端子6(
電源電圧は−Vcc)に**されている・この可愛電流
源5の電流!、は1制御久方端子5mに印加される制御
電圧Vc(利得制御信号)□に比例して変化Tるように
なっている。トランジスタ8のコレクタは、演算増幅器
7の反転入力端子に**されると共に、抵抗8t−介し
て正電源端子1(電源電圧は+Vcc)に接続されてい
る。トランジスタ番のペースは抵抗1Ort介して接地
され、同トランジスターのコレクタは演算増幅器7の非
反転入力端子&:接続されると共に、抵抗11t−介し
て正電源端子9に接続されている◎演算増幅器7の非反
転入力端子は抵抗12t−介して接地され、同演算増幅
器7の出力端子番よ、信号出力端子1Bに接続されると
共に1帰還抵抗14を介して同演算増幅器7の反転入力
端子&:11続されている。
Hereinafter, a detailed explanation will be given with reference to an embodiment of the IWJ surface. IIIWJ is a circuit diagram illustrating the basic configuration of the gain control amplifier according to this explanation in the case where the ks input signal is positive. In this figure, reference numeral 1 indicates a variable gain amplifier, and reference numeral 2 indicates a distortion canceling circuit. In the variable gain amplification ILL, 8.4 is a differential transistor, both of which are NPN (NPN) transistors. Both emitters of these transistors 8.4 are common! I
At the same time, the negative power terminal 6 (
The power supply voltage is set to -Vcc) ・The current of this cute current source 5! , change T in proportion to the control voltage Vc (gain control signal) □ applied to the first control terminal 5m. The collector of the transistor 8 is connected to the inverting input terminal of the operational amplifier 7, and is also connected to the positive power supply terminal 1 (the power supply voltage is +Vcc) via a resistor 8t-. The pace of the transistor number is grounded through the resistor 1Ort, and the collector of the transistor is connected to the non-inverting input terminal &: of the operational amplifier 7, and is also connected to the positive power supply terminal 9 through the resistor 11t.◎Operation amplifier 7 The non-inverting input terminal of the operational amplifier 7 is grounded through the resistor 12t, and connected to the signal output terminal 1B of the operational amplifier 7 through the feedback resistor 14. 11 consecutive.

また−歪消し回路8において、l−はダイオード(半導
体整流素子)であり、このダイオード14の7ノードは
信号入力端子16&:接続され、同ダイオード16のカ
ソードは抵抗16.17を順次介して接地されている。
In addition, in the distortion canceling circuit 8, l- is a diode (semiconductor rectifying element), and the 7 nodes of this diode 14 are connected to the signal input terminal 16&:, and the cathode of the diode 16 is connected to the ground via a resistor 16.17 in sequence. has been done.

そして抵抗16.l?の接続点は前記トランジスタ8の
ペースに接続されている。
and resistance 16. l? The connection point of is connected to the pace of the transistor 8.

次に、以上の構成になるこの利得制御増幅器の動作を説
明Tる。
Next, the operation of this gain control amplifier having the above configuration will be explained.

まず、可変利得増幅1%lの動作から譚明■る。First, we will explain the operation of a 1% variable gain amplification.

今歪打消し回路塾における抵抗16.l?の接続点から
シラレジスタ80ベースに供給される信号の電圧IVa
、信号出力端子1Bに得られる出力信号の電圧【v@と
Tる。ここで、制御電圧Vcがある一定の値であり、し
たかって亀流工・か一定である場合【考えると111圧
■oの電圧VJIに対する変化率1Tなわち可変利得増
幅11−利得Gi(ここでGt=h)の特性曲線は、1
11図のttinaaのようになる。Tなゎちこの場合
、可変利得増幅1111の利得q1は、トランジスタ8
.−の各ペースエミッタ間電圧の作用により、電圧Va
が増加Tるに従かい減少Tるような非線形特性な示T0
そして、制御電圧Vcを変化ぎせた場合は、電流I、が
変化Tるから、利得G、は前記非線形特性管持った倉!
、IIJtmの破線b(電圧Vcが増加した場合)ある
いは破11c (電圧Vcが減少した場合)のように、
制御電圧Vcに応じて直線−2的に変化Tる。
Resistance 16 in Distortion Cancellation Circuit School now. l? The voltage IVa of the signal supplied from the connection point to the base of the sill resistor 80
, the voltage of the output signal obtained at the signal output terminal 1B [v@ and T]. Here, if the control voltage Vc is a certain value, and therefore the control voltage is constant, then the rate of change of 111 voltage o with respect to voltage VJI is 1T, that is, variable gain amplification 11 - gain Gi (here The characteristic curve of Gt=h) is 1
It will look like ttinaa in Figure 11. In this case, the gain q1 of the variable gain amplifier 1111 is the same as that of the transistor 8.
.. - due to the action of the voltage between each pace emitter, the voltage Va
It is a nonlinear characteristic that T0 decreases as T increases.
If the control voltage Vc is changed, the current I will change T, so the gain G will be the same as that of the nonlinear characteristic tube.
, IIJtm, as shown by broken line b (when voltage Vc increases) or broken line 11c (when voltage Vc decreases),
T changes linearly in accordance with the control voltage Vc.

次に、歪打消し回路8において、ダイオード16の順方
向抵抗1dは113図に示Tように1同ダイオードt4
Iの順方向電圧Vdが増加Tると減少Tるから一電圧V
aの入力信号の電圧Viに対Tる変化率、Tなわち歪打
消し回路8の利得G、  tここで電== ’ 7 >
の特性−mは、ll!亭図に示Tようになる。Tなわち
この場合、歪打消し回路2の利得G!は、ダイオード1
4の作用により、電圧Viが増加Tるに従かい増加Tる
ような非線形特性【示し、しかもこの非線形特性は、前
述した可変利得増幅mlにおける利得G1の非線形特性
とは逆関係となる。
Next, in the distortion canceling circuit 8, the forward resistance 1d of the diode 16 is equal to the diode t4 as shown in FIG.
When the forward voltage Vd of I increases T, it decreases T, so one voltage V
The rate of change of T with respect to the voltage Vi of the input signal of a, T, that is, the gain G of the distortion canceling circuit 8, t where electric == ' 7 >
The property of −m is ll! It will look like T shown in the bower diagram. T, that is, in this case, the gain G of the distortion canceling circuit 2! is diode 1
Due to the action of 4, a nonlinear characteristic is shown in which the voltage Vi increases as T increases, and this nonlinear characteristic has an inverse relationship to the nonlinear characteristic of the gain G1 in the variable gain amplification ml described above.

以上の結果1利得G、と利得G、との積として!!され
るこの利得制御増幅器の全体の利得q(ここで””v’
r’は、利得G、の非銀形8と1利得G、の非銀形ぎが
相殺されて、路線形となる・このように、この第1図に
示T基本構成によれば、無帰還簿膜でありながら、歪が
極めて小ざい利得制御増幅器管実現Tることができる。
As the product of the above result 1 gain G and gain G! ! The overall gain q of this gain-controlled amplifier (where ""v'
The non-silver type 8 of the gain G and the non-silver type of the gain G of 1 cancel each other out, resulting in a linear form.Thus, according to the basic configuration of T shown in FIG. Although it is a feedback film, it is possible to realize a gain control amplifier tube with extremely low distortion.

次に、この基本構成に基づく、具体回路rtlllI&
図に示T、なお、この図において第1図の各部に対応T
る部分には同一の、符号が付されている。
Next, based on this basic configuration, a concrete circuit rtllllI&
The T shown in the figure corresponds to each part in Fig. 1 in this figure.
The same parts are given the same reference numerals.

S1図における歪打消し回路2において、信号入力端子
15と抵抗16との間には、直流阻止用す1コンデンサ
18mとダイオード14mとが同ダイオード14mのカ
ソード【抵抗1611にして順次直列に介挿され、!!
たこれと並列的に1直流阻止用のコンデンサ18bとダ
イオード14bとが同ダイオード1番すの7ノー)′【
抵抗16@にしTj[次1[列に介挿されている。コン
デンサ18aとダイオード14mとの接続点は、抵抗1
91%可変抵抗器Iaoat−順次介して正電源端子9
に接続され、ダイオード目1に調整可能な直流バイアス
電流【供給し得るよう&ニア2っている。またコンデン
サ18bとダイオード14bとの接続点は、抵抗19b
、可変抵抗器5obt−順次介して負電源端子6に接続
され、ダイオード14bに調整可能な直流バイアス電流
を供給し得るようになっている。
In the distortion canceling circuit 2 shown in Fig. S1, a DC blocking capacitor 18m and a diode 14m are connected in series between the signal input terminal 15 and the resistor 16. Been! !
In parallel with this, there is a capacitor 18b for DC blocking and a diode 14b.
Resistor 16 @ is inserted in Tj [next 1 [column]. The connection point between the capacitor 18a and the diode 14m is connected to a resistor 1.
91% variable resistor Iaoat - positive power supply terminal 9 through sequential
The diode 1 is connected to the diodes 1 and 2 to provide an adjustable DC bias current. Furthermore, the connection point between the capacitor 18b and the diode 14b is connected to a resistor 19b.
, variable resistor 5 obt - are connected to the negative power supply terminal 6 in sequence, so that an adjustable DC bias current can be supplied to the diode 14b.

この場合1人力信号Viか正の時は、同人力信号はダイ
オード14aによって歪特性を付与されてトランジスタ
8のベースに供給され(この時ダイオード14bは非導
通状部となる)、−万人力信号vゑが負の時は、同人力
信号はダイオード14b&:よって歪特性【付与されて
トランジスタ80ペースに供給されるにの時ダイオード
1番1ド14m、14bによって付与される歪特性は、
可変抵抗mwoaa”aobrt用いてこれらUJダイ
オード1481,14bに供給する直流バイアス電流【
変化させることにより、可変利得増幅Thlの歪を打消
丁べく最適な状態に設定TることかできるO 次に可[利得増幅MIblにおいて、トランジスタ8.
4の各エミッタは、ダイオード21−1〜zl−・とダ
イオード22二1〜2z−・ と【各々介して共通トラ
ンジスタ8B、抵抗24からなる1分と1ダイオ−Fl
lllされたNPN)ランジスタ25と同トランジスタ
85のエミッタ抵抗26とからなる部分とは、カレント
竜う−回路な構成しており、このカレン)之う−回路に
おけるトランジスタ25ニハ、可変抵抗1’!?、抵抗
28〜80、PNPFランジスタ81からなる可変定電
流回路から一制御電圧Vcに応じた二定電流I、が供給
されるようになっている。
In this case, when the human power signal Vi is positive, the human power signal is given distortion characteristics by the diode 14a and is supplied to the base of the transistor 8 (at this time, the diode 14b becomes a non-conducting part), and the - universal power signal When v is negative, the power signal is applied to the diode 14b&: Therefore, the distortion characteristic is given by the diode 14m, 14b.
A DC bias current is supplied to these UJ diodes 1481 and 14b using a variable resistor mwoaa"aobrt.
It is possible to set the optimum state to cancel the distortion of the variable gain amplification Thl by changing the transistor 8.
Each emitter of 4 is connected to a common transistor 8B and a resistor 24 through diodes 21-1 to zl-, diodes 22-21 to 2z-, and 1 diode-Fl, respectively.
The part consisting of the NPN transistor 25 and the emitter resistor 26 of the transistor 85 constitutes a current circuit, and the transistor 25 in this current circuit has a variable resistance 1'! ? , resistors 28 to 80, and a PNPF transistor 81. Two constant currents I corresponding to one control voltage Vc are supplied from a variable constant current circuit including resistors 28 to 80 and a PNPF transistor 81.

しかして、この具体回路によれば、信号入力端子16に
供給8れる入力信号【II制御入力端子51に印加する
制御電圧VCに応じた利得において増幅し1信号出力端
子18から出力■る場合、歪打消し回路2において発生
される歪によって、可変利得増11i&lにおいて発生
される歪を、相殺Tることかできる。
According to this specific circuit, when the input signal supplied to the signal input terminal 16 is amplified with a gain corresponding to the control voltage VC applied to the II control input terminal 51 and outputted from the signal output terminal 18, The distortion generated in the distortion canceling circuit 2 can cancel out the distortion generated in the variable gain increaser 11i&l.

以上の説明から明らかなように、この発明による利得制
御増幅器によれば、差動構成されたトランジスタと、こ
れらのトランジスタの共通エミッタ電流な利得制御信号
に応じて変化させる差動−威されたトランジスタの両ペ
ース間に印加する入力信号の経路に電流方向【互いにl
l&:すると、#に並列に介挿された少なくとも!対の
半導体整流素子を有してなる歪打消し回路と【設け、前
記差動II成3れたトランジスタのコレクタ側から出力
を取り出Tようにしたから、可変利得増幅器の歪か歪打
消し回路の歪によって相殺されるようになり、極めて歪
の少ない利得制・御増幅器【実現Tることかできる。!
たこの発明による利得制御増幅器は、無帰還S成であり
、かつ回路構成が単純であるから、極めて効率よく利得
【変化ぎせることができると共に低価格である利点も有
しており、オーディオ機器用の電子ボリュームとして好
適である。
As is clear from the above description, the gain control amplifier according to the present invention includes differentially configured transistors and a differentially configured transistor whose common emitter current of these transistors is changed in accordance with a gain control signal. In the path of the input signal applied between both paces, the current direction [l
l&: Then at least ! inserted in parallel with #! A distortion canceling circuit having a pair of semiconductor rectifying elements is provided, and the output is taken out from the collector side of the differential II transistor, so that the distortion of the variable gain amplifier can be canceled. This is offset by the distortion of the circuit, making it possible to realize a gain control/control amplifier with extremely low distortion. !
The gain control amplifier according to this invention has a non-feedback S configuration and has a simple circuit configuration, so it has the advantage of being able to change the gain extremely efficiently and being inexpensive. It is suitable as an electronic volume for use.

【図面の簡単な説明】[Brief explanation of the drawing]

第7(2)番才、この発明による利得制御層III器の
基本構成【示す回路図、1112図は同基本構成におけ
る可変利得増幅酩lの利得変化を示す特性図、第3図番
才ダイオードの特性図、第4c図は前記基本構成におけ
る歪打消し回路2の利得変化【示T特性図、si、を図
はこの発明による利得制御増幅器の具体回路の一例な示
T回路図である。 l・・・・・・可変利得増幅器、8・・・・・・歪打消
し回路、8.4・・・・・・差動構成されたトランジス
タ、5・・・・・・可変電流源。
7(2) Basic configuration of the gain control layer III device according to the present invention [Circuit diagram shown in FIG. FIG. 4c is a characteristic diagram showing the gain change of the distortion canceling circuit 2 in the basic configuration. 1... Variable gain amplifier, 8... Distortion canceling circuit, 8.4... Differentially configured transistor, 5... Variable current source.

Claims (1)

【特許請求の範囲】 ω 差動構mEれたトランジスタと、これらのトランジ
スタの共通工之ツタ電流【利得制御信号に応じて変化さ
せる可変電流源とを有してなる可変利得増幅すと、■S
tt紀差動11I成8れたトランジスタの両ベース間に
印加Tる入力信号の経路に電流方向【互いに逆にTると
共に並列に介挿された少なくともl対の半導体整流素子
を有してなる歪打消し回路と【具備し、前記差動11成
されたトランジスタのコレクタ傭から出力i取り出すよ
うに構成してなる利得制御増幅器。
[Claims] Variable gain amplification comprising transistors with a differential structure and a variable current source that changes the common current of these transistors in accordance with a gain control signal: S
In the path of the input signal applied between the bases of the TT differential 11I transistor, there are at least l pairs of semiconductor rectifying elements inserted in parallel with current directions opposite to each other. A gain control amplifier comprising a distortion canceling circuit and configured to take out an output i from the collector of the transistor formed by the differential transistor.
JP18211081A 1981-11-13 1981-11-13 Gain controlling amplifier Granted JPS5884513A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18211081A JPS5884513A (en) 1981-11-13 1981-11-13 Gain controlling amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18211081A JPS5884513A (en) 1981-11-13 1981-11-13 Gain controlling amplifier

Publications (2)

Publication Number Publication Date
JPS5884513A true JPS5884513A (en) 1983-05-20
JPH0244166B2 JPH0244166B2 (en) 1990-10-03

Family

ID=16112502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18211081A Granted JPS5884513A (en) 1981-11-13 1981-11-13 Gain controlling amplifier

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5949286A (en) * 1997-09-26 1999-09-07 Ericsson Inc. Linear high frequency variable gain amplifier

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4224179C1 (en) * 1992-07-22 1993-11-11 Freudenberg Carl Fa Guide sleeve with integrated seal for a clutch release bearing of a transmission

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4922064A (en) * 1972-06-17 1974-02-27
JPS5039855A (en) * 1973-08-10 1975-04-12
JPS5111346A (en) * 1974-07-18 1976-01-29 Matsushita Electric Ind Co Ltd ZOFUKUKI
JPS57122918U (en) * 1981-01-22 1982-07-31

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4922064A (en) * 1972-06-17 1974-02-27
JPS5039855A (en) * 1973-08-10 1975-04-12
JPS5111346A (en) * 1974-07-18 1976-01-29 Matsushita Electric Ind Co Ltd ZOFUKUKI
JPS57122918U (en) * 1981-01-22 1982-07-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5949286A (en) * 1997-09-26 1999-09-07 Ericsson Inc. Linear high frequency variable gain amplifier

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Publication number Publication date
JPH0244166B2 (en) 1990-10-03

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