JPS5883832U - sampling circuit - Google Patents

sampling circuit

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Publication number
JPS5883832U
JPS5883832U JP17928481U JP17928481U JPS5883832U JP S5883832 U JPS5883832 U JP S5883832U JP 17928481 U JP17928481 U JP 17928481U JP 17928481 U JP17928481 U JP 17928481U JP S5883832 U JPS5883832 U JP S5883832U
Authority
JP
Japan
Prior art keywords
sampling
sampling circuit
mo3t
source
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17928481U
Other languages
Japanese (ja)
Inventor
健一 小島
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP17928481U priority Critical patent/JPS5883832U/en
Publication of JPS5883832U publication Critical patent/JPS5883832U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は現存するサンプリング回路図、第２図は本考案
のサンプリング回路図であって、１は信号源、２はＭＯ
５Ｔ、４は寄生容量、５は補償容量、を夫々示している
。Figure 1 is an existing sampling circuit diagram, and Figure 2 is a sampling circuit diagram of the present invention, where 1 is a signal source, 2 is an MO
5T, 4 indicates a parasitic capacitance, and 5 indicates a compensation capacitance, respectively.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ドレインが信号源に連り、ソースからサンプリング信号
が取り出されるＭＯ３Ｔから成るサンプリング回路に於
て、上記ＭＯ３Ｔのゲートにサンプリングパルスを印加
すると共にこのＭＯ３Ｔのゲートとソースとの間に生じ
る寄生容量と等しい容量値を持つ補償容量を介して上記
サンプリングパルスの逆位相パルスを供給して成るサン
プリング回路。In a sampling circuit consisting of an MO3T whose drain is connected to a signal source and a sampling signal is taken out from the source, when a sampling pulse is applied to the gate of the MO3T, the parasitic capacitance generated between the gate and source of the MO3T is equal to A sampling circuit configured to supply an opposite phase pulse to the above sampling pulse via a compensation capacitor having a capacitance value.
JP17928481U 1981-11-30 1981-11-30 sampling circuit Pending JPS5883832U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17928481U JPS5883832U (en) 1981-11-30 1981-11-30 sampling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17928481U JPS5883832U (en) 1981-11-30 1981-11-30 sampling circuit

Publications (1)

Publication Number Publication Date
JPS5883832U true JPS5883832U (en) 1983-06-07

Family

ID=29974841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17928481U Pending JPS5883832U (en) 1981-11-30 1981-11-30 sampling circuit

Country Status (1)

Country Link
JP (1) JPS5883832U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09106692A (en) * 1996-07-19 1997-04-22 Sony Corp Sampling hold circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09106692A (en) * 1996-07-19 1997-04-22 Sony Corp Sampling hold circuit

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