JPS5883274A - Sampling method for repeated waveform - Google Patents

Abstract

PURPOSE:To perform a high-resolution sampling with a low frequency, by inserting a PLL circuit between a frequency divider and a circuit to be measured. CONSTITUTION:The output of a pulse generator 1 which generates pulses having a repeat period T is connected directly to the input of a sample holding circuit 5, and a PLL circuit consisting of a frequency divider 3, a phase detector 6, and a voltage control oscillator (VCO) 7 is inserted between a frequency divider 2 and a circuit 4 to be measured. The repeat period of the output of the VCO 7 is set to NT/M, and this output is supplied to the circuit 4 to be measured. The phase detector 6 detects the phase defference between an output NT of the frequency divider 2 and the output NT of the frequency divider 3 and performs such control that the output NT/M of the VCO 7 is constant. N=MXK-A is true in the relation between M and N. A, K, M, and N are integers, and A is equal to or larger than 1, and K is a constant, and values of M and N are so set that N/M is not an integer.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method in which a repetitive waveform is finely broken down on the time axis and sampled.

(2) Prior Art A block diagram of the conventional method is shown in FIG. In the figure, 1 is a pulse generator that outputs pulses with a repetition period T, 2 is a frequency divider that divides the output of pulse generator 1 and outputs an output with a repetition period NT, and 5 is the output of pulse generator 1. 4 is a circuit under test, and 5 is a sample hold circuit.

In Figure 1, one of the outputs of the pulse generator 1 is sent to the frequency divider 2.
The input signal passes through the circuit under test 4 and is added to the sample-and-hold circuit 50 input, and the other one is applied from the divider 3 to the other input of the sample-and-hold circuit 5. #! In FIG. 1, the repetition period T is the resolution that determines how far the repetition waveform is to be resolved, and N is the total number of data of the waveform to be finally obtained.

There is the following relationship between M and N.

N=MxK-A・・・・・・・・・・・・・・・・・・
・－・・・・・・・・・・・・・・・Tal here A,
, M and N are each integers and A≧1゜K=constant,
And if 87M is an integer, the values of M and N are set so that it is dangerous. The formula (al to N) is M.

Next, an example of the waveform shown in FIG. 1 is shown in FIG. Waveform W in the figure
1 and W2 are the output waveforms of the circuit under test 4, and the repetition period is NT. Pl is the first sampling point, P2 is the next sampling point, and the time interval between the points P1 and P2 is the sampling period MT.

In other words, in FIG. 2, the output of pulse generator 1 is
The frequency is divided by waveforms W1, W2 . Create a repetition period NT of .
Create. Then, the waveform W1 is sampled at points P1, P2, . . . , and then the next waveform W2 is sampled. In this case, the first sampling point P11 of the waveform W2 is calculated from the point P1 of the waveform W1 by the formula (A of al).
The position will be shifted by xT.

This jL is designed so that 87M is not an integer, so
This is because if the repetition period NT is sampled at the sampling period MT, only AT will protrude, resulting in waveforms W1 and W2.
The sampling point of will shift.

Note that 1. Usually, A=1 in the formula (at), but it may also be used with A>1.

In this way, the sample and hold circuit 5 samples the response of the circuit under test 4 in the order of points PI, P2%, . . . . Although not shown, the output of the sample and hold circuit 5 is displayed on a CRT or the like from an AD converter.

Next, a numerical example of FIG. 1 will be shown. The resolution in the case of Fig. 1 is the repetition period T of the immediate pulse generator 1, and T = α1p
s and N=4095.

The MTO value is limited by the conversion time of the AD converter connected to the sample and hold circuit 5, and usually MT≧5PS.

'l' = CL 1p s f) Te, M≧50. Since M is the division ratio, M=2'=64.

If you transform the formula (al), K=(N+A)/M・・・・・・・・・・・・・・・
・・・・・・N=4095, A=1 in lb1 formula tbl,
When M=64 is entered, K=2'=64.

The conversion time according to Figures 1 and 2 is given by MXNXT3
However, M=64. Since N=4095 and T=α1μs,
The conversion time is 26 m5 from these products.

(51 Problems with the Prior Art In the conventional method shown in FIG. 1, the resolution T is determined by the reference frequency of the pulse generator 10, but the limit is T = α01-8. α
When converted into a frequency, 01 μs is equivalent to 100 MH2 phase, etc., which is technically difficult.

(4) Purpose of the Invention This invention provides a PL between the frequency divider 2 and the circuit under test 40 in FIG.
By inserting an L circuit, a sampling method is provided in which the reference frequency of the pulse generator 1 can be reduced to several hundredths of that in the case of FIG. 1 and still have the same performance as in FIG. 1. .

(Examples of 51 inventions A block diagram of an embodiment according to the present invention is shown in FIG.

In the figure, 1 to 5 are the same as in Figure 1, 6 is a phase detector,
7 is a voltage controlled oscillator (VCO). That is, the fifth
The figure shows a divider 3 between the frequency divider 2 and the circuit under test 4 in Figure 1.
In addition to inserting an I'LL circuit consisting of a phase detector 6 and a VCO 7, the position of the divide-by-nine frequency divider 3 between the pulse generator 1 and the sample-hold circuit 50 in FIG. It is connected to the sample and hold circuit 50 input.

The VCO 7 sets the repetition period of its output to NT/M and supplies it to the circuit under test 4. A part of the output of the VCO 7 is input to the frequency divider 3, and the output of the frequency divider 5 becomes NT. therefore,
The phase detector 6 uses the output NT of the frequency divider 2 and the output N of the frequency divider 3.
The phase difference of T is detected and controlled so that the output NT/M of the VCO 7 is constant.

In the case of FIG. 6, as in the case of FIG. Set the values of M and N so that the number of reeds and N7M does not become the number M.

Next, a numerical example of FIG. 3 will be shown. In order to keep the conditions the same as those in Figures 1 and 2, N = 4095, M = 64, A =
1, K=64. The resolution in the case of Fig. 3 is T/M, and if one resolution is a1μS, which is the same as in the case of Fig. 1, then
Since M=64, T=6.4 μs. This is approximately 156 kHz when converted into frequency. Also, since the repetition period of VCO 7 is NT/M, substituting each value (141 ms). This is approximately 2.4 kHz when converted into frequency. In other words, as shown in Fig. 5, PLL
If the circuit is adopted, the repetition period of the pulse generator 1 is T=r1.1 μs in the numerical example of FIG.

In the numerical example of FIG. 5, T=44-8. Therefore, the reference frequency of the pulse generator 1 shown in FIG. 3 can be significantly lowered.

Note that the waveform example in FIG. 3 is the same as in FIG. 2.

(41) Effects of the Invention According to the present invention, high-resolution sampling can be performed at a lower frequency than in conventional methods.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional method, FIG. 2 is a waveform example according to FIG. 1, and FIG. 5 is a block diagram of an embodiment according to the present invention. 1... Pulse generator, 2... Frequency division ratio N
divider. 6... Frequency divider with frequency division ratio M, 4... Circuit under test, 5... Sample hold circuit, 6...
...Phase detector. 7...■CO Agent Patent Attorney Kinyo Omata Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. A pulse generator with a repetition period T, a first divider that outputs an output with a repetition period NT from the output of this pulse generator, and a first frequency divider that outputs an output with a repetition period NT. A phase detector that takes the input as the input, and a vCO that takes the output of this phase detector as the input. a second divider with a frequency division ratio M, which takes the output of this vCO as an input and takes the output as a second input of the phase detector; A sample and hold circuit is provided, in which the vCO output with a repetition period of NT/M is used as a first input via the circuit under test, and the output of the pulse generator is directly input to the cylinder 2, N=MxK- A. Here, in A, there is a sample of a repetitive waveform characterized in that M%N is an integer and A≧1°K is a constant number, and the values of M and N are set so that N7M is not an integer. Method.