JPS5882541A - Resin coating method - Google Patents
Resin coating methodInfo
- Publication number
- JPS5882541A JPS5882541A JP18030681A JP18030681A JPS5882541A JP S5882541 A JPS5882541 A JP S5882541A JP 18030681 A JP18030681 A JP 18030681A JP 18030681 A JP18030681 A JP 18030681A JP S5882541 A JPS5882541 A JP S5882541A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- dam
- substrate
- board
- coating method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 title claims abstract description 53
- 229920005989 resin Polymers 0.000 title claims abstract description 53
- 238000000576 coating method Methods 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims description 7
- 229920001187 thermosetting polymer Polymers 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 abstract description 15
- 238000005476 soldering Methods 0.000 abstract description 9
- 239000000919 ceramic Substances 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は回路を形成した基板上の任意の場所に樹脂コー
ティングを施す樹脂コーティング方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resin coating method for applying resin coating to an arbitrary location on a circuit board.
一般に小形の電子機′器は、半導体ペレット実装の有無
に拘らずディスクリート及びチップ部品においても、耐
環境性（機械的強度および耐湿度特性）の向上のため基
板実装後、樹脂モールドすることが要求されている。し
かし、例えば近接スイッチまたは光電スイッチに代表さ
れる制御機器においては、基板を樹脂モールドした後コ
イル部および調整抵抗などを半田付するため、基板の全
面をコーティングすることは好ましくない。In general, small electronic devices require resin molding after mounting on the board to improve environmental resistance (mechanical strength and moisture resistance), regardless of whether semiconductor pellets are mounted or not, even for discrete and chip components. has been done. However, in control devices such as proximity switches or photoelectric switches, the coil portion, adjustment resistor, etc. are soldered after the substrate is resin-molded, so it is not preferable to coat the entire surface of the substrate.
すなわち、従来の回路基板においては、第１図（ａ）、
（ｂｌに示すように、基板１の一面に回路を構成する回
路素子例えば半導体チップ２、チップ部品３、厚膜抵抗
４などを固着し、これらの回路素子を覆うようＪ６樹脂
５でコーティングしている。しかも、既述のように、基
板１の両端に位置する半田付部６には樹脂をコーティン
グした後でコイル部等の部品を半田付するため。That is, in the conventional circuit board, FIG. 1(a),
(As shown in bl, circuit elements constituting the circuit, such as a semiconductor chip 2, a chip component 3, a thick film resistor 4, etc., are fixed to one surface of the substrate 1, and these circuit elements are coated with J6 resin 5 to cover them. Moreover, as described above, the soldering parts 6 located at both ends of the board 1 are coated with resin before parts such as the coil parts are soldered thereto.
この半田付部６は樹脂５で被覆されないようにする必要
がある。ところが実際上は樹脂５をコ−ティングする際
、樹脂５が半田付部６の方へはみ出しがちであり、この
ため半田付不良等のトラブルの原因となっていた。It is necessary to prevent this soldering portion 6 from being covered with the resin 5. However, in practice, when coating the resin 5, the resin 5 tends to protrude toward the soldering portion 6, which causes problems such as poor soldering.
また上述の問題点を解決するため、図示のように半田付
部６の内側に溝状凹部７を設けて、半田付部６へ樹脂５
がはみ出さないようにする試みもなされている。しかし
、基板１の材質がガラスエポキシ等の場合は、凹部７を
設けるのは困難であり、との方法は実用的でないという
不都合がある。In addition, in order to solve the above-mentioned problem, a groove-like recess 7 is provided inside the soldering part 6 as shown in the figure, and a resin 5 is inserted into the soldering part 6.
Efforts have also been made to prevent the material from protruding. However, if the material of the substrate 1 is glass epoxy or the like, it is difficult to provide the recess 7, and this method is disadvantageous in that it is not practical.
本発明の目的は、上述の従来例における問題点に鑑み、
基板上の樹脂をコーティングすべき場所を帯状のダムで
包囲するという構想に基づき、特にマイクロディスペン
サとＮＣテーブルを組み合せてこのマイクロディスペン
サから塗出するダム材で任意の形状の帯状ダムを形成す
ることにより高速で確実なコーティングを施すことにあ
る。The purpose of the present invention is to solve the problems in the conventional example described above.
Based on the concept of surrounding the area on the substrate where the resin is to be coated with a band-shaped dam, a band-shaped dam of any shape can be formed using the dam material dispensed from the micro-dispenser by combining a micro-dispenser and an NC table. The goal is to provide faster and more reliable coating.
以下図面により本発明の詳細な説明する。The present invention will be explained in detail below with reference to the drawings.
なお、従来例と共通または対応する部分にっいては同一
の符号を用いて表わす。Note that the same reference numerals are used for parts common to or corresponding to those of the conventional example.
第２図（ａｌ 、 （ｂ）は本発明の方法によりコーテ
ィングした回路基板で（ａｌは平面図、（ｂ）は側面図
である。同図において、基板１の一面には回路を構成す
る回路素子例えば半導体チップ２、チップ部品３．厚膜
抵抗４．抵抗８などが固着され、さらに両端にはそれぞ
れ複数の半田付部６が設けられている。そして、所定の
回路素子すなわち前記半導体チップ２．チップ部品３．
厚膜抵抗４を覆うように樹脂５がコーティングされ、こ
の樹脂５は周囲を帯状ダム９により囲まれ堰止められて
いる。Figures 2 (al) and (b) show circuit boards coated by the method of the present invention (al is a plan view and (b) is a side view. Elements such as a semiconductor chip 2, a chip component 3, a thick film resistor 4, a resistor 8, etc. are fixed, and a plurality of soldering parts 6 are provided at each end. .Chip parts 3.
A resin 5 is coated to cover the thick film resistor 4, and the resin 5 is surrounded and dammed by a band-shaped dam 9.
なお、実際は図示したもの、が複数組、一枚の大きな基
板上に設けられ、使用に当っては図示のようなものに切
断される。Incidentally, in reality, a plurality of sets of what is shown in the figure are provided on one large board, and when used, they are cut into the parts shown in the figure.
第３図は本発明の実施に用いる帯状ダム形成装置の構成
を示す概略断面図である。１０はＮＣテーブル（ｘ−ｙ
テーブル）１１はマイクロディスペンサ（塗出器）であ
る。帯状ダムを形成する場合、ＮＣテーブル１０上に基
板１を載せ、ＮＣテーブルを動かして基板１上の所定位
置すなわち樹脂コーティングすべき場所の周囲に塗出口
１２から紫外線硬化性樹脂のダム材１３を塗出させ、こ
の塗出したダム材１３に紫外線ランプ１４から紫外線を
照射してダム材を硬化しダム９を形成する。このとき、
マイコン等を用いれば、微小なパターンを形成すること
ができる。FIG. 3 is a schematic cross-sectional view showing the configuration of a belt-shaped dam forming device used for carrying out the present invention. 10 is the NC table (x-y
The table) 11 is a micro dispenser. When forming a band-shaped dam, the substrate 1 is placed on the NC table 10, and the NC table is moved to apply a dam material 13 of ultraviolet curable resin from the coating port 12 to a predetermined position on the substrate 1, that is, around the area to be coated with resin. This coated dam material 13 is irradiated with ultraviolet rays from an ultraviolet lamp 14 to harden the dam material and form a dam 9. At this time,
If a microcomputer or the like is used, minute patterns can be formed.
なお、上記の例においてはダム材１３として紫外線硬化
性樹脂を用いたが、ダム材１３としてはシリコン、エポ
キシおよびアクリル系等、物性的な要求は特になく、従
って１回路素子に温度を加えても良い場合は熱硬化性樹
脂を使用し。In the above example, an ultraviolet curable resin was used as the dam material 13, but the dam material 13 is made of silicon, epoxy, acrylic, etc., and there are no particular requirements for physical properties, so one circuit element is heated. If possible, use thermosetting resin.
その他の場合には紫外線等の光硬化性樹脂を使用すれば
よい。こうして帯状ダム９を形成した後のシーテイング
樹脂５は、粘度にとられれることなく、熱伝導性！接着
性、耐熱性などの所望のコーテイング材を選択すること
ができる。In other cases, a photocurable resin such as ultraviolet rays may be used. After forming the band-shaped dam 9 in this way, the sheeting resin 5 has high thermal conductivity without being affected by viscosity! Desired coating materials such as adhesiveness and heat resistance can be selected.
第４図は本発明の方法の実施に用いるマイクロプロセッ
サ（ＭＰＵ）を用いた装置の一例の構成を示すブロック
図である。同図の装置は。FIG. 4 is a block diagram showing the configuration of an example of a device using a microprocessor (MPU) used to implement the method of the present invention. The device shown in the same figure.
マイクロディスペンサ１１から塗出された樹脂への紫外
線照射量を検出する光センサ２１ａ。An optical sensor 21a detects the amount of ultraviolet rays irradiated onto the resin dispensed from the micro-dispenser 11.
ＮＣテーブル１０上に塔載された基板１の位置偏差を例
えば基板ｌ上に付された位置検出マークとＮＣテーブル
ｌＯの座標（ｘ、ｙ）などとから検出する変位センサ２
１ｂおよび回転センサの出力を時分割多重する時分割多
重化器２２、この時分割多重化された信号を、ディジタ
ル化するＡ ／ Ｄ変換部２３％ リードオンリメモリ
（ＲＯＭ）。A displacement sensor 2 detects the positional deviation of the substrate 1 mounted on the NC table 10 from, for example, a position detection mark placed on the substrate l and the coordinates (x, y) of the NC table lO.
1b and a time division multiplexer 22 which time division multiplexes the outputs of the rotation sensor; an A/D converter 23% which digitizes the time division multiplexed signals; and a read only memory (ROM).
ランダムアクセスメモリ（ＲＡＭ）および中央制御部な
、どからなるマイクロプロセッサユニット（ＭＰＵ）２
４およびＮＣテーブル駆動用モータ（図示せず）、樹脂
塗出用ンレノイド（図示せず）、紫外線照射ランプ１４
等を制御する制御装置２５を具備する。Microprocessor unit (MPU) 2 consisting of random access memory (RAM), central control unit, etc.
4 and an NC table driving motor (not shown), a resin dispensing resin (not shown), and an ultraviolet irradiation lamp 14
It is equipped with a control device 25 that controls the following.
次にこの装置の動作を第５図のフローチャートにより説
明する。先ず、セラミック等の回路基板１がＮＣテーブ
ル１０にセットされたことを検知すると、該ＮＣテーブ
ル１０上の回路基板ｌを樹脂塗出開始位置に設定する。Next, the operation of this device will be explained with reference to the flowchart shown in FIG. First, when it is detected that a circuit board 1 made of ceramic or the like is set on the NC table 10, the circuit board 1 on the NC table 10 is set at the resin application start position.
この設定は例えば基板１上のマークを検出し、このマー
クが所定位置に来るようにＮＣテーブル１０をＸ−Ｙ方
向に移動して行なう。次いで、塗出器のソレノイドを作
動して樹脂の塗出を開始するとともに、この樹脂塗出量
がマイクロダムの形成に最適な樹脂量となるようにマイ
クロディスペンサ１１の空気圧力を制御する。塗出開始
されると紫外線ランプ１４から紫外線を照射し、樹脂硬
化に必要なエネルギーを制御する。次にＮＣテーブル１
０上の回路基板１が指定位置（開始位＃）に止ったか否
か、すなわち樹脂塗出が基板１上を一巡して帯状ダムの
形成を終了したか否かを判定し、指定位置でなければ、
ざらにＮＣテーブル１０の移動樹脂塗出、紫外線照射等
、前述の動作を繰り返す。ＮＣテーブル１０が指定位置
に止まったときは、帯状ダム９の形成が終了したのであ
るから１次のステップに進む。このステップにおいては
、照射制御系を停止すべきか否か、すなわち、前記回路
基板ｌは大きな基板上に複数連続して製造されるが、こ
の複数の回路基板ｌの全部に帯状ダム９を形成したか否
かを判定する。未だ帯状ダム９の形成されていない回路
基板１が残存しているときは次の基板１の位置修正を行
なった後、前述のＮＣテーブル１０の移動、樹脂塗出、
紫外線照射、停止位置判定等の動作を行なう。また、全
部の回路基板１に帯状ダム９の形成が完了しているとき
はシステムの動作を終了する。This setting is performed, for example, by detecting a mark on the substrate 1 and moving the NC table 10 in the X-Y direction so that the mark is at a predetermined position. Next, the solenoid of the applicator is operated to start dispensing the resin, and the air pressure of the microdispenser 11 is controlled so that the amount of resin dispensed is the optimum amount for forming the microdam. When coating starts, ultraviolet rays are irradiated from the ultraviolet lamp 14, and the energy necessary for curing the resin is controlled. Next, NC table 1
It is determined whether the circuit board 1 on the board 0 has stopped at the specified position (starting position #), that is, whether the resin coating has completed one cycle on the board 1 and has finished forming the band-shaped dam. Ba,
The above-described operations such as moving the NC table 10, applying the resin, and irradiating the ultraviolet rays are repeated. When the NC table 10 stops at the designated position, the formation of the band-shaped dam 9 has been completed, and the process proceeds to the first step. In this step, it is necessary to determine whether or not the irradiation control system should be stopped, that is, a plurality of the circuit boards l are manufactured in succession on a large board, and whether or not the strip dam 9 is formed on all of the plurality of circuit boards l. Determine whether or not. If there remains a circuit board 1 on which the strip dam 9 has not been formed, the position of the next board 1 is corrected, and then the above-mentioned movement of the NC table 10, resin coating,
Performs operations such as ultraviolet irradiation and stop position determination. Further, when the formation of the band-shaped dams 9 on all the circuit boards 1 is completed, the operation of the system is ended.
なお、ダム９の形状位置はＲＯＭまたはＲＡＭ内に記憶
されており、この記憶データを用いて大きな基板上に上
記の動作を繰り返し、何組ものダム９を形成することが
できる。Note that the shape and position of the dam 9 is stored in the ROM or RAM, and by using this stored data, the above operations can be repeated on a large substrate to form many sets of dams 9.
本発明の樹脂コーティング方法は、上記説明及び図示の
ように構成され、予め樹脂コーティングを施す場所の胸
囲にダム９を設けているので半田付部６へ樹脂５がはみ
出すこともなく。The resin coating method of the present invention is configured as described above and shown in the drawings, and since the dam 9 is provided in advance around the chest at the location where the resin coating is to be applied, the resin 5 does not protrude into the soldering portion 6.
高速で確実に所定のコーティングを実施することができ
る。従って本発明によれば、コーティング作業の完全自
動化が図れる。また、ダム９は容易に任意の形状に形成
できるので、微細な部分を含む任意の形状の°コーティ
ングが可能である。さらに本発明では、従来のように凹
部７を設ける必要がないので基板は樹脂基板、セラミッ
ク基板のどちらでも使用できる。Predetermined coating can be performed reliably at high speed. Therefore, according to the present invention, the coating operation can be completely automated. Further, since the dam 9 can be easily formed into any shape, it is possible to coat the dam 9 into any shape including minute parts. Furthermore, in the present invention, there is no need to provide the recess 7 as in the conventional case, so either a resin substrate or a ceramic substrate can be used as the substrate.
以上説明したように、本発明によれば工業的価値大なる
樹脂コーティング方法を提供することができる。As explained above, according to the present invention, a resin coating method of great industrial value can be provided.
第１図（ａｌ 、 （ｂｌは従来の樹脂コーティング方
法による製品を示す平面図と断面図、第２図（ａ）。
（ｂ）は本発明の方法を採用した製品を示す平面図と断
面図、第３図は本発明の樹脂コーティング方法を実施す
るための装置の一例を示す断面図。
第４図は本発明の方法を実施するためのマイクロプロセ
ッサを用いた装置の一例を示す回路構成図、第５図は第
４図の装置の動作を説明するためのフローチャートであ
る。
ｌ・・・・・・基板、 ２・・・・・・半導体チップ。
３・・・・・・チップ部品、 ４・・・・・・厚膜抵抗
、５・・・・・・樹脂、 ６・・・・・・半田
付部、８・・・・・・抵抗、 ９・・・・・・
ダム。
１０・・・・・・ＮＣテーブル、１１・・・・・・マイ
クロディ１２・・・・・・塗出口、 ス
ペンサ、１４・・・・・紫外線ランプ。
特許出願人 立石電機株式会社
代理人 弁理士 伊東辰雄
ｌ 〃 伊東哲也
手続補正書
昭和５６年１２月 ８日
特許庁長官 島田春樹 殿
１、事件の表示
昭和５６年特許願第１８０３０６号
２、発明の名称 樹脂コーティング方法６、補正を
する者
事件との関係 特許出願人
代表者 立 石 孝 雄
４、代理人 〒１０５
６、補正の対象
「明細書中特許請求の範囲の禰」
Ｚ 補正の内容
万り 木へ
１、回路素子を固着した基板上に、所定の回路素子を覆
うように樹脂をコーティングする樹脂コーティング方法
において。
前記樹脂をコーティングすべき場所の周囲に、予め帯状
ダムを形成しておくことを特徴とする樹脂コーティング
方法。
２、 前記基板をＮＣテーブル上に設置し、該ＮＣテー
ブルとともに該基板を移動せしめ、該ＮＣテーブルの上
方に配設されたマイクロディスペンサから塗出する光ま
たは熱硬化性の樹脂により前記帯状ダムを形成する前記
特許請求の範囲第１項記載の樹脂コーティング方法。Figure 1 (al, (bl) is a plan view and cross-sectional view showing a product made by the conventional resin coating method, Figure 2 (a). (b) is a plan view and cross-sectional view showing a product using the method of the present invention. , Fig. 3 is a sectional view showing an example of an apparatus for implementing the resin coating method of the present invention. Fig. 4 is a circuit diagram showing an example of an apparatus using a microprocessor for implementing the method of the present invention. , FIG. 5 is a flowchart for explaining the operation of the apparatus shown in FIG. 4. l...Substrate, 2... Semiconductor chip. 3... Chip parts, 4... Thick film resistor, 5... Resin, 6... Soldered part, 8... Resistor, 9...
dam. 10...NC table, 11...Microdisk 12...Coating port, Spencer, 14...Ultraviolet lamp. Patent Applicant Tateishi Electric Co., Ltd. Agent Patent Attorney Tatsuo Ito 〃 Tetsuya Ito Procedural Amendment December 8, 1980 Director General of the Patent Office Haruki Shimada 1, Indication of Case 1980 Patent Application No. 180306 2, Invention Name Resin coating method 6, relationship with the case of the person making the amendment Patent applicant representative Takao Tateishi 4, agent 〒105 6. Subject of the amendment “Details of the scope of the patent claims in the specification” Z Contents of the amendment 1. In a resin coating method in which a resin is coated on a substrate to which circuit elements are fixed so as to cover predetermined circuit elements. A resin coating method comprising forming a band-shaped dam in advance around the area to be coated with the resin. 2. Place the substrate on an NC table, move the substrate together with the NC table, and apply light or thermosetting resin from a microdispenser placed above the NC table to the band-shaped dam. A resin coating method according to claim 1.
Claims (1)
覆うように樹脂をコーティングする樹脂コーティング方
法において、 前記樹脂をコーティングすべき場所の周囲に、予め帯状
ダムを形成しておくことを特徴とする樹脂コーティング
方法。 ２、前記基板をＮＣテーブル上に設置し、該ＮＣテーブ
ルとともに該基板を移動せしめ、該ＮＣテーブルの上方
に配設されたマイクロディスペンサから塗出する光また
は熱硬化性の樹脂により前記帯状ダムを形成する前記特
許請求の範囲第１項記載の方法。[Claims] 1. A resin coating method in which a resin is coated on a substrate to which a circuit element is fixed so as to cover a predetermined circuit element, and a band-shaped dam is formed in advance around the area where the resin is to be coated. A resin coating method characterized by: 2. Place the substrate on an NC table, move the substrate together with the NC table, and apply light or thermosetting resin from a microdispenser placed above the NC table to the band-shaped dam. A method according to claim 1 for forming.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18030681A JPS5882541A (en) | 1981-11-12 | 1981-11-12 | Resin coating method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18030681A JPS5882541A (en) | 1981-11-12 | 1981-11-12 | Resin coating method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5882541A true JPS5882541A (en) | 1983-05-18 |
Family
ID=16080897
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18030681A Pending JPS5882541A (en) | 1981-11-12 | 1981-11-12 | Resin coating method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5882541A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60231387A (en) * | 1984-04-28 | 1985-11-16 | 石井 銀弥 | Method of coating photosensitive solution of substrate for printed circuit |
| JPH01290292A (en) * | 1988-05-18 | 1989-11-22 | Abisare:Kk | Conductive circuit board having dam for blocking outflow of sealant |
| JPH0614994U (en) * | 1992-07-29 | 1994-02-25 | 株式会社創成電子 | Experience Metronome |
| JPH11354554A (en) * | 1998-06-09 | 1999-12-24 | Tokin Corp | Method of encapsulating ic chip and manufacture of ic card |
| JP2010118634A (en) * | 2008-11-12 | 2010-05-27 | Samsung Electro-Mechanics Co Ltd | Printed circuit board having flow preventing dam and manufacturing method therefor |
-
1981
- 1981-11-12 JP JP18030681A patent/JPS5882541A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60231387A (en) * | 1984-04-28 | 1985-11-16 | 石井 銀弥 | Method of coating photosensitive solution of substrate for printed circuit |
| JPH0469440B2 (en) * | 1984-04-28 | 1992-11-06 | Ginya Ishii | |
| JPH01290292A (en) * | 1988-05-18 | 1989-11-22 | Abisare:Kk | Conductive circuit board having dam for blocking outflow of sealant |
| JPH0614994U (en) * | 1992-07-29 | 1994-02-25 | 株式会社創成電子 | Experience Metronome |
| JPH11354554A (en) * | 1998-06-09 | 1999-12-24 | Tokin Corp | Method of encapsulating ic chip and manufacture of ic card |
| JP2010118634A (en) * | 2008-11-12 | 2010-05-27 | Samsung Electro-Mechanics Co Ltd | Printed circuit board having flow preventing dam and manufacturing method therefor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5019209A (en) | Method of manufacturing and using a carrier tape for bonding IC devices | |
| JPH02501692A (en) | Hermetic barrier for thick film hybrid circuits | |
| WO1997028673A1 (en) | Polymer based circuit and method of making same | |
| DE59502482D1 (en) | Base film for chip card | |
| DE69738278D1 (en) | A method of manufacturing a thin semiconductor film containing electronic devices | |
| JPS5882541A (en) | Resin coating method | |
| JPH10224010A (en) | Method for manufacturing circuit board assembly | |
| EP0942818A1 (en) | Method for encapsulating a chip on a carrier | |
| US8042267B2 (en) | Method for producing microsystems | |
| JP4120577B2 (en) | Resin coating method for semiconductor element and liquid crystal display device | |
| JPH04179184A (en) | Printed wiring board and manufacture thereof | |
| AU2009233620B2 (en) | Electronic Devices in Plastic | |
| JPH02117195A (en) | Formation solder resist layer of circuit substrate | |
| JP2003234372A (en) | System and method for making integrated circuit die match with integrated circuit board | |
| KR20010059922A (en) | removal device for cover film in adhesive for adhesion of semiconductor chip and removal method for cover film use of it | |
| JPH11330658A (en) | Printed wiring board and manufacture thereof | |
| JPS6218778A (en) | Mold type magnetoresistance element | |
| EP0500235A1 (en) | Protecting tape automated bonding devices | |
| CN105972017A (en) | Automatic dispensing control method | |
| JPH04119643A (en) | Formation of positioning hole for tape carrier package | |
| JP2748657B2 (en) | Semiconductor device | |
| JPH0249488A (en) | Printed wiring board and manufacture thereof | |
| JPS628531A (en) | Method of mounting electronic device | |
| JP2835329B2 (en) | Semiconductor element sealing method | |
| CN104112674B (en) | Method for manufacturing semiconductor package |