JPS5881936U - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS5881936U JPS5881936U JP17671881U JP17671881U JPS5881936U JP S5881936 U JPS5881936 U JP S5881936U JP 17671881 U JP17671881 U JP 17671881U JP 17671881 U JP17671881 U JP 17671881U JP S5881936 U JPS5881936 U JP S5881936U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor equipment
- stem
- paste
- chip
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Butt Welding And Welding Of Specific Article (AREA)
- Die Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、本考案の一実施例に於けるグイボンディング
を行い度いステムを示す斜視図、第２図は、本考案の一
実施例に於けるグイ、ボンディングを行い度いチップを
示す斜視図、第３図は同じくグイボンディング完了後の
ステム、ペースト、チップの状態を表わす断面図、第４
図は同じくチップの平面図、第５図は同じくスクラブ後
のペースト必要量に塗布面積を表わすチップ平面図、第
６図は同じ（ステムの表面に溝を形成した事を表わす斜
視図、第７図はその断面図である。
１・・・ステム、３・・・半導体チップ、４・・・ペー
スト。FIG. 1 is a perspective view showing a stem that has been bonded and reinforced in an embodiment of the present invention, and FIG. 2 is a perspective view of a tip that has been bonded and reinforced in an embodiment of the present invention. Figure 3 is a perspective view, and Figure 3 is a cross-sectional view showing the state of the stem, paste, and chip after Gui bonding is completed.
Figure 5 is a plan view of the chip showing the required amount of paste after scrubbing and the applied area; Figure 6 is the same (a perspective view showing grooves formed on the surface of the stem; The figure is a cross-sectional view of the same. 1... Stem, 3... Semiconductor chip, 4... Paste.
Claims (1)
ペーストの流動性をよ＜シ、ペースト塗布面積を増加さ
せる事が出来るようにしたことを特徴とする半導体装置
。1. A semiconductor device characterized in that grooves are formed in a stem or a chip to improve the fluidity of the paste during scrubbing and to increase the paste application area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17671881U JPS5881936U (en) | 1981-11-30 | 1981-11-30 | semiconductor equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17671881U JPS5881936U (en) | 1981-11-30 | 1981-11-30 | semiconductor equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5881936U true JPS5881936U (en) | 1983-06-03 |
Family
ID=29969929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17671881U Pending JPS5881936U (en) | 1981-11-30 | 1981-11-30 | semiconductor equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5881936U (en) |
-
1981
- 1981-11-30 JP JP17671881U patent/JPS5881936U/en active Pending
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