JPS587829A - Dry etching method - Google Patents

Dry etching method

Info

Publication number
JPS587829A
JPS587829A JP10546881A JP10546881A JPS587829A JP S587829 A JPS587829 A JP S587829A JP 10546881 A JP10546881 A JP 10546881A JP 10546881 A JP10546881 A JP 10546881A JP S587829 A JPS587829 A JP S587829A
Authority
JP
Japan
Prior art keywords
etching
polycrystalline
etched
plasma
cathode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10546881A
Other languages
Japanese (ja)
Other versions
JPH031825B2 (en
Inventor
Haruo Okano
晴雄 岡野
Yasuhiro Horiike
靖浩 堀池
Takashi Yamazaki
隆 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10546881A priority Critical patent/JPS587829A/en
Publication of JPS587829A publication Critical patent/JPS587829A/en
Publication of JPH031825B2 publication Critical patent/JPH031825B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Abstract

PURPOSE:To preform ethcing with good selectivity at high speed devoid of burrs, by improving a cathode surface and mixed gas. CONSTITUTION:The etching gas introduced from a gas inlet 5 is discharged by the high frequency power 10 impressed via a matching circuit 9 and dissociated resulting in a plasma formation. The electrode 2 is provided on a reaction vessel 4 to an integral body, thus forming an anide, and a negative dc voltage generates on the catode 1 being accelerated by positive ions in the plasma resulting in collision to a substrate 3. In a dry etching method for etching, the surface of the cathode 1 whereon an ethcing material 3 is placed is coverted with a carbon plate or an organic film 1' of hydrocarbons. Besides, a plasma is generated from the mixed gas of SF6 and Cl2. Thus, a polycrystalline Si, high melting point metal, etc. are well etched.

Description

【発明の詳細な説明】 本発明は、隼績晶シリコン、あるいは、ゲート材料であ
る多結晶シリコン、Mo等の高融点金属及びそのシリサ
イド層の酸化シリコン(8102)に対する選択エツチ
ングに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to selective etching of crystalline silicon, polycrystalline silicon as a gate material, high melting point metal such as Mo, and silicon oxide (8102) of its silicide layer.

近年集積回路は微細化の一途をえどり,最近では最小寸
法が1〜2μmの超LSIも試作されるに至っている.
この微細加工には、通常平行平板型電極を有する反応容
器に、反応性のガスを導入し被エツチング材料載置の電
極(陰極)に高周波電力(例えば1 3.5 6 MH
z )を印加することによりグロー放電を発生させ.[
子とイオンの易aiのaにより生じる陰極(高周波電力
印加の電極)面上の負電位により、前記グロー放電中の
正イオンを加速して被エツチング物に衝突させ,物理/
化学的な反応を利用し九反応性イオンエッチング法(R
eactive Ion EtchingrRIB )
が用いられテイル。
In recent years, integrated circuits have become increasingly miniaturized, and even ultra-LSIs with minimum dimensions of 1 to 2 μm have recently been prototyped.
For this microfabrication, a reactive gas is usually introduced into a reaction vessel having parallel plate electrodes, and a high frequency power (e.g. 1 3.5 6 MH) is applied to the electrode (cathode) on which the material to be etched is placed.
z) to generate a glow discharge. [
The positive ions in the glow discharge are accelerated by the negative potential on the surface of the cathode (electrode to which high-frequency power is applied) caused by the ai of the particles and ions, causing them to collide with the object to be etched.
Nine reactive ion etching methods (R
active Ion EtchingrRIB)
is used for tail.

第1図は、実際にエツチングに用いられる平行平板電極
間 略図を示すものである。同図において、ガス導入口(5
)よシ導入され九エッチングガスは,整合回路(9)を
介して印加されるIIil!iJ1ItIL電力d場に
より放電、解離され、プラズマを形成する。そして、上
記した様に、陰極(1)上には負の直流電圧が発生し、
プラズマ中の正イオンはこの電界により加速されて被エ
ツチング物(3)に衝突し、エツチングを行うものであ
る。一方、陰極tl)の対向電極(2)は、反応容器(
4)と1体化して陽極を形成し、この陽極上の電位は、
プラズマから見て高々20〜3Qev程度の降下電圧し
か発生せず、イオン衝撃の効果は、陰極(1)上に比較
してかなシ小さいと考えられる。以上説明し九様に、I
ILIFlにおいてはプラズマ中の正イオン衝撃による
1方性を積極的に利用しているためにアンダカットなく
、垂直なエツチング壁をもった微細加工が達成されるこ
とに表る。しかしながら塩素((Jz)を含むガスによ
る高濃度不純物添加の多結晶8j等のエツチングでは次
の様な問題が生じる。すなわと、第2図(a)はレジス
トIをマスクにして、P−ドープ多結品別を、例えばC
BrFv/Cj21スによシエッチングし死時のエツチ
ング形状を示したものであり、  8102αlと多結
晶8iQlの界面において、a4で示し九様なえぐれが
発生し、さらにオーバエツチングを行うとエツチング壁
は逆テーパ状0にエツチングが進行することが知られて
いる。IBMのMogab等によれば、CF4/C12
等の混合ガスによる多結晶SLのエツチングにおいて、
主エツチング橿は、表面に吸着し、イオン衝撃によりエ
ネルギを与えられ九Cl原子でわると信われており、か
つ、このC4とP 、 As等の不純物を高濃度に添加
した多結晶S+の反応性は極めて大きく、従って、下地
5I02までエツチングが進行した後、表面に帯伍する
C1は、表面拡散により多結晶S!エッヂに遼し、この
部分を選択的にエツチングしていくために、同図(a)
−04に示した様なエグレが発生するものと考えられて
いる。
FIG. 1 shows a schematic diagram of parallel plate electrodes actually used for etching. In the same figure, the gas inlet (5
), the etching gas is applied via a matching circuit (9). iJ1ItIL is discharged and dissociated by the power d field to form a plasma. Then, as mentioned above, a negative DC voltage is generated on the cathode (1),
Positive ions in the plasma are accelerated by this electric field and collide with the object to be etched (3) to perform etching. On the other hand, the counter electrode (2) of the cathode tl) is connected to the reaction vessel (
4) to form an anode, and the potential on this anode is
Seen from the plasma, only a voltage drop of about 20 to 3 Qev is generated at most, and the effect of ion bombardment is considered to be much smaller than that on the cathode (1). Having explained the above, I
In ILIFl, the unidirectionality caused by positive ion bombardment in the plasma is actively utilized, so that microfabrication with vertical etched walls without undercuts can be achieved. However, the following problem occurs when etching polycrystalline 8j etc. to which high concentration of impurities is added using gas containing chlorine ((Jz). In other words, in FIG. 2(a), resist I is used as a mask and P- For example, C
This figure shows the etched shape at the time of death after etching with BrFv/Cj21. At the interface of 8102αl and polycrystalline 8iQl, nine different gouges are generated as shown by a4, and when overetching is performed, the etching wall becomes It is known that etching progresses in a reverse tapered shape. According to IBM's Mogab et al., CF4/C12
In etching polycrystalline SL with a mixed gas such as
The main etching rod is believed to be adsorbed on the surface and energized by ion bombardment and destroyed by 9Cl atoms, and is caused by the reaction between C4 and polycrystalline S+ to which impurities such as P and As are added at high concentrations. Therefore, after etching progresses to the base layer 5I02, C1 that is attached to the surface becomes polycrystalline S! due to surface diffusion. In order to selectively etch this part by approaching the edge,
It is thought that an aggravation like that shown in -04 will occur.

(C、J 、 Mogab他、J、Vac、8ci、T
ehnol 、17L3)、 721(1980))ま
た、同図(b)に示した様に、レジストIと多結晶st
 <1邊の間に熱酸化PAaηが挿入されている場合に
は、多結晶8iQ3と前記熱酸化膜αηの界面にもエグ
レa槌が生じる。これは、多結晶8iを酸化した時、P
のa度分布がパイ、ルアツブ現   □象により、バル
ブ内に比較して界面付近が高濃度になっているために、
エグレが入りゃすいものと考えられる。
(C, J, Mogab et al., J, Vac, 8ci, T
ehnol, 17L3), 721 (1980)) Also, as shown in the same figure (b), resist I and polycrystalline st
When the thermally oxidized PAaη is inserted between <1 edge, an egre a-hammer also occurs at the interface between the polycrystalline 8iQ3 and the thermally oxidized film αη. This is because when polycrystalline 8i is oxidized, P
Due to the a-degree distribution of the pi-ruatsubu phenomenon, the concentration near the interface is higher than that inside the bulb.
It is thought that it is easy for Egret to enter.

以上説明し九二グレは、動作圧力を下げることにより改
善されるが、1方、圧力の低下とともに、前記陰極面上
の直流電圧も大きくなるため、 8102のエツチング
速度も大きくなり、従りて、多結晶St/8i02比の
低下をまねき、事実上使用できないツカ現状テアル。?
−(D 様K CHF5 +C12、CF4 +C12
では特真なえぐれが生じ、えぐれを改善しようとして圧
力を下げると選択比が低下するという問題があった。
As explained above, the 92 grating can be improved by lowering the operating pressure, but on the other hand, as the pressure decreases, the DC voltage on the cathode surface also increases, so the etching rate of 8102 also increases. , resulting in a decrease in the polycrystalline St/8i02 ratio, making it practically unusable. ?
-(D-sama K CHF5 +C12, CF4 +C12
However, there was a problem in that special gouges occurred, and when the pressure was lowered in an attempt to improve the gouges, the selectivity decreased.

一方、 SPa + CI+ Ar等の不活性ガスを用
いて多結晶Siのエツチングを行なう方法が最近提案さ
れた(特開昭55−119177)、このガスの組み合
わせによシ、高い選択比(>40)が得られるが、多結
晶8iのエツチング速度は著しく遅く、実用には向かな
い。又、前記41Aなえぐれについても何ら言及されて
いない。
On the other hand, a method of etching polycrystalline Si using an inert gas such as SPa + CI + Ar has recently been proposed (Japanese Unexamined Patent Publication No. 119177/1983). ), but the etching speed of polycrystalline 8i is extremely slow and is not suitable for practical use. Furthermore, there is no mention of the above-mentioned 41A cutout.

本発明は高速かつ選択性良く、シかもエグレが発生しな
いドライエツチング方法を提供するものであり、陰極表
面を炭素板又は炭化水素系の有機膜で覆い六沸化イオウ
(8Fs)と塩素(C/2)の混合ガスのみからガスプ
ラズマを発生させる事によって上記目的が4成される事
を見い出したものである。
The present invention provides a dry etching method that is fast, has good selectivity, and does not cause erosion. The cathode surface is covered with a carbon plate or a hydrocarbon-based organic film, and sulfur hexafluoride (8Fs) and chlorine (C It has been discovered that the above objects can be achieved by generating gas plasma only from the mixed gas of /2).

以下、本発明の実施例を図面を参照して説明する。第3
図、第4図は夫々SF6のみを用いた時のSF4力、及
び圧力に対する単結晶シリコン(a)、P−ドーフ多結
晶シリコン(b) s  5102 (C)のエツチン
グ速度及び多結晶シリコン/SiO2比(d)を示すも
のである。SF6単体の場合、SF4力の増加とともに
、各材料のエツチング速度は次第に増加するが選択比と
しては逆に小さくなっていく。第3図は0.05Tor
rの条件であり、シリコンのエツチング速度5000X
/minで選択比は10以下である。また、圧力の増加
に対して、多結1別、単結晶81のエツチング速度はQ
、Q 5 ’ror r付近で最大値となり、その後一
旦低下した後、急速に上昇しはじめる。こ急上昇の領域
はいわゆるプラズマ二ッ、チング領穢と考えられる。一
方、5i02のエツチング速度は、圧力の上昇とともに
小さくなシ従って、選択比は圧力の上昇とともに急速に
大きくなる。しかしながら、sF’6単体の場合には、
いずれの領域においテモオーパエッチングに対して必ず
アンダーカットが生じ実際には使用できないこ石が判明
した。
Embodiments of the present invention will be described below with reference to the drawings. Third
Figure 4 shows the SF4 force and pressure when only SF6 is used, and the etching rate and polycrystalline silicon/SiO2 of single crystal silicon (a), P-Dorff polycrystalline silicon (b) and s5102 (C). This shows the ratio (d). In the case of SF6 alone, as the SF4 force increases, the etching rate of each material gradually increases, but the selectivity decreases. Figure 3 shows 0.05 Tor
The conditions are r, and the etching rate of silicon is 5000X.
/min and the selection ratio is 10 or less. In addition, with respect to the increase in pressure, the etching rate of polycrystalline 1 and single crystal 81 is Q
, Q 5 'ror It reaches its maximum value near r, then once decreases, and then begins to increase rapidly. This region of rapid increase is considered to be the so-called plasma pollution region. On the other hand, the etching rate of 5i02 decreases as the pressure increases, so the selectivity increases rapidly as the pressure increases. However, in the case of sF'6 alone,
It was found that undercuts were always caused by Temooper etching in all areas, making the stones unusable.

これに対して、第5図は、SF60.02Torrに固
定したままs ”12を添加し、エツチング室内の圧力
を0.05 Torr yC14整した時のエツチング
特性を示したものである。FLFIE力は200Wであ
る。第3図、第4図と同様、陰極(1)は炭素(C)の
薄板(1)で覆っである。これは炭化水素系の有機膜、
例えばポリエステルでも良い。第5図でs c12添加
に対して、Si及び引02のエツチング速度(a) (
C)は次第に減少し続けるのに対して、多結晶S1のエ
ツチング速W (b)はC1h添加に対して完全に飽和
するという結果が得られた。また、同図よシ明らかな様
に多結II&stのエツチング速度はs ”12添加に
もかかわらず約350017m1 nという直が得られ
On the other hand, Fig. 5 shows the etching characteristics when s''12 is added while fixing SF60.02 Torr and the pressure in the etching chamber is adjusted to 0.05 Torr yC14.FLFIE force is 200 W. Similar to Figures 3 and 4, the cathode (1) is covered with a carbon (C) thin plate (1).This is a hydrocarbon-based organic film,
For example, polyester may be used. Figure 5 shows the etching rate (a) of Si and 02 with respect to the addition of sc12 (
The results showed that the etching rate W (b) of polycrystalline S1 was completely saturated with the addition of C1h, whereas C) continued to gradually decrease. Further, as is clear from the figure, the etching rate of the polycrystalline II&st was approximately 350017 m1n despite the addition of s''12.

5102の選択比は、例えば、圧力比(C1zの分圧/
 8F、の分圧)が2.0の点で40倍以上という非常
に高い値が得られた。また、圧力比0.25 、0.5
 。
The selection ratio of 5102 is, for example, the pressure ratio (partial pressure of C1z/
At a point of 2.0 (partial pressure of 8F), a very high value of more than 40 times was obtained. Also, the pressure ratio is 0.25, 0.5
.

1.0 、2.0の各々の点でのSMM−察結果(第6
図aは8F6ノミ、b ハC1z/8Fs O,25、
Cハ0.5 以上)から第5図において多結晶Siのエ
ツチング速度が飽和する領域、すなわち、 Cj2/S
P6圧力比≧0.5では、オーバエツチングに対して、
マスク下のアンダカットは全く入らず、かつ、前記エグ
レも全く発生しないことが解った。
SMM-inspection results at each point of 1.0 and 2.0 (6th
Figure a is 8F6 chisel, b is C1z/8Fs O,25,
Cj2/S) to the region where the etching rate of polycrystalline Si is saturated in FIG.
At P6 pressure ratio ≧0.5, against overetching,
It was found that there was no undercut under the mask, and that the aggregation did not occur at all.

なお、圧力比0.25の時に得られる形状は、マスクの
下にはアンダカットは入らず、逆テーパ状にエツチング
される。以上説明した様に、本発明によれば8P6 +
 C12のみ、すなわち、不活性ガス等の添加なしにエ
ツチングすることにより8i02との充分高い選択比が
得られ、かつ、多結晶87のエツチング速度を肯い値に
保てることができ、さらに、エグレもなく垂直にエツチ
ングされることがら、エツチングのマージンが大巾に広
く取ることができる。以上示した結果の詳細については
、現在充分解明されて鱒ないが、第7図、第8図に示し
た8F6+H2の結果からアンダーカットについては以
下の様な推察が可能と考えられる。第7図は、SF6に
H2を添加した場合のエツチング特性であり、H2の添
加とともに多結晶Si、別のエツチング速度(4は次第
に減少し、ついには8102のエツチング速度(kII
に等しくなることがわかった。このH2の役割は、 8
F6から解離し九Ffi子の除・去効果にあると考えら
れ(H+F−+HF)、多蓋のH2を添加した場合には
% SFX+イオンのみによシエッチングが進行してい
くと考えられる。第8図は、選択エツチングが行なわれ
るSF@とH2の圧力比が0.5の点での■N観察結果
でTo17.マスク下のアンダカットを生じながらかつ
、逆テーパ状にエツチングが行われることがわかった。
Note that the shape obtained when the pressure ratio is 0.25 has no undercut under the mask, but is etched in a reverse tapered shape. As explained above, according to the present invention, 8P6 +
By etching only C12, that is, without adding an inert gas, a sufficiently high selectivity with respect to 8i02 can be obtained, and the etching rate of polycrystalline 87 can be maintained at a positive value. Since the etching is done vertically, the etching margin can be widened. Although the details of the results shown above have not been fully elucidated at present, it is thought that the following inferences can be made regarding the undercut from the results of 8F6+H2 shown in FIGS. 7 and 8. Figure 7 shows the etching characteristics when H2 is added to SF6. With the addition of H2, polycrystalline Si etching, another etching rate (4) gradually decreases, and finally the etching rate of 8102 (kII
It was found to be equal to The role of this H2 is 8
This is thought to be due to the removal effect of nine Ffi molecules dissociated from F6 (H+F-+HF), and it is thought that when multiple H2 is added, etching progresses only by %SFX+ ions. Figure 8 shows the results of ■N observation at a point where the pressure ratio of SF@ and H2 is 0.5, where selective etching is performed.To17. It was found that etching was performed in a reverse taper shape while creating an undercut under the mask.

これに対して5atEe図に示し九様に、 8F、とC
1zの圧力比0.25の場合には、マスク下のア/ダカ
ットは入らずに逆テーパ状にエツチングが行われており
、これら2つの結果から、 C12の多結晶Stの−へ
の吸着がマスク下のアンダカットを防止していることが
考えられる(第8図のアンダカットはF原子によると考
えられる)。
On the other hand, as shown in Figure 5atEe, 8F, and C
When the pressure ratio of 1z is 0.25, the etching is performed in a reverse taper shape without entering the a/da cut under the mask. From these two results, it is possible that the adsorption of C12 polycrystalline St to - It is thought that this prevents undercuts under the mask (the undercuts in FIG. 8 are thought to be caused by F atoms).

以上、不純物がドープされた多結晶7リコンについて述
べたが、単結晶Si1高融点金属、及びそのクリサイド
に置き換えても良好にエツチングする事が出来る。
Although the polycrystalline 7-licon doped with impurities has been described above, good etching can be achieved even if it is replaced with single crystal Si1 high melting point metal and its crystalide.

【図面の簡単な説明】[Brief explanation of the drawing]

プ多多晶Stをエツチングした時のエグレを説明するた
めの断面図%第3図、第4図は、SF6単体ガスを用い
た時のRF WIL力、圧力に対する多結晶Si。 単結晶8 i 、S i02のエツチング特性図、第5
図はSF6にC12を添加した時のエツチング特性図、
第6図fa) 、 (b) 、 (C)はSF6とC1
zの圧力比を変えた時の断面図、第7図は8F6にH2
を添加した時のエツチング特性図%faB図は、SF6
/I(2で多留晶Siをエツチングした時の断面図であ
る。図において、(1)・・・陰極、(1)・・・炭素
板、(2)・・・陽極、(3)・・・被エツチング材断
、(4)・・・反応容!、+5)・・・ガス導入口、(
6)・・・水冷パイプ、(7)・・・テフロン、(8)
・・・排気系、(9)・・・マツチング回路、il・・
・高周波電源、aum@−・・レジX )、α21.2
1) r2412!9 # 、、、多結晶3i、I・・
・エツチング後の逆ガーパ部s Q4) [F4ttl
・・エグレ、u!19 rB3 @ −8j02、[e
f2m21・jlfjfa+ st 。 代理人 弁理士 則 近 憲 佑 (ほか1名) 第1図 i1三 第2図 (久〕 (b) 第3図 ン 票− V 日>〜 RF電幻(IF、、) −141,− 第6図 ?3 m:)23 第7図 月n比(〜偽l) 第8図 〜評
Figures 3 and 4 are cross-sectional views for explaining the erosion when polycrystalline St is etched. Figures 3 and 4 show polycrystalline Si versus RF WIL force and pressure when using SF6 simple gas. Etching characteristic diagram of single crystal 8i, Si02, 5th
The figure shows the etching characteristics when C12 is added to SF6.
Figure 6 fa), (b) and (C) are SF6 and C1
A cross-sectional view when changing the pressure ratio of z, Figure 7 shows 8F6 and H2
The etching characteristic diagram %faB diagram when SF6 is added is
/I(2) is a cross-sectional view when polycrystalline Si is etched. In the figure, (1)... cathode, (1)... carbon plate, (2)... anode, (3)... ... Cutting of material to be etched, (4) ... Reaction volume!, +5) ... Gas inlet, (
6)...Water cooling pipe, (7)...Teflon, (8)
...Exhaust system, (9)...Matching circuit, IL...
・High frequency power supply, aum@-...Register X), α21.2
1) r2412!9 # , polycrystalline 3i, I...
・Reverse gapper part s after etching Q4) [F4ttl
...Egret, u! 19 rB3 @ -8j02, [e
f2m21・jlfjfa+ st. Agent Patent attorney Kensuke Chika (and 1 other person) Figure 1 I13 Figure 2 (Ku) (b) Figure 3 - V 日>~ RF Dengen (IF,,) -141,- No. Figure 6?3 m:)23 Figure 7 Moon n ratio (~false l) Figure 8 ~ Review

Claims (1)

【特許請求の範囲】 11)平行平板電極間に高周波電力印加してガスプラズ
マを発生させ、高周波電源が接続された側の電極に被エ
ツチング物を置いてエツチングするドライエツチング方
法に於いて、被エツチング物が置かれる陰極表面を炭素
板、又は炭化水素系の有機膜で覆い、六弗化イオウ(S
F’6)及び塩素(Oh)の混合ガスから前記ガスプラ
ズマを発生させるようにし九事を特徴とするドライエツ
チング方法。 (2)被エツチング物として単結晶シリコン、不純物が
導入された多結晶シリコン、尚融点金属、又は高融点金
属の7リサイドを用いる事を特徴とする特許 ング方法。
[Scope of Claims] 11) In a dry etching method in which gas plasma is generated by applying high frequency power between parallel plate electrodes, and the object to be etched is placed on the electrode connected to the high frequency power source, the object to be etched is etched. The cathode surface on which the etching material is placed is covered with a carbon plate or a hydrocarbon-based organic film, and sulfur hexafluoride (S
A dry etching method characterized in that the gas plasma is generated from a mixed gas of F'6) and chlorine (Oh). (2) A patented method characterized by using monocrystalline silicon, polycrystalline silicon into which impurities have been introduced, a still melting point metal, or a high melting point metal 7 reside as the object to be etched.
JP10546881A 1981-07-08 1981-07-08 Dry etching method Granted JPS587829A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10546881A JPS587829A (en) 1981-07-08 1981-07-08 Dry etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10546881A JPS587829A (en) 1981-07-08 1981-07-08 Dry etching method

Publications (2)

Publication Number Publication Date
JPS587829A true JPS587829A (en) 1983-01-17
JPH031825B2 JPH031825B2 (en) 1991-01-11

Family

ID=14408408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10546881A Granted JPS587829A (en) 1981-07-08 1981-07-08 Dry etching method

Country Status (1)

Country Link
JP (1) JPS587829A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6415953A (en) * 1987-07-10 1989-01-19 Hitachi Ltd Dry etching method
US4981816A (en) * 1988-10-27 1991-01-01 General Electric Company MO/TI Contact to silicon
US5180466A (en) * 1984-12-29 1993-01-19 Fujitsu Limited Process for dry etching a silicon nitride layer
WO2004030068A1 (en) * 2002-09-23 2004-04-08 Ihp Gmbh - Innovations For High Performance Microelectronics / Institut Für Innovative Mikroelektronik Method for the production of an electronic component comprising a praseodymium oxide layer
JP4865915B1 (en) * 2010-10-22 2012-02-01 泉 菅谷 Portable magnifying lens with threading function
US9130444B2 (en) 2007-01-18 2015-09-08 Siemens Aktiengesellschaft Rotary drive with straight primary part segments

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437580A (en) * 1977-08-30 1979-03-20 Nec Corp Dry etching method and target film used for it
JPS55119177A (en) * 1979-02-21 1980-09-12 Ibm Silicon etching method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437580A (en) * 1977-08-30 1979-03-20 Nec Corp Dry etching method and target film used for it
JPS55119177A (en) * 1979-02-21 1980-09-12 Ibm Silicon etching method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5180466A (en) * 1984-12-29 1993-01-19 Fujitsu Limited Process for dry etching a silicon nitride layer
JPS6415953A (en) * 1987-07-10 1989-01-19 Hitachi Ltd Dry etching method
US4981816A (en) * 1988-10-27 1991-01-01 General Electric Company MO/TI Contact to silicon
WO2004030068A1 (en) * 2002-09-23 2004-04-08 Ihp Gmbh - Innovations For High Performance Microelectronics / Institut Für Innovative Mikroelektronik Method for the production of an electronic component comprising a praseodymium oxide layer
DE10244862B4 (en) * 2002-09-23 2006-09-14 IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik Method for producing an electronic component with a praseodymium oxide layer
US9130444B2 (en) 2007-01-18 2015-09-08 Siemens Aktiengesellschaft Rotary drive with straight primary part segments
JP4865915B1 (en) * 2010-10-22 2012-02-01 泉 菅谷 Portable magnifying lens with threading function

Also Published As

Publication number Publication date
JPH031825B2 (en) 1991-01-11

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