JPS5877057U - Resin-encapsulated semiconductor device - Google Patents

Resin-encapsulated semiconductor device

Info

Publication number
JPS5877057U
JPS5877057U JP17103681U JP17103681U JPS5877057U JP S5877057 U JPS5877057 U JP S5877057U JP 17103681 U JP17103681 U JP 17103681U JP 17103681 U JP17103681 U JP 17103681U JP S5877057 U JPS5877057 U JP S5877057U
Authority
JP
Japan
Prior art keywords
die pad
lead wire
external lead
frame
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17103681U
Other languages
Japanese (ja)
Inventor
土橋 宏二
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP17103681U priority Critical patent/JPS5877057U/en
Publication of JPS5877057U publication Critical patent/JPS5877057U/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図Aは従来の樹脂封止形半導体装置の一例を示す平
面図、第1図Bは第1図AのIB−IB線での断面図、
第2図はこの考案の一実施例の樹脂封止形半導体装置を
示す平面図である。 図において、1は半導体チップ、2はダイパッド部、3
はダイパッド支持用外部リード線、4は電極引出し用外
部リード線、5は内部リード線、6は封止用樹脂である
。なお、図中同一符号はそれぞれ同一もしくは相当部分
を示す。
FIG. 1A is a plan view showing an example of a conventional resin-sealed semiconductor device, FIG. 1B is a sectional view taken along line IB-IB in FIG. 1A,
FIG. 2 is a plan view showing a resin-sealed semiconductor device according to an embodiment of this invention. In the figure, 1 is a semiconductor chip, 2 is a die pad part, and 3 is a semiconductor chip.
4 is an external lead wire for supporting the die pad, 4 is an external lead wire for leading out electrodes, 5 is an internal lead wire, and 6 is a sealing resin. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フレーム部分と、ダイパッド部と、上記フレーム部分か
ら上記ダイパッド部の近傍まで伸びるように設けられた
電極引出し用外部リード線と、上記ダイパッド部の周縁
端面から伸びて上記ダイパッド部を上記フレーム部分に
支持させるように設けられ上記電極引出し用外部リード
線の断面形状と同一の断面形状を有するダイパッド支持
用外部リード線とを備えたリードフレームの上記ダイパ
ッド部に半導体チップを装着し、上記電極引出し用外部
リード線とこれに対応する上記半導体チップの電極とを
内部リード線で接続し、上記半導体チップ、上記ダイパ
ッド部、上記電極引出し用外部リード線の所要部分、上
記ダイパッド支持用外部リード線の所要部分および上記
内部リード線を封止用樹脂で封止したのち、上記リード
フレームの上記フレーム部分を除去してなるものにおい
て、上記ダイパッド支持用外部リード線を上記ダイパッ
ドの周縁端面部の複数箇所にそれぞれ複数本配設したこ
とを特徴とする樹脂封止形半導体装置。
a frame portion, a die pad portion, an external lead wire for drawing out an electrode provided so as to extend from the frame portion to the vicinity of the die pad portion, and an external lead wire extending from the peripheral end surface of the die pad portion to support the die pad portion on the frame portion. A semiconductor chip is mounted on the die pad portion of a lead frame, which is provided with an external lead wire for supporting a die pad and has the same cross-sectional shape as the external lead wire for leading out the electrode. A lead wire and a corresponding electrode of the semiconductor chip are connected by an internal lead wire, and the semiconductor chip, the die pad portion, a required portion of the external lead wire for leading out the electrode, and a required portion of the external lead wire for supporting the die pad are connected. and a device obtained by sealing the internal lead wires with a sealing resin and then removing the frame portion of the lead frame, wherein the die pad supporting external lead wires are placed at multiple locations on the peripheral end surface of the die pad, respectively. A resin-sealed semiconductor device characterized in that a plurality of semiconductor devices are provided.
JP17103681U 1981-11-16 1981-11-16 Resin-encapsulated semiconductor device Pending JPS5877057U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17103681U JPS5877057U (en) 1981-11-16 1981-11-16 Resin-encapsulated semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17103681U JPS5877057U (en) 1981-11-16 1981-11-16 Resin-encapsulated semiconductor device

Publications (1)

Publication Number Publication Date
JPS5877057U true JPS5877057U (en) 1983-05-24

Family

ID=29962976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17103681U Pending JPS5877057U (en) 1981-11-16 1981-11-16 Resin-encapsulated semiconductor device

Country Status (1)

Country Link
JP (1) JPS5877057U (en)

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