JPS5876795A - Timing circuit - Google Patents

Abstract

PURPOSE:To make possible a high resolution timing with a simple structure, by a method wherein clock pulses are time-voltage converted to improve timing resolution. CONSTITUTION:A gate output from an RS type FF3 controlled by transmitting and receiving pulses, and an output from an oscillator 1 through an RS type FF2 are frequency divided and applied to a counter 7 through AND gates 4 and 5, and an RS type FF6. The counter 7 counts clocks during gating period. On the other hand, the fractions of the clocks are converted to the voltage by an integrator 11 or 12 controlled by the FF6 etc. A microcomputer 14 culculates the time corresponding to the distance between the transmitting and receiving pulses etc. by summing the counting value of the counter 7 and the output of the integrator 11 or 12 selected according to an output applied from a timer 8 which is controlled through a FF3. According to the present structure, the high resolution timing is possible by the simple structure, as it is not utilize high frequency clocks.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a timing circuit that measures the time interval between a transmitted pulse and a received pulse (reflected pulse) that has been reflected and returned to its original position.

Conventionally, this type of measurement method was frequently used to measure distances using light, the thickness of materials using ultrasonic waves, and the axial force of bolts. 1
The time when measuring a distance of 00 m is approximately 0,667 μs, and when using ultrasonic waves to tighten an M36 bolt with a length of 180 tons with an axial force of 90 tons, the time difference from when the axial force is 00 is approximately 0,482 μs. Become. In order to make such a measurement practically with an error of 1%, the time fIllll of ins is
1 GHz frequency measurement had to be carried out in order to make this time measurement.
A counter that operates at a high speed of 1 nS or higher is required, and the circuit structure is expensive and complicated using special parts.

The object of the present invention is to stop using the high-speed counter, count reference pulses with a low frequency of 10 μs to 01 μs, convert the reference pulses into voltage using an integrating circuit, and convert the voltage into frequency or time. By doing so, it is possible to obtain a resolution of 1 ns in fact, and it is intended to provide a simple, inexpensive, and versatile timekeeping circuit.

1, 2, and 3 are respectively a block diagram, a time chart, and an enlarged view of a time chart of the tI time circuit of the present invention.

The configuration of the timekeeping circuit will be described with reference to FIG.

O8Cl has a frequency f of I O0Kl (z to lQMII
This is a crystal oscillator that oscillates with a JJ-shaped wave of z. JK-
The clock (CK) input of F/F2 is connected to the output of O8Cl, and the inputs of the other J and F/F2 are connected to H level, that is, Vce. The R and S inputs of R8-F/F3 are connected to a reception timing pulse (hereinafter referred to as RTP) and a transmission timing pulse (hereinafter referred to as TTP), respectively. The output of the F/F 3 is connected to the inputs of the JK-F/F and 11, respectively. JK-F/F
The Q and Q outputs of 2 are connected to the other inputs of the gates ± and 5, respectively. The outputs of +>iJ gates ± and y are connected to the R and S inputs of R8-F/Ii'', respectively.The Q output of 1i'/Ii'' 5 is connected to the input of counter J, the CPU, It is connected to the interface input of μmCOMH consisting of memory and interface, and to the R input of the integrator. Further, the Q output of the F/F is connected to the S input of the integrator U. The outputs of inverters 9 and 10 are connected to the S inputs of integrating circuits 1 and 1, respectively. The outputs of the integrating circuits 11 and 12 are each connected to the input of a multi-channel A-D converter 13. μmCOM +4
For the input of the interface that connects to the outside,
Counter 7, timer 8 and A, -D: s converter 1
3 outputs are connected respectively. Also μmC0M1
The output of the interface for connecting 4 and the outside is connected to the R input of counter 7. Note that the R input and S input are a reset input and cent manual power, respectively.

Next, with reference to FIGS. 1 to 3, the operation of the clock circuit of the present invention will be further explained.

The output of R8-F/F3, which was initially at L level, is TTP
When RT(3)P is input, it becomes H level, and when RT(3)P is input, it becomes L level again. In this way,
In other words, a gate signal GATE can be obtained as a time interval signal from when TTP is issued to when RTP is returned. JK-F/F2 [Said K-1-(p, number GATE is H
O8Cl output signal CLK of frequency f only when the level is
, and the frequency is f/2 and the images are mutually divided! The phase-inverted Q output and Q output are output 11). When the gate signal is still at the L level, the Q output and the Q output are at the H and L levels, respectively, and are determined regardless of the manual CK, and the output does not change at all.

The AND gates 14 and 5 are connected when the gate signal GATE is H.
The Q and Qll'1 forces of F/F2 are passed only when the level is high. The timer is set to the above-mentioned gate] - One hour after the signal GATE becomes L level again, it becomes H level,
At that time, the output of counter L and A-D converter 13 is sent to μmC0MI4 for 11S! Get into it.

With reference to FIG.
The operation of 0M14 will be explained in detail.

The input waveforms B and C of the gates 4 and 5 are repetitive square waves with inverted phases while the gate (4) signal is at H level. However, when the gate signal becomes L level, the output of XK-F/F 2, in other words, the gate 4 and the input waveforms 9 become H level and L level, respectively. Looking and analyzing the output waveforms of gates 4 and 5 shows that when the gate signal p is at H level, the third gate signal is output with phase inversion.
The waveforms are shown in Figures (a) and (b). Also, when the gate signal becomes L level, the output waveforms of the gate (and the output waveforms of the nose and Makoto) become H level. Therefore, R8-F/F5
While the gate signal P is at the H level, the signals R and S, whose phases are inverted with each other, are operated manually, and the output thereof is only inverted. Further, R8-F/F5 stores the state when the gate signal p becomes L level. for example,
In Fig. 3(a), when the gate signal is at the L level between the output waveforms of JK-F/Fη and the L level,
In other words, the Q output of R8-F'/F5, or the C-IN input of the counter, becomes H level. In FIG. 3(b), when the gate signal SE reaches the L level between the H levels of the output waveform B of JK and -F/F, the input signal G (C-, IN) of the counter I becomes L level. become the level. By counting the human input signal 9 using the counter L, the time for a single journey = TI is set to R1. Furthermore, the R8-F/F5
(in other words, the state of the output of the counter
By inputting (state of C-IN) into μmC0M, it is determined whether the integrator or the ruler is operating.
When the signal 9 is at H level, the integrator operates and its output waveform becomes a sawtooth wave, and its ending voltage is A-D.
The converter operates with the full scale set to f/4 time, and its output waveform length becomes d, dll: wave, and the end voltage is similarly converted into the A-D converter. The value converted into time by the integrator: T3 is measured.The integrator 1 starts integration when the gate signal P is at H level and the R input of the integrator is at H level. When the gate signal P is at the L level, it is discharged. When the gate signal P goes to the L level, the final integrated voltage is held.

The A-D converter 13 selects the integrators 11 and 12 by the selection signal output from μmC0M depending on the level of the C-IN signal G, and then the A-D conversion start signal is selected from μm.
When the signal is output from C0M, the A-D converter 13 operates, and when the conversion is completed, a conversion end signal is output to μmC0M+4, which inputs the output of the A-D converter 13 (at time T2 or T3). At the same time, the time T1 of the counter L is inputted, and the counter 7 is reset.

The measurement time T is such that the above μmC0M+4 is the input signal C-
The time TI of the counter L and the time T2 or T3 of the A-D converter are input, and the calculation is performed based on the state of the input signal C-ING.

1) The time T when C-IN is at H level is T:T,
+T2.

2) The time T when C-IN is at L level is T2TI+T
It is timed as a full scale time of 2 T3. However, the full scale time of T2 (7) is half the time of the clock pulse C-IN.

As explained above, the timing circuit of the present invention does not require any special parts, and even when using an 8bIL A, -D converter, the resolution is 1Qns when the O8Cl frequency is 1MIIz, and the 12biL A -Is it possible to easily obtain resolutions below ins squares by using a D converter? 1) be able to
A simple and inexpensive timing circuit can be provided.

FIG. 4 is a diagram showing an example of application of the present invention to an ultrasonic bolt force (stress) meter.

This device includes a frequency divider for dividing the frequency of O8Cl in the clock circuit of the present invention, a pulse width adjuster 22 for forming a rectangular shock wave at the frequency of the frequency divider, and a pulse width adjuster 22 for increasing the frequency of the O8Cl signal. ], a comparator 3-2 for detecting RTP from the output signal of the receiving section υ, and a numeric keypad for manually inputting constants such as (8) 41, a select key 42 for selecting the type of input data, a display 43 for outputting the measured value, and a thermometer for measuring the temperature of the material or the ambient temperature. ing.

Below is a guide to generating TTP and RTP and measuring axial force. Each stage will be explained separately, and the explanation of the clock circuit will be omitted.

O8Cl generates a clock pulse of, for example, 1QMHz (period: 0.1 nS). This clock pulse is counted down to 1 by a frequency divider 21 consisting of a counter.
The frequency is divided into 00Hz (10mS). This frequency-divided clock pulse is used in a one-way circuit or a differentiator circuit.
A square shock wave is generated by the pulse width adjustment circuit 22, which is transmitted to the transmitter ζ3 and becomes the TTP. The rice probe injects ultrasonic pulses into the test material (not shown) using the output of the transmitter η, and also includes a detector, etc., which amplifies the echo signal corresponding to the reflected wave from the bottom of the test material. The signal is supplied to the comparator 3-2 via the receiving section 31.

The comparator 32 compares the output of the receiving section 31 with an internal reference voltage to form an RTP. This RTP and T
The time with TP is determined by the clock circuit. This embodiment differs from the previous embodiment in that the counter 7 is reset by a reset circuit that generates a reset pulse in response to a clock pulse when the frequency divider reaches half the frequency Jυ1.

How to use this device (=I) Place a 1° probe tip (described below) on the material to be tested, place one chair, and measure the unloaded and loaded times as T and T', respectively. /1-COJ4
manually using the select key 42.

The stress at this time is expressed by the well-known formula (%) (1) where E is Young's modulus, σ is stress, and k is the ultrasonic propagation dependent coefficient that rises to A, and is expressed as △T/T. The stress σ can be found.

In addition, the axial force Q is the product of the stress σ and the effective cross-sectional area S of the test shrine:
Q-σS.

Therefore, by manually inputting Young's modulus E, ultrasonic propagation dependence coefficient k, and effective cross-sectional area S in μmC0M+4 every 4 JIl using the ten keypad and select key 42, they can be stored in μmC0M14. The program measures the times T and T', calculates the axial force and stress, and selectively displays the stress and axial force on the display by operating the select key. Note that the thermometer 44 is required when the measurement interval is large because the transmission speed of the ultrasonic wave changes depending on the temperature, and is used for speed correction.

By using this application example, l0bi(A-D
By using a converter, a resolution of 0.5 nSec or more can be obtained, and a highly accurate and inexpensive axial force meter can be provided.

Other application examples include selecting an unknown material from the time of the call using separate probes for the transmitter and receiver, and measuring the distance by emitting light from the transmitter and measuring the time to the receiver. There are various types.

The clock circuit of the present invention uses special components (11)

[Brief explanation of drawings]

FIG. 1 is a block diagram of a timing circuit of the present invention. FIG. 2 and FIG. 3 are a time chart and an enlarged view of the clock circuit of the present invention, respectively. Figure 4 is a diagram showing an example of application of the timing circuit of the present invention to an ultrasonic bolt axial force meter. 1. Patent application filed l.
Field 1; 11ki Co., Ltd. (12) Procedural amendment (spontaneous) 1 Indication of the case 1982 Plaintime Application No. 174908 2 Name of the invention Timing circuit 3 Relationship with the supplementary IF case Patent applicant address Higashi, Nagoya City 2-3-3 Higashizakura Ward Showa year
Month/Date (Shipping Date: Showa Year/Month/Date) 5. Each column 6 of 1 Claim 1 and ``Detailed Description of the Invention-1'' of the specification to be amended Contents of the amendment Phase 1J353-9
5(7)(1) Meiwa 1, page 11, line 11 to 204
1'[l], it says, ``The stress at this time is......:Q-σS.'' [Okani σ at this time is the well-known △T/T2 (T-T)/T-σ(1-Ek)/E(z kσ)...(1)(
1) σ-E△T/(T-kET) ・0・Φ・ (2
) However, as the Young's modulus and ultrasonic propagation velocity dependent coefficient, E and l (4=A):l)), and the time T and ]' measured in the heading circuit, (
2) can be obtained using Eq. Still, the shaft crab Q can be calculated using the previously determined J-th 111 σ, Q2σS... (3) However, if S is the fruit J cross-sectional area of the phase material, (3) It is obtained by the formula. Correct it to 1. (2. Add 1qli +1 to the scope of claims as shown in the attached sheet.) 7. List of supporting documents (1) Document stating scope of claims + jiff2
, Claims (1) In a clock circuit that counts clock pulses during a period from when a transmitting pulse is emitted until a received pulse returns, a clock circuit that clocks the clock pulse by time-voltage conversion is added. , a timekeeping circuit characterized by enhanced time resolution. (2) In a stress meter or axial force meter that measures the time under no load (T) and the time under load (2T') to measure the response force σ or shaft force Q, a transmitting pulse is emitted and a received pulse is returned. A bolt axial force meter or stress meter characterized by using a timing circuit that measures the time as the sum of a timing circuit that counts clock pulses for a period until the clock pulse arrives, and a timing circuit that measures the clock pulse by time-voltage conversion. Total. (3) Measure the time without load: T and the time with load, T, and input the stress -σ as the Young's modulus of the test material 2E and the ultrasonic propagation velocity dependence coefficient of the test material as 1 ( σ=E△T/(T
-kET) Or enter the axis J:Q and the effective cross-sectional area of the material to be inspected: S. Q:
The force meter or axial force meter according to claim 2, wherein σS is calculated to determine σ or Q by 1ll11.

Claims (1)

[Claims] A timekeeping circuit characterized in that the time resolution is improved by time-voltage conversion of the clock pulse. (2) In a device that measures the stress or axial force based on the ratio of the time under no load to the time under load, a timing circuit that counts clock pulses during the period between the transmitted pulse and the received pulse; A bolt axial force meter or stress needle characterized by using a timing circuit that measures time by converting clock pulses into time and voltage, and a timing circuit that measures time as the sum of clock pulses.