JPS5873210A - Pulsively operated amplifying circuit - Google Patents
Pulsively operated amplifying circuitInfo
- Publication number
- JPS5873210A JPS5873210A JP56171687A JP17168781A JPS5873210A JP S5873210 A JPS5873210 A JP S5873210A JP 56171687 A JP56171687 A JP 56171687A JP 17168781 A JP17168781 A JP 17168781A JP S5873210 A JPS5873210 A JP S5873210A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- pulse
- voltage
- signal
- fet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Manipulation Of Pulses (AREA)
- Radar Systems Or Details Thereof (AREA)
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、A級動作FB?増幅器をパルス動作させるた
めのパルス動作増幅回路に関する。[Detailed Description of the Invention] The present invention provides a class-A operation FB? The present invention relates to a pulse operation amplifier circuit for operating an amplifier in pulse operation.
従来この種のFIT増幅器は、A級動作で使用する為、
パルス変調され良信号’t1!ILn扱う場合には、信
号が入力されていない時にも、電力を消費し、極めて効
率が悪い欠点がありた。Conventionally, this type of FIT amplifier is used in class A operation, so
Pulse modulated good signal 't1! When dealing with ILn, there is a drawback that power is consumed even when no signal is input, resulting in extremely poor efficiency.
即ち、従来のPIT増幅器は、第1図に示す如く一定の
ゲートバイアス電圧がFI3T7のゲート端子3に加え
られ、又、ドレイン端子4には、一定の正バイアス電圧
が加えられるA級動作バイアスとなっている。その為、
端子lへの入力の有無に関係なく電力を消費しておに、
パルス振幅変調された信号を増幅する場合、全体の効率
は、極めて悪くなる欠点があった。That is, the conventional PIT amplifier has a class A operation bias in which a constant gate bias voltage is applied to the gate terminal 3 of the FI3T7, and a constant positive bias voltage is applied to the drain terminal 4, as shown in FIG. It has become. For that reason,
It consumes power regardless of the presence or absence of input to terminal l,
When amplifying a pulse amplitude modulated signal, the overall efficiency is extremely poor.
本発明の目的は、パルス振幅変調された信号を取り扱う
PET増幅器においてゲート電圧のバイアス回路にスイ
ッチング回路を付加し、信号入力がない時間、増幅器を
非動作状態にすることによって、消費電力の大幅な低減
を可能とする増幅回路を提供することにある。An object of the present invention is to significantly reduce power consumption by adding a switching circuit to the gate voltage bias circuit in a PET amplifier that handles pulse amplitude modulated signals, and placing the amplifier in a non-operating state when no signal is input. An object of the present invention is to provide an amplifier circuit that enables reduction of the amount of noise.
上記目的を達成するため、本発明においては、ゲート端
子にスイッチング回路を付加し、入力信号に同期した駆
動パルス端子に加えた時、ゲート端子に伝達される負の
バイアス電圧によfi、PET増幅器のゲートをスイッ
チングすることによって、入力信号がある時間だけ増幅
器を動作させ、入力信号がない時は、非動作とした消費
電力の低滅を計る@路である。In order to achieve the above object, in the present invention, a switching circuit is added to the gate terminal, and when applied to the drive pulse terminal synchronized with the input signal, a negative bias voltage transmitted to the gate terminal causes fi, PET amplifier. By switching the gate of the amplifier, the amplifier is operated only when there is an input signal, and is inactive when there is no input signal, thereby reducing power consumption.
次に本発明の一実施例につき第2図と第3図を参照して
説明する。Next, one embodiment of the present invention will be described with reference to FIGS. 2 and 3.
第2図は、スイッチング回路8t−除いて通常のレーダ
送信機の基本構成を示し、それに本発明部分の構成であ
るところのスイッチング回路8を付加し、送信パルスに
同期したFET電力増幅器のゲート電圧をスイッチング
することによシ送信機♂九玉ら
の消費電力を行った回路である。FIG. 2 shows the basic configuration of a normal radar transmitter, excluding the switching circuit 8t, and adding the switching circuit 8, which is the configuration of the present invention, to the gate voltage of the FET power amplifier synchronized with the transmission pulse. This is a circuit that reduces the power consumption of the transmitter by switching.
信号源14のCW倍信号、パルス変調器15と変調源1
6によシバルス振幅変調されFET電力増幅器7により
増幅される。FET電力増幅器7は、その性質上人数バ
イアス動作で使用されるがスイッチフグ回wr8と変調
源16によシ、そのゲート電圧がスイッチングされ、F
ET増幅器7は、駆動パルスに同期して、動作する。CW multiplied signal of signal source 14, pulse modulator 15 and modulation source 1
6 and amplified by FET power amplifier 7. The FET power amplifier 7 is used in a multi-bias operation due to its nature, but its gate voltage is switched by the switching circuit wr8 and the modulation source 16, and the FET power amplifier 7
The ET amplifier 7 operates in synchronization with the drive pulse.
本回路では、端子3は通常カットオフ電圧(−VP)に
バイアスされておJ)FET増幅器7はカットオフ状態
にある。スイッチング回路8の入力端子6に駆動パルス
が入力されると、電源入力端子5からのゲート電圧は、
正常動作バイアスにセットされ、FET増幅器7は、正
常動作状態になる。この駆動パルスは、FET増幅器の
入力信号パルスと同期しておシ、入力信号パルスを増幅
し終えると駆動パルスも無くなり、ゲートは再びカット
オフ電圧(−・Vp)にバイアスされFET増幅器7は
、働らかなくなる。In this circuit, the terminal 3 is normally biased to the cutoff voltage (-VP) and the FET amplifier 7 is in the cutoff state. When a drive pulse is input to the input terminal 6 of the switching circuit 8, the gate voltage from the power supply input terminal 5 is
The normal operating bias is set and the FET amplifier 7 is in normal operating condition. This drive pulse is synchronized with the input signal pulse of the FET amplifier, and when the input signal pulse is amplified, the drive pulse disappears, and the gate is again biased to the cutoff voltage (-Vp), and the FET amplifier 7 I won't be able to work anymore.
FET増幅器7は常時ゲート電圧がカットオフ状態に保
たれ、非動作状態にあるためFET増幅器で消費される
電力は、はとんど無視されるので、不要な電力消費がな
く、消費電力の低減が計られる。またこの時FET増幅
器の減衰特性によシ本笑施例のごとき送信機のFBT増
幅増幅器−サーキュレータ1介して、受信機と組合せた
レーダ送信機に応用した場合、送信機雑音がサーキュレ
ータ10とリミッタ1it−通してF”ET12と、そ
の出力端子13t−含む受信機に漏洩し、受信機のS/
N比が劣化するのt防ぐ働き金する。Since the gate voltage of the FET amplifier 7 is always kept in a cut-off state and the FET amplifier is in a non-operating state, the power consumed by the FET amplifier is almost ignored, so there is no unnecessary power consumption and power consumption is reduced. is measured. At this time, due to the attenuation characteristics of the FET amplifier, when applied to a radar transmitter combined with a receiver via the FBT amplification amplifier-circulator 1 of the transmitter as in this embodiment, the transmitter noise will be transmitted to the circulator 10 and the limiter. 1it- through F''ET 12 and its output terminal 13t- leaks to the receiver including the receiver's S/
It works to prevent the N ratio from deteriorating.
第3図は、スイッチング回路の詳細上水し、入力端子6
に駆動パルスが加えられるとフォトカップラ17が動作
し、トランジスタ1sffioFFKする。その結果ト
ランジスタ191−OFFにするため端子の電圧(−V
p )はR1及びgsによって分割され−Ri−Vp/
(Rx+R雪) となる。図中、20はトランジスタ1
8.19のスイッチング動作も高速化するためのツェナ
ーダイオードである。Figure 3 shows the details of the switching circuit and the input terminal 6.
When a driving pulse is applied to the photocoupler 17, the photocoupler 17 operates and the transistor 1sffioFFK is activated. As a result, the voltage at the terminal (-V
p) is divided by R1 and gs to −Ri−Vp/
(Rx+R snow). In the figure, 20 is transistor 1
The Zener diode is used to speed up the switching operation of 8.19.
以上説明したようにFE’l’増幅器をパルス動作させ
ることによって消費電力が低減される効果がある。また
不発W14t−実施例のごときレーダ送受信機に使用し
た場合、消費電力の低減に加え、非送信時の送信機雑音
漏洩により受信機の8/N比が劣化するのを防ぐ効果が
ある。As explained above, the pulse operation of the FE'l' amplifier has the effect of reducing power consumption. Further, when used in a radar transceiver such as the unexploded W14t embodiment, in addition to reducing power consumption, there is an effect of preventing deterioration of the 8/N ratio of the receiver due to transmitter noise leakage during non-transmission.
第1図は、従来のFET増幅器のパルス動作回路図、第
2図は、本発明の一実施例全示す回路図、第3図は、ス
イッチング回路8の一実施例を示す回路図である。
7.12・・・・−・FBT、8−−−−−・スイッチ
ング回路、10・・・・・・サーキュレータ、11−・
・・・・リミッタ、14・・・・・・信号源、15・・
・・・・パルス変調器、16・−・・・・変調信号発生
器、17・−・・・・フォトカプラ、18゜19・・・
・・・トランジスタ、2o・・・・・・ツユナーダイオ
ー ド。FIG. 1 is a pulse operation circuit diagram of a conventional FET amplifier, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing an embodiment of a switching circuit 8. As shown in FIG. 7.12...FBT, 8--Switching circuit, 10... Circulator, 11-...
...Limiter, 14...Signal source, 15...
...Pulse modulator, 16...Modulation signal generator, 17...Photocoupler, 18゜19...
...Transistor, 2o...Tuner diode.
Claims (1)
のゲートバイアス回路に入力に同期したスイッチング信
号によ〉増幅器管パルス動作させるスイッチング回路を
付加して成ることt−W黴とするパルス動作増幅回路。A pulse-operated amplifier circuit consisting of a gate bias circuit of a class-A operating FIT amplifier that amplifies pulse-modulated signals and a switching circuit that operates the amplifier tube in pulses using a switching signal synchronized with the input. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56171687A JPS5873210A (en) | 1981-10-27 | 1981-10-27 | Pulsively operated amplifying circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56171687A JPS5873210A (en) | 1981-10-27 | 1981-10-27 | Pulsively operated amplifying circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5873210A true JPS5873210A (en) | 1983-05-02 |
JPH0113762B2 JPH0113762B2 (en) | 1989-03-08 |
Family
ID=15927825
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56171687A Granted JPS5873210A (en) | 1981-10-27 | 1981-10-27 | Pulsively operated amplifying circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5873210A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61274405A (en) * | 1985-03-21 | 1986-12-04 | ゼネラル・エレクトリツク・カンパニイ | Gate type modulator for wireless frequency carrier signal |
JPH0244276A (en) * | 1988-08-04 | 1990-02-14 | Tokyo Electric Power Co Inc:The | Transmission pulse variable type underground impulse radar apparatus |
JPH036730U (en) * | 1989-06-08 | 1991-01-23 | ||
JPH075252A (en) * | 1993-06-17 | 1995-01-10 | Honda Motor Co Ltd | Time-sharing type fm radar system |
WO2005091496A1 (en) * | 2004-03-23 | 2005-09-29 | Murata Manufacturing Co., Ltd. | Fet amplifier, pulse modulation module, and radar device |
JP2008147943A (en) * | 2006-12-08 | 2008-06-26 | Mitsubishi Electric Corp | Transmission and reception module device and driving method of transmission and reception module |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5483748U (en) * | 1977-11-24 | 1979-06-13 |
-
1981
- 1981-10-27 JP JP56171687A patent/JPS5873210A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5483748U (en) * | 1977-11-24 | 1979-06-13 |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61274405A (en) * | 1985-03-21 | 1986-12-04 | ゼネラル・エレクトリツク・カンパニイ | Gate type modulator for wireless frequency carrier signal |
JPH0244276A (en) * | 1988-08-04 | 1990-02-14 | Tokyo Electric Power Co Inc:The | Transmission pulse variable type underground impulse radar apparatus |
JPH036730U (en) * | 1989-06-08 | 1991-01-23 | ||
JPH075252A (en) * | 1993-06-17 | 1995-01-10 | Honda Motor Co Ltd | Time-sharing type fm radar system |
USRE36095E (en) * | 1993-06-17 | 1999-02-16 | Honda Giken Kogyo Kabushiki Kaisha | Time sharing FM radar system |
WO2005091496A1 (en) * | 2004-03-23 | 2005-09-29 | Murata Manufacturing Co., Ltd. | Fet amplifier, pulse modulation module, and radar device |
GB2426646A (en) * | 2004-03-23 | 2006-11-29 | Murata Manufacturing Co | Fet amplifier, pulse modulation module, and radar device |
GB2426646B (en) * | 2004-03-23 | 2007-12-27 | Murata Manufacturing Co | Fet amplifier, pulse modulation module, and radar device |
US7365603B2 (en) | 2004-03-23 | 2008-04-29 | Murata Manufacturing Co., Ltd. | FET amplifier, pulse modulation module, and radar device |
JP2008147943A (en) * | 2006-12-08 | 2008-06-26 | Mitsubishi Electric Corp | Transmission and reception module device and driving method of transmission and reception module |
Also Published As
Publication number | Publication date |
---|---|
JPH0113762B2 (en) | 1989-03-08 |
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