JPS62278823A - Electric power control circuit - Google Patents

Electric power control circuit

Info

Publication number
JPS62278823A
JPS62278823A JP12124786A JP12124786A JPS62278823A JP S62278823 A JPS62278823 A JP S62278823A JP 12124786 A JP12124786 A JP 12124786A JP 12124786 A JP12124786 A JP 12124786A JP S62278823 A JPS62278823 A JP S62278823A
Authority
JP
Japan
Prior art keywords
circuit
output
stable
feedback loop
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12124786A
Other languages
Japanese (ja)
Inventor
Shigeru Ikegishi
池岸 茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Information Systems Ltd
Hitachi Shonan Denshi Co Ltd
Original Assignee
Hitachi Information Systems Ltd
Hitachi Shonan Denshi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Information Systems Ltd, Hitachi Shonan Denshi Co Ltd filed Critical Hitachi Information Systems Ltd
Priority to JP12124786A priority Critical patent/JPS62278823A/en
Publication of JPS62278823A publication Critical patent/JPS62278823A/en
Pending legal-status Critical Current

Links

Landscapes

  • Transmitters (AREA)

Abstract

PURPOSE:To optimize a response characteristic, namely, the control at the time of the rise of a transmitter output by providing a memory circuit and a control circuit, storing the data of the period when a feedback is stable and controlling an electric power by memory data when the feedback loop is not stable. CONSTITUTION:A transmitting command signal is received, converted to a suitable signal, written to a memory circuit 14 and the command of reading is executed. The memory circuit 14 to receive the command writes a comparing circuit output when the feedback loop is stable, and outputs a written information based upon the command from a control circuit 13 from when a comparing circuit 9 comes to be essentially a non-action up to when a transmitting output is sent again and a feedback loop is stable. A control circuit selects a comparing circuit output while the feedback loop is stable, selects a memory circuit output while the feedback loop is not stable on the basis of the transmitting command signal, and connects them to a direct current amplifying circuit 10 of the next step. By a series of the action, since the input level or the electric power gain of an electric power amplifier 5 when the feedback loop is not stable can be set to the value equal to the time when the feedback loop is stable, the response characteristic of the transmitter can be optimized.

Description

【発明の詳細な説明】 3、発明の詳細な説明 〔産業上の利用分野〕 本発明は無線通信機、特にディジタルデータ通信システ
ム等で、その出力送出のタイミングが送信指令信号によ
り制御される無線通信機に好適な送信出力電力制御装置
に関するものである。
[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a wireless communication device, particularly a digital data communication system, etc., in which the timing of output transmission is controlled by a transmission command signal. The present invention relates to a transmission output power control device suitable for communication devices.

〔従来の技術〕[Conventional technology]

従来この種の装置としては、特開昭60−41821号
公報に記載されているように、一般に送信出力電力の一
部を出力に比例する直流電圧に変換し、これを設定出力
電力に対応する基準電圧を比較増幅し、その出力により
電力増幅器の入力レベルまたは利得を制御する帰還ルー
プ制御によるという利得制御方法がとられている。この
ようなループ制御による利得制御方法による電力制御装
置の一例を第3図に示して説明する。図において、1は
変調器(図示せず)などからの送信信号が印加される入
力端子、2は送信信号出力が得られる出力端子、3送信
出力設定用制御信号が印加される制御入力端子、4はピ
ンダイオードなどで形成された電圧可変減衰器で、この
電圧可変減衰器4には入力端子1からの送信信号が導入
されるように構成されている。
Conventionally, this type of device generally converts a part of the transmission output power into a DC voltage proportional to the output, and converts this into a DC voltage that corresponds to the set output power, as described in Japanese Patent Application Laid-Open No. 60-41821. A gain control method is used in which a reference voltage is compared and amplified, and the input level or gain of a power amplifier is controlled by the output thereof using feedback loop control. An example of a power control device using such a gain control method using loop control will be described with reference to FIG. In the figure, 1 is an input terminal to which a transmission signal from a modulator (not shown) etc. is applied, 2 is an output terminal from which a transmission signal output is obtained, 3 is a control input terminal to which a control signal for setting the transmission output is applied; Reference numeral 4 denotes a voltage variable attenuator formed of a pin diode or the like, and is configured so that a transmission signal from the input terminal 1 is introduced into the voltage variable attenuator 4.

そして、この電圧可変減衰器4で設定された所要の減衰
を受けた送信信号は電力増幅器5で電力増幅され、その
出力は方向性結合器6を介して出力端子2に至り、その
送信出力信号は、例えば図示しないが、アンテナ共用器
を通してアンテナから送信波として発射される。
Then, the transmission signal that has undergone the required attenuation set by the voltage variable attenuator 4 is power amplified by the power amplifier 5, and its output reaches the output terminal 2 via the directional coupler 6, and the transmission output signal is is emitted as a transmission wave from an antenna through an antenna duplexer (not shown), for example.

一方、この電力増幅器5の出力の一部を取り出す検出回
路である方向性結合器6で分岐された送信出力信号の一
部はダイオードなどで構成される検波回路7により検波
され送信出力電力に比例した直流電圧に変換される。そ
して、この直流電圧は、制御入力端子3よりの制御信号
により駆動され設定出力に対応した基準電圧を発生する
基準電圧発生回路8の出力電圧と比較回路9で比較され
On the other hand, a part of the transmission output signal branched by the directional coupler 6, which is a detection circuit that takes out a part of the output of the power amplifier 5, is detected by a detection circuit 7 composed of a diode, etc., and is proportional to the transmission output power. is converted into a DC voltage. This DC voltage is then compared in a comparison circuit 9 with the output voltage of a reference voltage generation circuit 8 which is driven by a control signal from the control input terminal 3 and generates a reference voltage corresponding to the set output.

誤差電圧が抽出される。この誤差電圧は直流増幅器10
により増幅された後、前述の電圧可変減衰機4の制御電
圧として帰還され、帰還ループが形成される。
The error voltage is extracted. This error voltage is applied to the DC amplifier 10
After being amplified by the above-mentioned voltage variable attenuator 4, the voltage is fed back as a control voltage to form a feedback loop.

このように構成された電力制御回路は、広い周波数に渡
り電力を一定に保てると共に環境条件の影響を受けにく
いことや、経済的に構成できると    −いう点で一
般の無線機に広く利用されている。
Power control circuits configured in this way are widely used in general radio equipment because they can maintain constant power over a wide range of frequencies, are less susceptible to environmental conditions, and can be constructed economically. There is.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、上記従来技術は、電力増幅器の入力レベ
ル、または電力利得を制御する帰還ループが動作し、安
定するまでの間については配慮されでおらず、この帰還
ループが安定するまでの間は制御が不安定となり出力電
力の過大、あるいは過小となる。すなわち送信機出力の
応答特性が不安定であると云う欠点があった。
However, the above-mentioned conventional technology does not take into consideration the period until the feedback loop that controls the input level or power gain of the power amplifier operates and stabilizes, and the control is not performed until the feedback loop stabilizes. It becomes unstable and the output power becomes too high or too low. That is, there is a drawback that the response characteristics of the transmitter output are unstable.

本発明の目的は、この応答特性、すなわち送信機出力の
立上り時の制御を最適なものにすることにある。
An object of the present invention is to optimize this response characteristic, that is, the control at the rise of the transmitter output.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、前述した従来技術に記憶回路、および制御
回路を設け、帰還ループが安定している時期のデータを
記憶し、帰還ループが不安定な時期は前記の記憶データ
により電力を制御することにより達成される。
The above purpose is to provide a memory circuit and a control circuit in the prior art described above, to store data when the feedback loop is stable, and to control power using the stored data when the feedback loop is unstable. This is achieved by

〔発明の作用〕[Action of the invention]

本発明の電力制御回路は、送信指令信号を受け。 The power control circuit of the present invention receives a transmission command signal.

適切な信号に変換し、記憶回路に書き込み、読み出しの
指令をするにの指令を受けた記憶回路は帰還ループが安
定している時の比較回路出力を書き込み、送信指令信号
が負の時、すなわち送信出力が断で検波出力が無く、比
較回路が実質的に非動作となった時点から、再び送信指
令信号が正となり送信出力が送出され帰還ループが安定
するまでの間、前述の制御回路からの指令に基づき書き
込まれた情報を出力する。
The memory circuit that received the command writes the comparator circuit output when the feedback loop is stable, and writes the comparator output when the feedback loop is stable, and when the transmission command signal is negative, i.e. From the time when the transmission output is cut off, there is no detection output, and the comparator circuit becomes essentially inactive, until the transmission command signal becomes positive again, the transmission output is sent out, and the feedback loop is stabilized, the control circuit described above Outputs the information written based on the command.

一方制御回路は送信指令信号を基準にし、前述したのと
同様に帰還ループが安定している間は比較回路出力を、
帰還ループが不安定な間は記憶回路出力を選択し1次段
の直流増幅回路へ接続する。
On the other hand, the control circuit uses the transmission command signal as a reference, and as mentioned above, as long as the feedback loop is stable, the comparison circuit output is
While the feedback loop is unstable, the memory circuit output is selected and connected to the primary stage DC amplifier circuit.

この一連の動作により、前述した帰還ループが不安定な
時の電力増幅器の入力レベルまたは電力利得を帰還ルー
プが安定している時と同等の値に設定できる為、送信機
の応答特性を最適なものにできる。
Through this series of operations, the input level or power gain of the power amplifier when the feedback loop is unstable can be set to the same value as when the feedback loop is stable, so the response characteristics of the transmitter can be optimized. It can be made into something.

〔実施例〕〔Example〕

以下本発明の一実施例を図面に基づき説明する。 An embodiment of the present invention will be described below based on the drawings.

第1図は本発明による電力制御回路を示すブロック図で
、説明に必要な部分のみを示す。
FIG. 1 is a block diagram showing a power control circuit according to the present invention, showing only the parts necessary for explanation.

この第1図において第3図と同一符号のもの(1〜lO
)は相当部分を示し、11は送信指令信号入力端子、1
2は比較回路9からの誤差電圧をディジタル信号に変換
し、そのディジタル信号を切替回路15および制御回路
13へ常に出力するA/D変換回路、13は送信指令信
号を基準に適切なタイミング信号へ変換、切換回路15
へ制御信号を出力すると共に、A/D変換回路12の信
号を演算し、結果を記憶回路14へ出力する制御回路、
14は前記制御回路出力を記憶し、記憶したデータを切
換回路15へ出力する記憶回路、15は制御回路13か
らの制御信号により、前述のA/D変換回路12、記憶
回路14の出力のいずれか一方を選択し、D/A変換回
路16に出力する制御回路、16はこのディジタル信号
を比例する電圧に変換するD/A変換回路である。
In this Fig. 1, those with the same numbers as in Fig. 3 (1 to lO
) indicates the corresponding part, 11 is the transmission command signal input terminal, 1
2 is an A/D conversion circuit that converts the error voltage from the comparator circuit 9 into a digital signal and always outputs the digital signal to the switching circuit 15 and the control circuit 13; 13 is an A/D conversion circuit that converts the error voltage from the comparison circuit 9 into a digital signal; Conversion and switching circuit 15
a control circuit that outputs a control signal to the A/D conversion circuit 12, calculates the signal of the A/D conversion circuit 12, and outputs the result to the storage circuit 14;
14 is a storage circuit that stores the output of the control circuit and outputs the stored data to the switching circuit 15; 15 is a storage circuit that stores the output of the control circuit and outputs the stored data to the switching circuit 15; A control circuit selects one of them and outputs it to a D/A conversion circuit 16, and 16 is a D/A conversion circuit that converts this digital signal into a proportional voltage.

つぎに第1図に示す実施例の動作を第2図を参照して説
明する。
Next, the operation of the embodiment shown in FIG. 1 will be explained with reference to FIG. 2.

この第2図は横軸を時間軸とし、時間に対する各部の動
作の関係を示すタイミングチャートである。まず初期設
定として切替回路15はA/D変換回路12の出力デー
タを選別するように設定しておく、 1+時にて送信指
令信号の立上りと同時に入力端子1に変調入力信号が印
加され、この入力端子1を通して電圧可変減衰器4に印
加される。しかし、この時点では検波回路7の出力が無
いため、帰還ループがかからず電圧可変減衰器4は非動
作であり、変調入力信号は減衰されないまま電力増幅器
5で電力増幅され、出力過大となる。この後tz時まで
の動作は従来例と同様なので、ここでの説明は省略する
。つぎにtz時では帰還ループが安定し、設定した電力
レベルに制御される。この帰還ループが安定してから微
小時間Δtが経過したt3時にて制御回路13はA/D
変換回路12の出力データを読み込み、設定した回数、
または期間での、データの平均値を算出する。この演算
作業は前記制御回路13の動作特性上比較回路9の出力
が常に上下しているため、これを補正するためのもので
ある。この算出された平均値はt4時の時点で記憶回路
14へ出力され、これを受けた記憶回路14は先に記憶
していたデータを書替え、この新たなデータを切替回路
15へと出力する。但し、ここで説明したt4時は、少
なくとも送信指令信号より前でなければならない、つぎ
にt5時、すなわち送信指令信号が断となると同時に送
信電力および検波回路7の出力が無くなり帰還ループが
非動作となる。そこで、これと同時期に制御回路13よ
り切替回路15へ切替信号を送り切替回路15の出力を
記憶回路14のデータに切替える。この動作により、送
信指令信号が無い状態でも電圧可変減衰器4には帰還ル
ープが安定している時と同等の電圧が印加され、常に一
定した減衰量を保つことができ、t6時にて再度送信指
令信号が立上がり電圧可変減衰器4に検波入力が印加さ
れても、希望する減衰がなされ、はぼ設定した電力が得
られる。この安定した立上り特性により電力制御回路の
帰還ループもわずかな時間で安定するため、t6時より
微少時間Δt′経過したt7時にて、制御回路13から
切替回路15へ切替信号を送り、切替回路15の出力を
A/D変換回路12の出力に切替える。この後の動作は
前述したt3時以降の動作を繰り返すため、説明は省略
する。
This FIG. 2 is a timing chart with the horizontal axis as the time axis and showing the relationship of the operations of each part with respect to time. First, as an initial setting, the switching circuit 15 is set to select the output data of the A/D conversion circuit 12. At 1+, a modulated input signal is applied to the input terminal 1 at the same time as the transmission command signal rises, and this input It is applied to the voltage variable attenuator 4 through the terminal 1. However, since there is no output from the detection circuit 7 at this point, the feedback loop is not applied and the voltage variable attenuator 4 is inactive, and the modulated input signal is power amplified by the power amplifier 5 without being attenuated, resulting in an excessive output. . The operation after this until time tz is the same as in the conventional example, so the explanation here will be omitted. Next, at time tz, the feedback loop is stabilized and the power is controlled to the set power level. At time t3, when a minute time Δt has passed since this feedback loop became stable, the control circuit 13
Read the output data of the conversion circuit 12, set the number of times,
Or calculate the average value of data over a period of time. This arithmetic operation is performed to correct the fact that the output of the comparator circuit 9 always fluctuates due to the operating characteristics of the control circuit 13. This calculated average value is output to the storage circuit 14 at time t4, and the storage circuit 14 that receives it rewrites the previously stored data and outputs this new data to the switching circuit 15. However, time t4 explained here must be at least before the transmission command signal, and then time t5, that is, at the same time as the transmission command signal is cut off, the transmission power and the output of the detection circuit 7 disappear and the feedback loop becomes inactive. becomes. Therefore, at the same time, a switching signal is sent from the control circuit 13 to the switching circuit 15 to switch the output of the switching circuit 15 to the data in the storage circuit 14. Due to this operation, even when there is no transmission command signal, the same voltage as when the feedback loop is stable is applied to the voltage variable attenuator 4, and a constant attenuation amount can always be maintained, and the transmission is performed again at time t6. Even when the command signal rises and a detection input is applied to the voltage variable attenuator 4, the desired attenuation is performed and the set power is obtained. Due to this stable rise characteristic, the feedback loop of the power control circuit is also stabilized in a short time. Therefore, at time t7, a minute time Δt' has passed since time t6, a switching signal is sent from the control circuit 13 to the switching circuit 15, and the switching circuit 15 The output of the A/D conversion circuit 12 is switched to the output of the A/D conversion circuit 12. Since the subsequent operation repeats the operation after time t3 described above, a description thereof will be omitted.

以上述べたように、本実施例によれば送信機出力の応答
特性を良好にすることができる。
As described above, according to this embodiment, the response characteristics of the transmitter output can be improved.

〔発明の効果〕〔Effect of the invention〕

本発明によれば送信機出力の応答特性、すなわち送信機
出力の立上り時の制御を最適なものにできるので、信頼
性の高い無線通信が可能となる。
According to the present invention, the response characteristics of the transmitter output, that is, the control at the time of the rise of the transmitter output, can be optimized, so that highly reliable wireless communication is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図。 第2図は第1図の動作説明に供する各部の動作の時間関
係を示すタイムチャート、第3図は従来の電力制御回路
の一例を示すブロック図である。 12・・・A/D変換回路、13・・・制御回路、14
・・・記憶回路、15・・・切替回路、16・・・D/
A変換回路。 特許出願人 日立湘南電子株式会社 代理人弁理士  秋  本  正  実発 l 目 第 2 凶 第 51EI
FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a time chart showing the time relationship of the operations of each part to explain the operation of FIG. 1, and FIG. 3 is a block diagram showing an example of a conventional power control circuit. 12...A/D conversion circuit, 13...control circuit, 14
...Memory circuit, 15...Switching circuit, 16...D/
A conversion circuit. Patent Applicant: Hitachi Shonan Electronics Co., Ltd. Representative Patent Attorney Tadashi Akimoto Jitsuhatsu No. 2 No. 51EI

Claims (1)

【特許請求の範囲】[Claims] 1、送信信号を増幅する電力増幅器を、この電力増幅器
の出力の一部を取り出す検出回路と、この検出回路から
の検出信号を検出信号に比例した電圧、あるいは符号に
変換する検波回路と、規定出力に対応した基準信号を発
生する基準電圧発生回路と、前記検波回路の出力信号と
前記電圧発生回路の基準信号とを比較し、誤差信号を出
力する比較回路と、この比較回路によって得られた誤差
信号を記憶、出力する記憶回路と、前記比較回路の出力
と前記記憶回路の出力のいずれか一方を切替出力する制
御回路と、このいずれかの出力をその出力に比例した直
流電圧に変換し、増幅し出力する直流増幅回路と、この
直流増幅回路の出力に基づいて前記電力増幅器の入力レ
ベルおよび電力利得の少くとも一方を制御する手段とを
備え、送信指令信号を基準に、前記記憶回路を制御する
ことを特徴とする電力制御回路。
1. A power amplifier that amplifies the transmitted signal, a detection circuit that takes out a part of the output of this power amplifier, and a detection circuit that converts the detection signal from this detection circuit into a voltage or sign proportional to the detection signal, as specified. a reference voltage generation circuit that generates a reference signal corresponding to the output; a comparison circuit that compares the output signal of the detection circuit with the reference signal of the voltage generation circuit and outputs an error signal; a memory circuit that stores and outputs an error signal; a control circuit that switches between the output of the comparator circuit and the output of the memory circuit; and a control circuit that converts either of the outputs into a DC voltage proportional to the output. , comprising a DC amplification circuit for amplifying and outputting, and means for controlling at least one of the input level and power gain of the power amplifier based on the output of the DC amplification circuit, and the storage circuit based on the transmission command signal. A power control circuit characterized by controlling.
JP12124786A 1986-05-28 1986-05-28 Electric power control circuit Pending JPS62278823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12124786A JPS62278823A (en) 1986-05-28 1986-05-28 Electric power control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12124786A JPS62278823A (en) 1986-05-28 1986-05-28 Electric power control circuit

Publications (1)

Publication Number Publication Date
JPS62278823A true JPS62278823A (en) 1987-12-03

Family

ID=14806540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12124786A Pending JPS62278823A (en) 1986-05-28 1986-05-28 Electric power control circuit

Country Status (1)

Country Link
JP (1) JPS62278823A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0548356A (en) * 1991-08-09 1993-02-26 Matsushita Electric Ind Co Ltd High frequency power amplifier
JPH06132873A (en) * 1992-10-21 1994-05-13 Nec Corp Power controller
WO1994017598A1 (en) * 1993-01-25 1994-08-04 Kabushiki Kaisha Toshiba Communication apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0548356A (en) * 1991-08-09 1993-02-26 Matsushita Electric Ind Co Ltd High frequency power amplifier
JPH06132873A (en) * 1992-10-21 1994-05-13 Nec Corp Power controller
WO1994017598A1 (en) * 1993-01-25 1994-08-04 Kabushiki Kaisha Toshiba Communication apparatus
US5737697A (en) * 1993-01-25 1998-04-07 Toshiba Corporation Transmission power control circuit for a communication system

Similar Documents

Publication Publication Date Title
US5054116A (en) Feed-forward automatic level control circuit for a high-frequency source
US5687195A (en) Digital automatic gain controller for satellite transponder
US6807403B2 (en) Radio telephone apparatus
JPS6041821A (en) Transmission output power controller
JPH0449298B2 (en)
JPS62278823A (en) Electric power control circuit
JP2823485B2 (en) Burst transmitter
US20010000504A1 (en) Radio transmitter and power supply control unit incorporated in the radio transmitter
US5903193A (en) Amplifying device and transmission output control apparatus
JP2611673B2 (en) Wireless transmission output control circuit
JPH09121132A (en) Transmission power control circuit for radio equipment
JP2973258B2 (en) Analog / digital shared transmission power automatic controller
JPH0198304A (en) Power amplifier circuit device
JP3257083B2 (en) Automatic gain control circuit
KR20010040179A (en) Apparatus and method for controlling transmission power of mobile station
JP2973257B2 (en) Analog / digital shared transmission power automatic controller
JP2806129B2 (en) Transmission power control device
JPH06244645A (en) Amplifier circuit
JP3022869B1 (en) Transmission output control circuit
JP3059892B2 (en) Power control circuit
JP3457787B2 (en) Automatic transmission output control device for TDMA transmitter
JPH0370236A (en) Terminal equipment for digital communication
JPH09312578A (en) Plural-mode shared transmitting circuit
JPS62106384A (en) Automatic gain control circuit
JPH04372227A (en) Radio transmission power controller