JPS5870048U - Synchronous adjustment circuit - Google Patents

Synchronous adjustment circuit

Info

Publication number
JPS5870048U
JPS5870048U JP16241681U JP16241681U JPS5870048U JP S5870048 U JPS5870048 U JP S5870048U JP 16241681 U JP16241681 U JP 16241681U JP 16241681 U JP16241681 U JP 16241681U JP S5870048 U JPS5870048 U JP S5870048U
Authority
JP
Japan
Prior art keywords
frequency
voltage
circuit
addition
subtraction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16241681U
Other languages
Japanese (ja)
Inventor
野崎 真人
Original Assignee
新神戸電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 新神戸電機株式会社 filed Critical 新神戸電機株式会社
Priority to JP16241681U priority Critical patent/JPS5870048U/en
Publication of JPS5870048U publication Critical patent/JPS5870048U/en
Pending legal-status Critical Current

Links

Landscapes

  • Stand-By Power Supply Arrangements (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示す回路図である。 1.2は零点比較比、3は位相二重圧変換器、4は低域
通過ろ波器、5は電圧−周波数変換器、6は加算減算選
択回路、7は発信回路、8は加算減算回路、9は分周回
路。
The drawing is a circuit diagram showing an embodiment of the present invention. 1.2 is a zero point comparison ratio, 3 is a phase double pressure converter, 4 is a low-pass filter, 5 is a voltage-frequency converter, 6 is an addition/subtraction selection circuit, 7 is an oscillation circuit, and 8 is an addition/subtraction circuit. , 9 is a frequency dividing circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] インバータと商用電源とを常時同期運転するための同期
調整回路において、商用電源周波数の零点比較器及びイ
ンバータの出力周波数の零点比較器と、その2つの位相
差を電圧に変換する位相−電圧変換器と、その電圧に対
する低域通過ろ波器と、その低域通過ろ波器の出力電圧
を周波数に変換する電圧−周波数変換器と、前記2つの
零点比較器の位相差状態によって加算又は減算を選択す
る加算減算選択回路と、加算減算選択回路の選択信号に
よって上記電圧−周波数変換器の出力周波数をインバー
タの位相制御回路における発振回路の廠振周波数に加算
あるいは減算を行なう加算減算回路とによって構成され
、インバータの出力周波数を商用電源周波数に常時同期
させることを特徴とする同期調整回路。
In a synchronization adjustment circuit for constantly synchronously operating an inverter and a commercial power source, a zero point comparator for the commercial power frequency, a zero point comparator for the inverter output frequency, and a phase-voltage converter that converts the phase difference between the two into voltage. , a low-pass filter for that voltage, a voltage-frequency converter that converts the output voltage of the low-pass filter into a frequency, and addition or subtraction depending on the phase difference state of the two zero point comparators. Consisting of an addition/subtraction selection circuit for selection, and an addition/subtraction circuit for adding or subtracting the output frequency of the voltage-frequency converter to or from the oscillation frequency of the oscillation circuit in the phase control circuit of the inverter according to the selection signal of the addition/subtraction selection circuit. A synchronization adjustment circuit that constantly synchronizes the inverter output frequency with the commercial power supply frequency.
JP16241681U 1981-10-30 1981-10-30 Synchronous adjustment circuit Pending JPS5870048U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16241681U JPS5870048U (en) 1981-10-30 1981-10-30 Synchronous adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16241681U JPS5870048U (en) 1981-10-30 1981-10-30 Synchronous adjustment circuit

Publications (1)

Publication Number Publication Date
JPS5870048U true JPS5870048U (en) 1983-05-12

Family

ID=29954729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16241681U Pending JPS5870048U (en) 1981-10-30 1981-10-30 Synchronous adjustment circuit

Country Status (1)

Country Link
JP (1) JPS5870048U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009106101A (en) * 2007-10-24 2009-05-14 Fuji Electric Systems Co Ltd Synchronous control device of power supply and parallel operation method of power supply

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009106101A (en) * 2007-10-24 2009-05-14 Fuji Electric Systems Co Ltd Synchronous control device of power supply and parallel operation method of power supply

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